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- From: meisl@forwiss.uni-passau.de (Wolfgang Meisl)
- Subject: Re: CISC and RISC
- Message-ID: <1992Dec18.180013.27677@tom.rz.uni-passau.de>
- Sender: news@tom.rz.uni-passau.de (News-Operator)
- Organization: University of Passau, Germany
- References: <70436@cup.portal.com> <amipb.04wr@amipb.gna.org> <37844@cbmvax.commodore.com> <AHANSFOR.92Dec18071830@bigwpi.wpi.edu> <1gsqk1INN327@crcnis1.unl.edu>
- Date: Fri, 18 Dec 1992 18:00:13 GMT
- Lines: 64
-
- In article <1gsqk1INN327@crcnis1.unl.edu>, tbills@cse.unl.edu (Trent Bills) writes:
- |> In article <AHANSFOR.92Dec18071830@bigwpi.wpi.edu>, ahansfor@bigwpi.wpi.edu (Andrew L. Hansford) writes:
- |> |> >>>>> On 18 Dec 92 00:56:48 GMT, idr@rigel.cs.pdx.edu (Ian D Romanick) said:
- |> |>
- |> |> idr> Article-I.D.: pdxgate.6587
- |> |>
- |> |> idr> In article <Bz8FD1.Dxt@ns1.nodak.edu> dewald@plains.NoDak.edu
- |> |> idr> (Eric Dewald) writes:
- |> |> >What are the advantages of CISC and RISC?
- |> |>
- |> |> idr> Well, since RISC is a more basic instruction set, it is MUCH
- |> |> idr> easier for a compiler to generate good code for it.
- |> |>
- |> |> You are joking right? The compiler and even assemblers are the
- |> |> elements that got much more complicated. Dependency avoidance, delay
- |> |> slot scheduling...easy?
- |> |>
- |>
- |> No. He is not joking. Have you ever written a compiler? Compiler
- |> problems such as register allocation are MUCH more difficult that
- |> avoiding data hazzards and filling delay slots.
-
- Then, why produce many compilers on SPARC processsors only intermediate
- c-code? It may be simplier to write a compiler on RISC architecture,
- but it is really hard to write an efficient one.
-
-
- |> |> idr> It also makes it so
- |> |> idr> that the instructions themselves are smaller and can be fetched
- |> |> idr> and decoded quicker.
- |> |>
- |> |> The instructions are generally the same format for all instructions
- |> |> (or the processor supports very few formats) that makes them easier to
- |> |> decode. THEY ARE NOT SMALLER.
- |> |>
- |> |> -- Andrew Hansford
- |> |> ahansfor@wpi.wpi.edu
- |>
- |> In many cases, RISC instructions are smaller than CISC instructions.
- |> Consider an add instruction in a CISC chip. The source operands could
- |> both be some place in memory. Depending on the addressing mode used,
- |> both source operands could take up 4 bytes or more each. RISC
- |> instructions are usually a fixed size (32 or 64 bits) which is obviously
- |> smaller than the above CISC example.
- |>
- |> - Trent Bills
-
- Indeed, there is not so much difference in total code size. But RISC
- programs are bigger:
-
- GNU Emacs 18.57.1 on different platforms:
-
- DEC, MIPS 983040 Bytes (RISC)
- Sun4, SPARC 937984 Bytes (RISC)
-
- Sun3, 68020 860160 Bytes (CISC)
- DEC, Vax 720896 Bytes (complex CISC)
-
- - Wolfgang Meisl
-
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