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- From: mlelstv@specklec.mpifr-bonn.mpg.de (Michael van Elst)
- Subject: Re: CISC and RISC
- Message-ID: <1992Dec19.195436.11772@mpifr-bonn.mpg.de>
- Sender: news@mpifr-bonn.mpg.de
- Nntp-Posting-Host: specklec
- Organization: Max-Planck-Institut f"ur Radioastronomie
- References: <70436@cup.portal.com> <amipb.04wr@amipb.gna.org> <37844@cbmvax.commodore.com><Bz8FD1.Dxt@ns1.nodak.edu> <1992Dec14.155039.7747@ugle.unit.no><BzAxFw.Is6@dcs.ed.ac.uk> <BzBtx4.DLE@gpu.utcs.utoronto.ca><71809@cup.portal.com> <1992Dec16.185008.8536@bmerh85.bnr.ca> <71896@cup.portal.com>
- Date: Sat, 19 Dec 1992 19:54:36 GMT
- Lines: 19
-
- In <71896@cup.portal.com> Tony-Preston@cup.portal.com (ANTHONY FRANCIS PRESTON) writes:
- > So I have a RISC machine with a 80 Mhz clock that takes 125 ns to do the
- > operation(aproximately), and my 40 mhz 68040 which takes about 50 ns to
- > to the same operation. Why do I need a "faster" RISC processor when my
- > programs are 3 times bigger. Ok, this is a roughly contrived example, but
- > based on REAL WORLD programming experience, this is close to the general
- > case.
-
- Hardly a general case. You usually have more values in registers and most
- of the time you _really_ have to fetch data from memory you have to wait for
- slow memory. The shorter CISC code may still run as slow as the RISC code
- in your example.
-
- Regards,
- --
- Michael van Elst
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