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- Newsgroups: comp.os.msdos.programmer
- Path: sparky!uunet!cs.utexas.edu!torn!news.ccs.queensu.ca!mast.queensu.ca!dmurdoch
- From: dmurdoch@mast.queensu.ca (Duncan Murdoch)
- Subject: Re: Programmed delays when accessing the PIC
- Message-ID: <dmurdoch.358.724110625@mast.queensu.ca>
- Lines: 14
- Sender: news@knot.ccs.queensu.ca (Netnews control)
- Organization: Queen's University
- References: <1992Dec1.110004.1625@jet.uk> <1992Dec11.201424.16306@elroy.jpl.nasa.gov>
- Date: Fri, 11 Dec 1992 21:50:25 GMT
-
- In article <1992Dec11.201424.16306@elroy.jpl.nasa.gov> jack@robotics.jpl.nasa.gov (Jack Morrison) writes:
- >>This seems a bit arbitrary to me as the delays will have very
- >>different values when running on a 486 and an 8086 and I was wondering
- >>exactly what delay is actually required.
- >
- >It's not the time that matters, but the number of bus cycles; PCs
- >generally run at the same bus clock (8 MHz) regardless of CPU.
-
- But still, the delays will have very different values depending on the
- system. Won't a 486 be able to execute several jumps within a single bus
- cycle, since it loads the code from its internal cache?
-
- Duncan Murdoch
- dmurdoch@mast.queensu.ca
-