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/ NetNews Usenet Archive 1992 #30 / NN_1992_30.iso / spool / comp / lang / verilog / 476 < prev    next >
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Text File  |  1992-12-20  |  609 b   |  17 lines
  1. Newsgroups: comp.lang.verilog
  2. Path: sparky!uunet!spool.mu.edu!caen!tpham
  3. From: tpham@engin.umich.edu (Tony Pham)
  4. Subject: Verilog <--> VHDL translators
  5. Message-ID: <d+V=MG#@engin.umich.edu>
  6. Date: Thu, 17 Dec 92 21:46:18 EST
  7. Organization: University of Michigan Engineering, Ann Arbor
  8. Distribution: usa
  9. Nntp-Posting-Host: engine.engin.umich.edu
  10. Lines: 5
  11.  
  12. Does anyone know of any good verilog to vhdl or
  13. vhdl to verilog translators?  It would be quite
  14. helpful for my school work at this point.  Any available
  15. public domain tools would be a big plus since my budget
  16. is limited.  Appreciate any replies.  Thanks.
  17.