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- Xref: sparky comp.arch:11784 comp.arch.storage:874
- Path: sparky!uunet!haven.umd.edu!not-for-mail
- From: mike@cbl.umd.edu (Michael Santangelo)
- Newsgroups: comp.arch,comp.arch.storage
- Subject: Re: ?Concurrent DMA possible on smarter PC buses (EISA/MCA/Localbus)
- Date: 19 Dec 1992 03:06:15 -0500
- Organization: University of Maryland, Chesapeake Biological Laboratory
- Lines: 36
- Message-ID: <1gul5nINN7ln@cbl.umd.edu>
- References: <1gntdfINNu7@cbl.umd.edu> <1992Dec16.211712.13142@twisto.eng.hou.compaq.com> <1992Dec17.153141.3926@urbana.mcd.mot.com> <1992Dec17.191131.17701@twisto.eng.hou.compaq.com>
- NNTP-Posting-Host: cbl.umd.edu
- Keywords: EISA,MCA,Localbus,VESA,PC,IBM,smartIO
-
- In comp.arch you write:
-
- >mike@cbl.umd.edu (Michael Santangelo) writes:
-
- >>Can EISA, MicroChannel, or the new VESA LocalBus on PC's allow
- >>multiple controllers plugged into them (say two smart bus mastering
- >>SCSI disk controllers on one of these buses) xfer data simultaneously
- >>to main memory (DMA)?
- >Both EISA and MicroChannel support the concept of multiple preemptable
- >bus masters. In the case of EISA, the system DMA controller also behaves
- >like a bus master. EISA arbitrates round robin. MicroChannel arbitrates
- >priority-based, but degenerates to round-robin once the "fairness feature"
- >is turned on.
- >Therefore e.g. an SCSI controller and an FDDI network controller can
- >xfer data "simultaneously" to/from main memory on these buses. Of course
- >the bus is a shared medium, so the devices will "fight" for the bus
- >and share the available bandwidth with some of the bandwidth lost due to
- >the preemption/re-arbitration overhead.
-
- So this theoretical EISA SCSI controller and this theoretical EISA FDDI
- controller could both be doing DMA writes to main memory (interleaving their
- accesses I assume)? Since PC's do not have multiport memory, I assume
- the EISA subsystem would itself (on behalf of BOTH of these controllers) have
- full control over the memory during the dual transfers, starving out the CPU?
-
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- Michael F. Santangelo + Internet: mike@cbl.umd.edu
- Computer & Network Systems Director + mike@kavishar.umd.edu
- UMCEES / CBL (Solomons Island) + BITNET: MIKE@UMUC
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- --
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- Michael F. Santangelo + Internet: mike@cbl.umd.edu
- Computer & Network Systems Director + mike@kavishar.umd.edu
- UMCEES / CBL (Solomons Island) + BITNET: MIKE@UMUC
-