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- Path: sparky!uunet!caen!hellgate.utah.edu!cc.usu.edu!ivie
- From: ivie@cc.usu.edu (CP/M lives!)
- Newsgroups: comp.arch
- Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
- Message-ID: <1992Dec17.100528.62134@cc.usu.edu>
- Date: 17 Dec 92 10:05:28 MDT
- References: <1992Dec15.171554.2781@twisto.eng.hou.compaq.com> <1992Dec15.194637.10009@eng.umd.edu> <AJC.92Dec16112232@thendara.pa.dec.com> <1992Dec16.235011.17202@twisto.eng.hou.compaq.com>
- Organization: Utah State University
- Lines: 20
-
- In article <1992Dec16.235011.17202@twisto.eng.hou.compaq.com>, simonich@croatia.eng.hou.compaq.com (Chris Simonich) writes:
- > Very well put. However, wouldn't it be MUCH cheaper if you used a byte wide
- > interface instead of 32 bit wide interfaces? The same architecture with
- > the Compaq Proposal saves a lot of pins on the control block.
- > I don't know all that much about Tc, but I've been told that each channel
- > requires about 60ish pins on the controller once data, control, and power/
- > gnd pins are taken into account. The Compaq proposal requires 20ish pins
- > per channel on the controller. One could save 120 pins on the controller
- > for this case by using the Compaq Proposal rather than Tc. A 120 pin savings
- > translates into a significant cost savings.
-
- Well, working for a small company that can't afford to run out and spin
- ASICs for every design, I would much rather deal with a TURBOchannel that
- can be managed with a few PALs and jellybeans than a lower pin-count bus
- that requires an ASIC to unpack that packets.
- --
-
- Roger Ivie "My God! That computer is full of Pentium!
- ivie@cc.usu.edu It's a wonder that you haven't been turned
- into mutants!"
-