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- Newsgroups: comp.arch
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- From: lando@zycar.lmsc.com (Jim Landowski x45016)
- Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
- Message-ID: <1992Dec16.181236.15836@enterprise.rdd.lmsc.lockheed.com>
- Sender: news@enterprise.rdd.lmsc.lockheed.com
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- Reply-To: lando@aic.lockhhed.com
- References: <1992Dec15.171554.2781@twisto.eng.hou.compaq.com>
- Date: Wed, 16 Dec 92 18:12:36 GMT
- Lines: 36
-
- This bus concept is in the spirt of ATM (Asynchronous Transfer Mode)
- technology which I am very much in support of. ATM can be emensely
- flexible not only in periphrial support but also in direct network and
- multiprocessing support as well. SUN Micro's new highend
- server is based on an ATM type bus in support of parallel processing.
- I enthusiastically support this proposal as an end user and as an
- embedded systems builder. I need it and I need it cheap. Cheap comes
- with volume so the PC market is a great place to start.
-
- One suggestion or recommendation would be to not exclude from the design
- the hooks necessary for multiprocessing or direct interconnect between
- remote systems (i.e. distributed processing or periphrial sharing). Multi-
- CPU connect might be simply accomplished with dual or multiport IOC's as
- follows,
-
- CPU1 CPU2
- | |
- memory---| |---memory
- MIOC MIOC
- \ / \
- IOC dev3
- / \
- dev1 dev2
-
- The network could physically be the interconnect between an IOC and dev1 or
- MIOC and IOC. The only discriminant is the speed.
-
- My 2 cents. ;-)
-
- -------------------------------------------------------------------------------
- James G. Landowski ------- /\ | /
- Lockheed Research & Dev. ----- /__\ | |
- Palo Alto, CA. --- / \ | \
- lando@aic.lockheed.com
-
-
-