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- From: lindsay+@cs.cmu.edu (Donald Lindsay)
- Newsgroups: comp.arch
- Subject: Re: IBM's FIRST RISC System/6000(tm) based Shared Memory Parallel Processor
- Message-ID: <BzA8E4.4EJ.2@cs.cmu.edu>
- Date: 15 Dec 92 03:58:49 GMT
- Article-I.D.: cs.BzA8E4.4EJ.2
- References: <Bz0xLu.298v@austin.ibm.com> <1g86boINNh5m@fido.asd.sgi.com> <1992Dec13.134812.19905@super.org>
- Sender: news@cs.cmu.edu (Usenet News System)
- Organization: School of Computer Science, Carnegie Mellon
- Lines: 12
- Nntp-Posting-Host: gandalf.cs.cmu.edu
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-
- rminnich@super.org (Ronald G Minnich) writes:
- >Currently there are four RS6000s (980s ?), with 128 Mb each, with a crossbar,
- >and eight shared memory modules. First cut of the crossbar was done
- >with Xilinx; later cuts are custom.
-
- This sounds awfully like the Genesis project out of IBM Austin.
-
- Do they still broadcast the I/O interrupts? Did they ever build the
- test-and-set chip?
- --
- Don D.C.Lindsay Carnegie Mellon Computer Science
-