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  1. Path: sparky!uunet!think.com!sdd.hp.com!zaphod.mps.ohio-state.edu!usc!usc!not-for-mail
  2. From: lbarroso@pollux.usc.edu (Luiz Barroso)
  3. Newsgroups: comp.arch
  4. Subject: Re: IBM's FIRST RISC System/6000(tm) based Shared Memory Parallel Processor
  5. Date: 11 Dec 1992 13:49:35 -0800
  6. Organization: University of Southern California, Los Angeles, CA
  7. Lines: 20
  8. Message-ID: <1gb2dfINNspg@pollux.usc.edu>
  9. References: <Bz0xLu.298v@austin.ibm.com> <1g86boINNh5m@fido.asd.sgi.com> <lifvl6INNan3@exodus.Eng.Sun.COM>
  10. NNTP-Posting-Host: pollux.usc.edu
  11. Keywords: mp shared-memory parallel multiprocessor risc smp
  12.  
  13. David Chase - chased@rbbb.Eng.Sun.com - mentions the abstract of a
  14. recent seminar by an IBM person which includes:
  15.  
  16. >        Data Merging for Shared-Memory Multiprocessors
  17. > <stuff deleted>
  18. >shared data between synchronization points.  Our delayed consistency
  19.                                                   ******* ***********
  20. >mechanism allows arbitrary use of data blocks between synchronizations.
  21.  
  22. That "delayed consistency" looks very familiar to me. 
  23. You might want to take a look at the following paper published in 1991:
  24.  
  25. Michel Dubois et al., "Delayed Consistency and Its Effects on the Miss
  26. Rate of Parallel Programs", SUPERCOMPUTING'91, ACM/IEEE, Albuquerque.
  27.  
  28. It describes how consistency can be delayed, the hardware support necesssary,
  29. and shows how it can reduce the miss rate of parallel programs. 
  30.  
  31. --Luiz Barroso
  32.  
  33.