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- Path: sparky!uunet!utcsri!sys.toronto.edu!hsandhu
- Newsgroups: comp.arch
- From: hsandhu@sys.toronto.edu (Harjinder S Sandhu)
- Subject: Re: IBM's FIRST RISC System/6000(tm) based Shared Memory Parallel Processor
- Message-ID: <1992Dec11.131542.9190@jarvis.csri.toronto.edu>
- Keywords: mp shared-memory parallel multiprocessor risc smp
- References: <Bz0xLu.298v@austin.ibm.com> <1g86boINNh5m@fido.asd.sgi.com> <lifvl6INNan3@exodus.Eng.Sun.COM>
- Date: 11 Dec 92 18:15:42 GMT
- Lines: 28
-
- chased@rbbb.Eng.Sun.COM (David Chase) writes:
- >I've had this nagging suspicion for about a year that people building
- >MP's were working awfully hard to maintain coherency where it just
- >didn't matter. Given that most of the programming languages tell you
- >to lock your data if it is shared, the "we're guarding against this"
- >examples always looked like buggy programs to me. People have been
- >working on this at Rice, I know, and at least one other place that I
- >cannot recall right now.
-
- Along the same lines, we have implemented and experimented with
- a software coherence strategy based on the notion that applications
- explicitly lock/unlock shared data. It requires no hardware or
- compiler support, but does rely on the programmer to program "correctly".
- This is described in a paper that will be appearing in the 1993 ACM SigPlan
- Symposium on Principles and Practice of Parallel Programming in May:
- "The Shared Regions Approach to Software Cache Coherence on
- Multiprocessors". It will also be made available via ftp soon; send mail
- if you are interested.
-
- _harjinder
-
- --------------------------------------
- Harjinder hsandhu@cs.toronto.edu
- Computer Systems Research Institute
- University of Toronto
- --------------------------------------
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