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- From: isr@rodan.acs.syr.edu (Michael S. Schechter - ISR group account)
- Subject: Re: Another log on the si @ 25MHz fire...
- Message-ID: <1992Nov16.174204.7648@newstand.syr.edu>
- Organization: Syracuse University, Syracuse, NY
- References: <1992Nov15.025910.11784@news.columbia.edu>
- Date: Mon, 16 Nov 92 17:42:04 EST
- Lines: 14
-
- In article <1992Nov15.025910.11784@news.columbia.edu> spr@cunixb.cc.columbia.edu (Sebastian P Ruta) writes:
- >Though I have yet to bring my soldering iron anywhere near my
- >motherboard, I noticed this at work:
- >
- >-The DayStar Universal PowerCache 40MHz uses a 33MHz chip and a 40MHz
- >oscillator!!! (the chip is marked 68030xx33, the x's being some
- >letters that I forget right now...) The oscillator is marked as 40MHz
- >(why dont they need to double the speed of theirs?)
- .. 'soueg sni,ele stuff on the IIsi
- hmm, lets try that again...
- 'cause the Apple chips that need the fast timing aren't on DayStar board!!!
-
- 40 M PowerCache might have a 33M chip because THAT ONE PARTICULAR CHIP
- passed DayStar's 40M testing.. Note I said 'might'.
-