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- From: smb@afterlife.ncsc.mil (Steve M. Burinsky)
- Newsgroups: comp.lang.verilog
- Subject: Re: Avoiding inertial delay in delay lines
- Message-ID: <1992Nov16.045205.22453@afterlife.ncsc.mil>
- Date: 16 Nov 92 04:52:05 GMT
- References: <1992Nov12.053306.12799@afterlife.ncsc.mil> <1992Nov12.142615.10697@m.cs.uiuc.edu> <1992Nov12.163116.17205@dsg.tandem.com>
- Organization: The Great Beyond
- Lines: 16
-
- In article <1992Nov12.163116.17205@dsg.tandem.com> leung@DSG.Tandem.COM (Steven Leung) writes:
- >
- > a <= #10 b; /* transport delay */
- >
-
- I cannot see why a non-blocking assignment should operate any differently
- than a blocking assignment in terms of how events are scheduled. Thus,
- I expected that the above would not work. However, it does, as does
-
- #10 a <= b;
-
- I cannot see why this should work. Anyone have an explanation?
- --
-
- Steve M. Burinsky
- smb@afterlife.ncsc.mil
-