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  1. Newsgroups: comp.arch
  2. Path: sparky!uunet!zaphod.mps.ohio-state.edu!sdd.hp.com!hpscit.sc.hp.com!scd.hp.com!hpscdm!hplextra!rigel!kjchang
  3. From: kjchang@hplabsz.hpl.hp.com (K. J. Chang)
  4. Subject: Re: PA-RISC ``semantic loading'' (according to DEC)
  5. Message-ID: <1992Nov20.034738.3536@hplabsz.hpl.hp.com>
  6. Date: Fri, 20 Nov 1992 03:47:38 GMT
  7. References: <32580142@hpcuhe.cup.hp.com> <1992Nov19.140334.14589@vbohub.vbo.dec.com> <1992Nov19.204612.10316@odin.diku.dk>
  8. Organization: Hewlett-Packard Laboratories Palo Alto,CA
  9. Lines: 36
  10.  
  11. In article <1992Nov19.204612.10316@odin.diku.dk> thorinn@diku.dk (Lars Henrik Mathiesen) writes:
  12. 1st> I suspect
  13. 1st> that PA-RISC can get by with executing fewer instructions as well.
  14. 2nd> This is, in a nutshell, the CISC viewpoint.
  15. 3rd>Some might call it engineering. 
  16.  
  17. 1st>                  I was clearly describing the HP-PA architecture as
  18. 1st>being placed firmly within the RISC sphere, albeit in the less
  19. 1st>aggressively hardware-optimizable end.
  20. 1st>
  21. 1st>Rather than snide remarks, I had hoped to elicit informed comment as
  22. 1st>to how much the statefulness of the HP-PA programmers' model impacts
  23. 1st>(or can be assumed to impact) current and future implementations, in
  24. 1st>development time *and* in achievable speed for a given technology.
  25. 1st>
  26. 1st>Please?
  27.  
  28. Let me try.
  29.  
  30. First of all, I do not think I know both architecture and VLSI enough to call
  31. PA-RISC being in the "less aggressively hardware-optimizable end." However,
  32. I suspect that current PA-RISC is not too complex to design with the advent of
  33. the state-of-the-art logic/layout synthesis. Using advanced EDA tools, I think 
  34. it is possible to design a new RISC layout more complex than PA-RISC and 
  35. still achieve fast-time-to-market and price-competitive dies. People may have
  36. to use full/semi-custom design styles instead of gate-array though.
  37.  
  38. 1st>
  39. 1st>Lars Mathiesen (U of Copenhagen CS Dep)<thorinn@diku.dk> (Humour NOT marked)
  40.  
  41. KJ "Not a PA-RISC designer" Chang
  42. -- 
  43. K J Chang, Hewlett-Packard ICBD R & D,                      (())_-_(())
  44. Palo Alto, CA 94304                                          | (* *) | 
  45. Internet: kjchang@hpl.hp.com           a UCLA Bruin  -->    {  \_@_/  }
  46. voice mail: (415)857-4604                                     `-----'  
  47.