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- Path: sparky!uunet!cs.utexas.edu!usc!noiro.acs.uci.edu!venice.eng.uci.edu!jtien
- From: jtien@venice.eng.uci.edu (Joe Tien)
- Subject: Sparc assembly instructions
- Nntp-Posting-Host: venice.eng.uci.edu
- Message-ID: <2A6F6B4D.26797@noiro.acs.uci.edu>
- Newsgroups: comp.sys.sun.hardware
- Reply-To: jtien@venice.eng.uci.edu (Joe Tien)
- Organization: University of California, Irvine
- Lines: 18
- Date: 24 Jul 92 02:30:37 GMT
-
-
- Hello,
-
- Does anyone know how/where I can get information on the type/description of the
- IU, FPU and Coprocessor chips used in a Sparcstation IPC and SLC? I'm working
- on assembly level code and need to know exactly which instructions are implemented
- in hardware and which ones in software and what does each instruction do.
-
- Also, I'd appreciate some pointers on good Sparc assembly reference books. I know
- of the "Sparc Architecture Manual ver. 8" (it doesn't tell me what I need to know)
- and the "Sun-4 Assembly Language Reference Manual" (I"m still trying to get that
- from the library). Is there any other sources?
-
- You can post replies here or send email to: jtien@balboa.eng.uci.edu
-
- Thanks in advance.
-
- Joe Tien
-