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- Path: sparky!uunet!zaphod.mps.ohio-state.edu!magnus.acs.ohio-state.edu!usenet.ins.cwru.edu!eagle!pitacat.lerc.nasa.gov!steve
- From: steve@pitacat.lerc.nasa.gov (Steven H. Izen)
- Subject: Re: Memory upgrades for R4000 Indigos
- Message-ID: <1992Jul22.160210.9849@eagle.lerc.nasa.gov>
- Sender: news@eagle.lerc.nasa.gov
- Organization: Math Department, Case Western Reserve University
- References: <1992Jul17.204254.6599@microunity.com> <1992Jul21.004035.27345@donau.et.tudelft.nl> <1992Jul21.064111.1619@microunity.com>
- Date: Wed, 22 Jul 1992 16:02:10 GMT
- Lines: 17
-
- In article <1992Jul21.064111.1619@microunity.com>, jsw@microunity.com (Jeff Weinstein) writes:
-
- > Actually neither is true. The main problem with the r3k indigo was that
- > there just wasn't room on the CPU board to put the chips that did the
- > memory interleaving/control, so they had to go on the back of the simms.
- > It was definitely not a conspiracy on the part of SGI marketing to squeeze
- > more money out of customers. The engineers sincerely felt bad to have
- > to make that sort of engineering trade-off, and vowed never to do it
- > again. They have lived up to it in the new r4k indigo.
-
- This all makes sense for the inidgo, but does the same argument apply to the 4D/35 as well?
-
- --
- Steve Izen, Associate Prof. of Mathematics, Case Western Reserve University
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- V V __/ steve@pitacat.lerc.nasa.gov (Through 7/24/92)
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-