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- Path: sparky!uunet!usc!sol.ctr.columbia.edu!emory!tridom!tridom!mwr
- From: mwr@tridom.uucp (Mark Reardon)
- Newsgroups: comp.sys.m68k
- Subject: 68302 SCR's IPA Bit?
- Message-ID: <1992Jul27.144846.17750@tridom.com>
- Date: 27 Jul 92 14:48:46 GMT
- Sender: news@tridom.com
- Reply-To: mwr@tridom.uucp (Mark Reardon)
- Organization: AT&T Tridom; Marietta, Georgia
- Lines: 33
-
- In reading the 68302 manual I have a question, but first a little
- background. I am programming a 68302 running in slave mode to
- another 68302 (master). All six SCCs are active and I am attempting
- to program the master's IDMA channel from a PB11 interrupt on the
- slave. The slave's interrupts are executed at level three instead
- of four due to some external logic between the two 68302s. Now
- the question.
-
- I want the IDMA transfer to occur as the lowest priority function
- on the bus except for standard 68000 CPU functions. That is to
- say, all interrupt processing and SDMA will have priority over
- the IDMA. From looking at the manual, I have developed the
- following thought process. Set up the IDMA in the PB11 interrupt
- service routine and clear the IDMA bit of the ISR. All other
- interrupts also should clear their corresponding bits in the ISR
- when they are done. When the last bit of the ISR is cleared that
- corresponds with the bits set in the IMR, the IPA bit of the SCR
- will clear and allow the IDMA to execute.
-
- Any opinions? Should I use the Slave's IDMA instead (it is
- currently idle)?
-
- Thanks.
-
- --
- Mark
-
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- | Mark Reardon | AT&T Tridom |
- | mwr@eng.tridom.com | 840 Franklin Court |
- | | Marietta, GA 30067 |
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