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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!cs.utexas.edu!torn!newshost.uwo.ca!valve.heart.rri.uwo.ca!wlsmith
- From: wlsmith@valve.heart.rri.uwo.ca (Wayne Smith)
- Subject: Re: P5 Delayed 3 months
- Organization: The John P. Robarts Research Institute, London, Ontario
- Date: Thu, 23 Jul 1992 18:04:23 GMT
- Message-ID: <1992Jul23.180423.5209@julian.uwo.ca>
- References: <1992Jul23.150535.11014@pslu1.psl.wisc.edu>
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- Lines: 11
-
- In article <1992Jul23.150535.11014@pslu1.psl.wisc.edu> frigo@psl.wisc.edu writes:
- >I read in today's NY Times that Intel is delaying the introduction of its
- >P-5 chip until early 1993, instead of this fall.
- >Intel claims that the P5 will be more thoroughly debugged than the 486 was
- >at its introduction and will be available in large quantity at its intro-
- >duction, avoiding the "Osborne effect."
-
- The 486 had bugs, and there was no "Osborne effect" there.
- What's really happening is that, since AMD was forced to delay their
- introduction of a 486 'work-alike', Intel has more time to get the most
- money out of 486 production.
-