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- Newsgroups: comp.dcom.modems
- Path: sparky!uunet!rde!ksmith!keith
- From: keith@ksmith.uucp (Keith Smith)
- Subject: Re: Serial and Parallel interface ??????
- Organization: Keith's Computer, Hope Mills, NC
- Date: Thu, 23 Jul 92 01:17:59 GMT
- Message-ID: <1992Jul23.011759.14499@ksmith.uucp>
- References: <zgam_3l.wolfgang@netcom.com> <clemon.08gc@lemsys.UUCP> <1992Jul21.205557.29123@cc.ic.ac.uk>
- Lines: 76
-
- In article <1992Jul21.205557.29123@cc.ic.ac.uk> cmaae47@cc.ic.ac.uk writes:
- >Even mint condition 1981 PCs are able to transfer 250 kbit/s through a serial
- >line, bit serial, analog, via the floppy disk controller. So far I have only
- >seen one machine incapable of maintining flow control and timing on floppy
- >disk transfers, and that also only in very special conditions.
-
- Yup, If it has nothing else to do but concentrate on sending data via
- on-board dma, bringing everything else to a grinding halt it can do that
- rate FOR A SHORT PERIOD OF TIME. Simple fact of the matter is The 8250
- Serial I/O chip with a 1 in the Divisor Latch Sends at 115K Baud. The
- clock will not allow speeds any faster than this. PERIOD. Now assuming
- you don't have to READ the data from somewhere else first, and can just
- use your 4.77Mhz 8088 to pump data from RAM into the port with out
- instructions, You get about 41 clock cycles worth of CPU instructions
- per byte you desire to send:
-
- 1.8432Mhz / 16 = 115K
-
- therefore 4.77 / 1.8432 * 16 = 41.4 cpu cycles / byte at 115K baud
-
- >
- >It is just that serial (RS232) ports were perceived to be slow and in need of
- >very careful processing. Thus the OSes start creaking, sort of like anything
- >that tries to shovel tons of coal with an elaborate golden teaspoon.
-
- Nothing elaborate about it. It's simple math. You can very quickly run
- out of available clock cycles. Especially if you desire to do anything
- else, like write the information you are processing to disk.
-
- With a little more math and a small bit of reading you can find out that
- the AT bus runs at 8Mhz. Bytes are transferred 1 at a time (as opposed
- to 2 at a time to a 16bit controller) to a standard serial card. so:
-
- 8 / 1.8432 * 16 = 69.4 Bus cycles / byte
- 33 / 1.8432 * 16 = 286 CPU cycles / byte
-
- Now my assembly manual says an insb takes about 15 clocks on a 386 so as
- long as your 386 doesn't have a whole lot else to do your fine.
-
- An 8088 on the other hand has no such instruction. An in to a register
- is 10 clocks, and an out from register to memory indirect is 10 more.
- Then the increment to the indirect register takes 3 more. That's 23 of
- 41 available clock cycles on the venerable PC assuming no additional
- wait states on the bus. So as long as we don't have to turn around and
- write it to a disk in there and stay within a 64K segment we are good to
- go. Now we know why the floppy controller uses programmed DMA.
-
- Now for the poor soul who want's to transfer a 1M file from a 8088 XT/PC
- let me assure you you will not MAINTAIN anything CLOSE to 100K buad,
- even to a floppy disk. you just don't have the available CPU cycles.
-
- Lastly,
-
- If you desire to do something else the context switch time for an
- interrupt will immediately swamp an 8088. A simple register push on an
- 8088 takes 15 clocks. Assuming you are pushing 3 registers (AX, DS, DX)
- and loading DS,DX You you already have a receive buffer overrun at 115K
- before your done setting up for the in.
-
- On the 386 pushes take 3 clocks and pusha takes 18. this gives you
- enough time to set everything up and read, and go back to what you were
- doing before, with a about half of the cycles to spare. Unfortunately
- this will degrade response on a multi-tasking system, if an interrupt
- must be serviced for EVERY CHARACTER. Also, Nothing on the system can
- stall servicing of the interrupt for more than 400 or so clock cycles or
- you will overrun the input latch on the 16450/8250. That is why a '550
- chip with a 16 byte FIFO is so desireable. It doesn't interrupt until a
- FIFO level is reached (say 12 chars) so you get about 1200 clock cycles
- before you overrun a buffer at 115K, and the amount of time for the
- Context switch is is spread over 12-16 characters which can be PIO'd out
- with inb fairly rapidly. Still 115K interrupt driven is gonna really
- strain the system. 1200 clocks ain't THAT many instructions.
- --
- Keith Smith uunet!ksmith!keith 5719 Archer Rd.
- Digital Designs BBS 1-919-423-4216 Hope Mills, NC 28348-2201
- Somewhere in the Styx of North Carolina ...
-