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- From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879)
- Newsgroups: comp.arch
- Subject: Re: Cache Coherence
- Message-ID: <13292@ns-mx.uiowa.edu>
- Date: 23 Jul 92 16:31:50 GMT
- References: <1992Jul23.140423@riese.informatik.uni-frankfurt.de>
- Sender: news@ns-mx.uiowa.edu
- Lines: 42
-
- From article <1992Jul23.140423@riese.informatik.uni-frankfurt.de>,
- by feivel@riese.informatik.uni-frankfurt.de (Christine Gross):
- >
- > Can anybody give me information about caches and methods to get cache
- > coherence ?
-
- Plenty has been written, but here's an outline of the basic snoopy cache
- protocol:
-
- Consider a memory bus with two or more processors plugged into it. Each
- processor has a local write-through cache. This leads to incoherency.
- To fix the problem, additional logic is added to "snoop" on the bus. This
- logic listens to all write transitions from other bus clients, and if it
- detects a write to word X in memory, it invalidates any copy of word
- X in the local cache.
-
- Now, consider what happens when the following code executes on two
- processors on this machine:
-
- Process A Process B
-
- repeat stuff
- stuff flag = 1
- until flag = 1
-
- If the flag is initially 0 and neither process has a cached copy of the
- flag, and if Process A starts polling the flag before process B finishes
- doing other stuff, then process A will use one bus cycle to get a copy
- of the flag into its local cache, and then all further polling of flag
- will involve no more bus cycles until some process changes the value
- of flag. At that point, only one bus cycle is needed for Process A to
- find the new value.
-
- Thus, with this simple snooping cache protocol, busy waiting for a
- variable to change its value does not create memory contention.
-
- Commercial shared memory machines such as those made by Encore generally
- seem to have more interesting protocols than that described here, but
- they all seem to follow this spirit.
- Doug Jones
- jones@cs.uiowa.edu
- more int
-