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- From: daryl@hpcuhe.cup.hp.com (Daryl Odnert)
- Date: Tue, 21 Jul 1992 21:45:46 GMT
- Subject: Code Repositioning on MIPS Systems?
- Message-ID: <32580130@hpcuhe.cup.hp.com>
- Organization: Hewlett Packard, Cupertino
- Path: sparky!uunet!zaphod.mps.ohio-state.edu!sdd.hp.com!hpscdc!hplextra!hpcc05!hpcuhb!hpcuhe!daryl
- Newsgroups: comp.arch
- Lines: 12
-
- Could someone please send me or post a high level description of
- the profile-based optimization capabilities of the MIPS compilers/linker.
-
- For example, I believe the MIPS system can support code repositioning
- based on application profile measurements to reduce I-cache misses
- and branch penalties. Can someone verify this? Any pointers to
- published documentation on these optimizations would also be appreciated.
-
- Thanks,
- Daryl Odnert daryl@cup.hp.com
- Hewlett-Packard
- California Language Lab
-