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C/C++ Source or Header  |  2000-10-09  |  56KB  |  1,388 lines
  1. /*
  2. ** Starscream 680x0 emulation library
  3. ** Copyright 1997, 1998, 1999 Neill Corlett
  4. **
  5. ** Refer to STARDOC.TXT for terms of use, API reference, and directions on
  6. ** how to compile.
  7. */
  8.  
  9. #include <stdio.h>
  10. #include <stdlib.h>
  11. #include <string.h>
  12. #include <stdarg.h>
  13. #include <ctype.h>
  14. #include "starcpu.h"
  15. #include "core.h"
  16. //#include "cpudebug.h"
  17.  
  18. void (*cpudebug_get)(char*, int);
  19. void (*cpudebug_put)(const char*);
  20.  
  21. static void cpudebug_gets(char *s, int n) {
  22.     if(cpudebug_get) cpudebug_get(s, n);
  23.     else fgets(s, n, stdin);
  24. }
  25.  
  26. static void cpudebug_putc(char c) {
  27.     static char buffer[100];
  28.     static unsigned l = 0;
  29.     buffer[l++] = c;
  30.     if((c == '\n') || (l == (sizeof(buffer) - 1))) {
  31.         buffer[l] = 0;
  32.         if(cpudebug_put) cpudebug_put(buffer);
  33.         else fputs(buffer, stdout);
  34.         l = 0;
  35.     }
  36. }
  37.  
  38. static void cpudebug_printf(const char *fmt, ...) {
  39.     static char buffer[400];
  40.     char *s = buffer;
  41.     va_list ap;
  42.     va_start(ap, fmt);
  43.     vsprintf(s, fmt, ap);
  44.     va_end(ap);
  45.     while(*s) cpudebug_putc(*s++);
  46. }
  47.  
  48. #define byte unsigned char
  49. #define word unsigned short int
  50. #define dword unsigned int
  51.  
  52. #define int08 signed char
  53. #define int16 signed short int
  54. #define int32 signed int
  55.  
  56. int cpudebug_disabled(void){return 0;}
  57.  
  58. #define ea eacalc[inst&0x3F]()
  59.  
  60. /******************************
  61. ** SNAGS / EA CONSIDERATIONS **
  62. *******************************
  63.  
  64. - ADDX is encoded the same way as ADD->ea
  65. - SUBX is encoded the same way as SUB->ea
  66. - ABCD is encoded the same way as AND->ea
  67. - EXG is encoded the same way as AND->ea
  68. - SBCD is encoded the same way as OR->ea
  69. - EOR is encoded the same way as CMPM
  70. - ASR is encoded the same way as LSR
  71.   (so are LSL and ASL, but they do the same thing)
  72. - Bcc does NOT support 32-bit offsets on the 68000.
  73.   (this is a reminder, don't bother implementing 32-bit offsets!)
  74. - Look on p. 3-19 for how to calculate branch conditions (GE, LT, GT, etc.)
  75. - Bit operations are 32-bit for registers, 8-bit for memory locations.
  76. - MOVEM->memory is encoded the same way as EXT
  77.   If the EA is just a register, then it's EXT, otherwise it's MOVEM.
  78. - MOVEP done the same way as the bit operations
  79. - Scc done the same way as DBcc.
  80.   Assume it's Scc, unless the EA is a direct An mode (then it's a DBcc).
  81. - SWAP done the same way as PEA
  82. - TAS done the same way as ILLEGAL
  83.  
  84. - LINK, NOP, RTR, RTS, TRAP, TRAPV, UNLK are encoded the same way.
  85.  
  86. ******************************/
  87.  
  88. #define hex08 "%02X"
  89. #define hex16 "%04X"
  90. #define hex32 "%08X"
  91. #define hexlong "%06X"
  92.  
  93. #define isregister ((inst&0x0030)==0x0000)
  94. #define isaddressr ((inst&0x0038)==0x0008)
  95.  
  96. static char eabuffer[20],sdebug[80];
  97. dword debugpc,hexaddr;
  98. static int isize;
  99. static word inst;
  100.  
  101. static word fetch(void){
  102.     debugpc+=2;
  103.     isize+=2;
  104.     return(s68000fetch(debugpc-2)&0xFFFF);
  105. }
  106.  
  107. static dword fetchl(void){
  108.     dword t;
  109.     t=(s68000fetch(debugpc)&0xFFFF);
  110.     t<<=16;
  111.     t|=(s68000fetch(debugpc+2)&0xFFFF);
  112.     debugpc+=4;
  113.     isize+=4;
  114.     return t;
  115. }
  116.  
  117. static int08 opsize[1024]={
  118. 1,2,4,0,0,0,0,0,1,2,4,0,0,0,0,0,1,2,4,0,0,0,0,0,1,2,4,0,0,0,0,0,
  119. 0,0,0,0,0,0,0,0,1,2,4,0,0,0,0,0,1,2,4,0,0,0,0,0,0,0,0,0,0,0,0,0,
  120. 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
  121. 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
  122. 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  123. 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
  124. 2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
  125. 2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
  126. 1,2,4,2,0,0,2,4,1,2,4,1,0,0,2,4,1,2,4,1,0,0,2,4,1,2,4,2,0,0,2,4,
  127. 1,4,2,4,0,0,2,4,1,2,4,1,0,0,2,4,0,0,2,4,0,0,2,4,0,2,0,0,0,0,2,4,
  128. 1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,
  129. 1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,
  130. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
  131. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
  132. 4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,
  133. 4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,4,4,4,4,0,0,0,0,
  134. 1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,
  135. 1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,
  136. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  137. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  138. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
  139. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
  140. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  141. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  142. 1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,
  143. 1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,
  144. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  145. 1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,1,2,4,2,1,2,4,4,
  146. 1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,1,2,4,2,
  147. 1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,1,2,4,0,
  148. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
  149. 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
  150.  
  151. /******************** EA GENERATION ********************/
  152.  
  153. /* These are the functions to generate effective addresses.
  154.    Here is the syntax:
  155.  
  156.    eacalc[mode]();
  157.  
  158.    mode   is the EA mode << 3 + register number
  159.  
  160.    The function sets addr so you can use m68read and m68write.
  161.  
  162.    These routines screw around with the PC, and might call fetch() a couple
  163.    times to get extension words.  Place the eacalc() calls strategically to
  164.    get the extension words in the right order.
  165. */
  166.  
  167. /* These are the jump tables for EA calculation.
  168.    drd     = data reg direct                         Dn
  169.    ard     = address reg direct                      An
  170.    ari     = address reg indirect                   (An)
  171.    ari_inc = address reg indirect, postincrement    (An)+
  172.    ari_dec = address reg indirect, predecrement    -(An)
  173.    ari_dis = address reg indirect, displacement     (d16,An)
  174.    ari_ind = address reg indirect, index            (d8,An,Xn)
  175.    pci_dis = prog. counter indirect, displacement   (d16,PC)
  176.    pci_ind = prog. counter indirect, index          (d8,PC,Xn)
  177. */
  178.  
  179. #define eacalc_drd(n,r) static void n(void){sprintf(eabuffer,"d%d",r);}
  180. #define eacalc_ard(n,r) static void n(void){sprintf(eabuffer,"a%d",r);}
  181. #define eacalc_ari(n,r) static void n(void){sprintf(eabuffer,"(a%d)",r);}
  182. #define eacalc_ari_inc(n,r) static void n(void){sprintf(eabuffer,"(a%d)+",r);}
  183. #define eacalc_ari_dec(n,r) static void n(void){sprintf(eabuffer,"-(a%d)",r);}
  184. #define eacalc_ari_dis(n,r) static void n(void){\
  185.     int16 briefext=fetch();\
  186.     sprintf(eabuffer,"%c$" hex16 "(a%d)",(briefext<0)?'-':'+',(briefext<0)?-briefext:briefext,r);\
  187. }
  188. #define eacalc_ari_ind(n,r) static void n(void){\
  189.     int16 briefext=fetch();\
  190.     if(briefext<0)sprintf(eabuffer,"-$" hex08 "(a%d,%c%d.%c)",\
  191.         (int08)-briefext,r,\
  192.         briefext&0x8000?'a':'d',(briefext>>12)&7,\
  193.         briefext&0x800?'l':'w');\
  194.     else sprintf(eabuffer,"+$" hex08 "(a%d,%c%d.%c)",\
  195.         (int08)briefext,r,\
  196.         briefext&0x8000?'a':'d',(briefext>>12)&7,\
  197.         briefext&0x800?'l':'w');\
  198. }
  199. eacalc_drd(ea_0_0,0)
  200. eacalc_drd(ea_0_1,1)
  201. eacalc_drd(ea_0_2,2)
  202. eacalc_drd(ea_0_3,3)
  203. eacalc_drd(ea_0_4,4)
  204. eacalc_drd(ea_0_5,5)
  205. eacalc_drd(ea_0_6,6)
  206. eacalc_drd(ea_0_7,7)
  207. eacalc_ard(ea_1_0,0)
  208. eacalc_ard(ea_1_1,1)
  209. eacalc_ard(ea_1_2,2)
  210. eacalc_ard(ea_1_3,3)
  211. eacalc_ard(ea_1_4,4)
  212. eacalc_ard(ea_1_5,5)
  213. eacalc_ard(ea_1_6,6)
  214. eacalc_ard(ea_1_7,7)
  215. eacalc_ari(ea_2_0,0)
  216. eacalc_ari(ea_2_1,1)
  217. eacalc_ari(ea_2_2,2)
  218. eacalc_ari(ea_2_3,3)
  219. eacalc_ari(ea_2_4,4)
  220. eacalc_ari(ea_2_5,5)
  221. eacalc_ari(ea_2_6,6)
  222. eacalc_ari(ea_2_7,7)
  223. eacalc_ari_inc(ea_3_0,0)
  224. eacalc_ari_inc(ea_3_1,1)
  225. eacalc_ari_inc(ea_3_2,2)
  226. eacalc_ari_inc(ea_3_3,3)
  227. eacalc_ari_inc(ea_3_4,4)
  228. eacalc_ari_inc(ea_3_5,5)
  229. eacalc_ari_inc(ea_3_6,6)
  230. eacalc_ari_inc(ea_3_7,7)
  231. eacalc_ari_dec(ea_4_0,0)
  232. eacalc_ari_dec(ea_4_1,1)
  233. eacalc_ari_dec(ea_4_2,2)
  234. eacalc_ari_dec(ea_4_3,3)
  235. eacalc_ari_dec(ea_4_4,4)
  236. eacalc_ari_dec(ea_4_5,5)
  237. eacalc_ari_dec(ea_4_6,6)
  238. eacalc_ari_dec(ea_4_7,7)
  239. eacalc_ari_dis(ea_5_0,0)
  240. eacalc_ari_dis(ea_5_1,1)
  241. eacalc_ari_dis(ea_5_2,2)
  242. eacalc_ari_dis(ea_5_3,3)
  243. eacalc_ari_dis(ea_5_4,4)
  244. eacalc_ari_dis(ea_5_5,5)
  245. eacalc_ari_dis(ea_5_6,6)
  246. eacalc_ari_dis(ea_5_7,7)
  247. eacalc_ari_ind(ea_6_0,0)
  248. eacalc_ari_ind(ea_6_1,1)
  249. eacalc_ari_ind(ea_6_2,2)
  250. eacalc_ari_ind(ea_6_3,3)
  251. eacalc_ari_ind(ea_6_4,4)
  252. eacalc_ari_ind(ea_6_5,5)
  253. eacalc_ari_ind(ea_6_6,6)
  254. eacalc_ari_ind(ea_6_7,7)
  255.  
  256. /* These are the "special" addressing modes:
  257.    abshort    absolute short address
  258.    abslong    absolute long address
  259.    immdata    immediate data
  260. */
  261.  
  262. static void eacalcspecial_abshort(void){
  263.     word briefext;
  264.     briefext=fetch();
  265.     sprintf(eabuffer,"($" hex16 ")",briefext);
  266. }
  267.  
  268. static void eacalcspecial_abslong(void){
  269.     dword briefext;
  270.     briefext=fetch();
  271.     briefext<<=16;
  272.     briefext|=fetch();
  273.     sprintf(eabuffer,"($"hexlong")",briefext);
  274. }
  275.  
  276. static void eacalcspecial_immdata(void){
  277.     dword briefext;
  278.     switch(opsize[inst>>6]){
  279.         case 1:
  280.             briefext=fetch()&0xFF;
  281.             sprintf(eabuffer,"#$" hex08,briefext);
  282.             break;
  283.         case 2:
  284.             briefext=fetch();
  285.             sprintf(eabuffer,"#$" hex16,briefext);
  286.             break;
  287.         default:
  288.             briefext=fetch();
  289.             briefext<<=16;
  290.             briefext|=fetch();
  291.             sprintf(eabuffer,"#$" hex32,briefext);
  292.             break;
  293.     }
  294. }
  295.  
  296. static void eacalcspecial_pci_dis(void){
  297.     dword dpc = debugpc;
  298.     word briefext = fetch();
  299.     sprintf(eabuffer,"$" hexlong "(pc)",((int16)(briefext))+dpc);
  300. }
  301.  
  302. static void eacalcspecial_pci_ind(void){
  303.     dword dpc = debugpc;
  304.     word briefext = fetch();
  305.     sprintf(eabuffer,"$" hexlong "(pc,%c%d)",
  306.         ((int08)(briefext))+dpc,
  307.         briefext&0x8000?'a':'d',(briefext>>12)&7);
  308. }
  309.  
  310. static void eacalcspecial_unknown(void){
  311.     sprintf(eabuffer,"*** UNKNOWN EA MODE ***");
  312. }
  313.  
  314. static void (*(eacalc[64]))(void)={
  315. ea_0_0,ea_0_1,ea_0_2,ea_0_3,ea_0_4,ea_0_5,ea_0_6,ea_0_7,
  316. ea_1_0,ea_1_1,ea_1_2,ea_1_3,ea_1_4,ea_1_5,ea_1_6,ea_1_7,
  317. ea_2_0,ea_2_1,ea_2_2,ea_2_3,ea_2_4,ea_2_5,ea_2_6,ea_2_7,
  318. ea_3_0,ea_3_1,ea_3_2,ea_3_3,ea_3_4,ea_3_5,ea_3_6,ea_3_7,
  319. ea_4_0,ea_4_1,ea_4_2,ea_4_3,ea_4_4,ea_4_5,ea_4_6,ea_4_7,
  320. ea_5_0,ea_5_1,ea_5_2,ea_5_3,ea_5_4,ea_5_5,ea_5_6,ea_5_7,
  321. ea_6_0,ea_6_1,ea_6_2,ea_6_3,ea_6_4,ea_6_5,ea_6_6,ea_6_7,
  322. eacalcspecial_abshort,eacalcspecial_abslong,eacalcspecial_pci_dis,eacalcspecial_pci_ind,
  323. eacalcspecial_immdata,eacalcspecial_unknown,eacalcspecial_unknown,eacalcspecial_unknown};
  324.  
  325. static void m68unsupported(void){
  326.     sprintf(sdebug,"*** NOT RECOGNIZED ***");
  327. }
  328.  
  329. static void m68_unrecog_x(void){
  330.     sprintf(sdebug,"unrecognized");
  331. }
  332.  
  333. /******************** BIT TEST-AND-____ ********************/
  334.  
  335. static void m68_bitopdn_x(void){
  336.     int16 d16;
  337.     if((inst&0x38)==0x08){
  338.         d16=fetch();
  339.         sprintf(eabuffer,"%c$" hex16 "(a%d)",(d16<0)?'-':'+',(d16<0)?-d16:d16,inst&7);
  340.         if(!(inst&0x80)){
  341.             sprintf(sdebug,"movep%s %s,d%d",
  342.                 ((inst&0x40)==0x40)?".l":"  ",
  343.                 eabuffer,inst>>9
  344.             );
  345.         }else{
  346.             sprintf(sdebug,"movep%s d%d,%s",
  347.                 ((inst&0x40)==0x40)?".l":"  ",
  348.                 inst>>9,eabuffer
  349.             );
  350.         }
  351.     }else{
  352.         ea;
  353.         switch((inst>>6)&3){
  354.         case 0:sprintf(sdebug,"btst    d%d,%s",inst>>9,eabuffer);break;
  355.         case 1:sprintf(sdebug,"bchg    d%d,%s",inst>>9,eabuffer);break;
  356.         case 2:sprintf(sdebug,"bclr    d%d,%s",inst>>9,eabuffer);break;
  357.         case 3:sprintf(sdebug,"bset    d%d,%s",inst>>9,eabuffer);break;
  358.         default:break;
  359.         }
  360.     }
  361. }
  362.  
  363. #define bittest_st(name,dump) static void name(void){\
  364.     byte shiftby=(fetch()&0xFF);\
  365.     ea;sprintf(sdebug,"%s    #$"hex08",%s",dump,shiftby,eabuffer);\
  366. }
  367.  
  368. bittest_st(m68_btst_st_x,"btst")
  369. bittest_st(m68_bclr_st_x,"bclr")
  370. bittest_st(m68_bset_st_x,"bset")
  371. bittest_st(m68_bchg_st_x,"bchg")
  372.  
  373. /******************** Bcc ********************/
  374.  
  375. #define conditional_branch(name,dump) static void name(void){\
  376.     int16 disp;\
  377.     int32 currentpc=debugpc;\
  378.     disp=(int08)(inst&0xFF);\
  379.     if(!disp)disp=fetch();\
  380.     sprintf(sdebug,"%s     ($"hexlong")",dump,currentpc+disp);\
  381. }
  382.  
  383. conditional_branch(m68_bra_____x,"bra")
  384. conditional_branch(m68_bhi_____x,"bhi")
  385. conditional_branch(m68_bls_____x,"bls")
  386. conditional_branch(m68_bcc_____x,"bcc")
  387. conditional_branch(m68_bcs_____x,"bcs")
  388. conditional_branch(m68_bne_____x,"bne")
  389. conditional_branch(m68_beq_____x,"beq")
  390. conditional_branch(m68_bvc_____x,"bvc")
  391. conditional_branch(m68_bvs_____x,"bvs")
  392. conditional_branch(m68_bpl_____x,"bpl")
  393. conditional_branch(m68_bmi_____x,"bmi")
  394. conditional_branch(m68_bge_____x,"bge")
  395. conditional_branch(m68_blt_____x,"blt")
  396. conditional_branch(m68_bgt_____x,"bgt")
  397. conditional_branch(m68_ble_____x,"ble")
  398.  
  399. /******************** Scc, DBcc ********************/
  400.  
  401. #define scc_dbcc(name,dump1,dump2)\
  402. static void name(void){\
  403.     ea;if(isaddressr){\
  404.         int16 disp;\
  405.         disp=fetch();\
  406.         sprintf(sdebug,"%s    d%d,($"hexlong")",dump2,inst&7,debugpc+disp-2);\
  407.     }else sprintf(sdebug,"%s     %s",dump1,eabuffer);\
  408. }
  409.  
  410. scc_dbcc(m68_st______x,"st ","dbt ")
  411. scc_dbcc(m68_sf______x,"sf ","dbra")
  412. scc_dbcc(m68_shi_____x,"shi","dbhi")
  413. scc_dbcc(m68_sls_____x,"sls","dbls")
  414. scc_dbcc(m68_scc_____x,"scc","dbcc")
  415. scc_dbcc(m68_scs_____x,"scs","dbcs")
  416. scc_dbcc(m68_sne_____x,"sne","dbne")
  417. scc_dbcc(m68_seq_____x,"seq","dbeq")
  418. scc_dbcc(m68_svc_____x,"svc","dbvc")
  419. scc_dbcc(m68_svs_____x,"svs","dbvs")
  420. scc_dbcc(m68_spl_____x,"spl","dbpl")
  421. scc_dbcc(m68_smi_____x,"smi","dbmi")
  422. scc_dbcc(m68_sge_____x,"sge","dbge")
  423. scc_dbcc(m68_slt_____x,"slt","dblt")
  424. scc_dbcc(m68_sgt_____x,"sgt","dbgt")
  425. scc_dbcc(m68_sle_____x,"sle","dble")
  426.  
  427. /******************** JMP ********************/
  428.  
  429. static void m68_jmp_____x(void){ea;sprintf(sdebug,"jmp     %s",eabuffer);}
  430.  
  431. /******************** JSR/BSR ********************/
  432.  
  433. static void m68_jsr_____x(void){ea;sprintf(sdebug,"jsr     %s",eabuffer);}
  434.  
  435. static void m68_bsr_____x(void){
  436.     int16 disp;
  437.     int32 currentpc=debugpc;
  438.     disp=(int08)(inst&0xFF);
  439.     if(!disp)disp=fetch();
  440.     sprintf(sdebug,"%s     ($"hexlong")","bsr",disp+currentpc);
  441. }
  442.  
  443. /******************** TAS ********************/
  444.  
  445. /* Test-and-set / illegal */
  446. static void m68_tas_____b(void){
  447.     if(inst==0x4AFC){
  448.         sprintf(sdebug,"illegal");
  449.     }else{
  450.         ea;
  451.         sprintf(sdebug,"tas     %s",eabuffer);
  452.     }
  453. }
  454.  
  455. /******************** LEA ********************/
  456.  
  457. static void m68_lea___n_l(void){
  458.     ea;sprintf(sdebug,"lea     %s,a%d",eabuffer,(inst>>9)&7);
  459. }
  460.  
  461. /******************** PEA ********************/
  462.  
  463. static void m68_pea_____l(void){
  464.     ea;if(isregister){/* SWAP Dn */
  465.         sprintf(sdebug,"swap    d%d",inst&7);
  466.     }else{
  467.         sprintf(sdebug,"pea     %s",eabuffer);
  468.     }
  469. }
  470.  
  471. /******************** CLR, NEG, NEGX, NOT, TST ********************/
  472.  
  473. #define negate_ea(name,dump) static void name(void){\
  474.     ea;sprintf(sdebug,"%s  %s",dump,eabuffer);\
  475. }
  476.  
  477. negate_ea(m68_neg_____b,"neg.b ")
  478. negate_ea(m68_neg_____w,"neg   ")
  479. negate_ea(m68_neg_____l,"neg.l ")
  480. negate_ea(m68_negx____b,"negx.b")
  481. negate_ea(m68_negx____w,"negx  ")
  482. negate_ea(m68_negx____l,"negx.l")
  483. negate_ea(m68_not_____b,"not.b ")
  484. negate_ea(m68_not_____w,"not   ")
  485. negate_ea(m68_not_____l,"not.l ")
  486. negate_ea(m68_clr_____b,"clr.b ")
  487. negate_ea(m68_clr_____w,"clr   ")
  488. negate_ea(m68_clr_____l,"clr.l ")
  489. negate_ea(m68_tst_____b,"tst.b ")
  490. negate_ea(m68_tst_____w,"tst   ")
  491. negate_ea(m68_tst_____l,"tst.l ")
  492.  
  493. /********************      SOURCE: IMMEDIATE DATA
  494. ********************* DESTINATION: EFFECTIVE ADDRESS
  495. ********************/
  496.  
  497. #define im_to_ea(name,type,hextype,fetchtype,dump,r) static void name(void){\
  498.     type src=(type)fetchtype();\
  499.     if((inst&0x3F)==0x3C){\
  500.     sprintf(sdebug,"%s   #$"hextype",%s",dump,src,r);\
  501.     }else{\
  502.     ea;sprintf(sdebug,"%s   #$"hextype",%s",dump,src,eabuffer);\
  503.     }\
  504. }
  505.  
  506. im_to_ea(m68_ori_____b,byte ,hex08,fetch ,"or.b ","ccr")
  507. im_to_ea(m68_ori_____w,word ,hex16,fetch ,"or   ","sr" )
  508. im_to_ea(m68_ori_____l,dword,hex32,fetchl,"or.l ",""   )
  509. im_to_ea(m68_andi____b,byte ,hex08,fetch ,"and.b","ccr")
  510. im_to_ea(m68_andi____w,word ,hex16,fetch ,"and  ","sr" )
  511. im_to_ea(m68_andi____l,dword,hex32,fetchl,"and.l",""   )
  512. im_to_ea(m68_eori____b,byte ,hex08,fetch ,"eor.b","ccr")
  513. im_to_ea(m68_eori____w,word ,hex16,fetch ,"eor  ","sr" )
  514. im_to_ea(m68_eori____l,dword,hex32,fetchl,"eor.l",""   )
  515. im_to_ea(m68_addi____b,byte ,hex08,fetch ,"add.b",""   )
  516. im_to_ea(m68_addi____w,word ,hex16,fetch ,"add  ",""   )
  517. im_to_ea(m68_addi____l,dword,hex32,fetchl,"add.l",""   )
  518. im_to_ea(m68_subi____b,byte ,hex08,fetch ,"sub.b",""   )
  519. im_to_ea(m68_subi____w,word ,hex16,fetch ,"sub  ",""   )
  520. im_to_ea(m68_subi____l,dword,hex32,fetchl,"sub.l",""   )
  521. im_to_ea(m68_cmpi____b,byte ,hex08,fetch ,"cmp.b",""   )
  522. im_to_ea(m68_cmpi____w,word ,hex16,fetch ,"cmp  ",""   )
  523. im_to_ea(m68_cmpi____l,dword,hex32,fetchl,"cmp.l",""   )
  524.  
  525. /********************      SOURCE: EFFECTIVE ADDRESS
  526. ********************* DESTINATION: DATA REGISTER
  527. ********************/
  528.  
  529. #define ea_to_dn(name,dump) static void name(void){\
  530.     ea;sprintf(sdebug,"%s   %s,d%d",dump,eabuffer,(inst>>9)&7);\
  531. }
  532.  
  533. ea_to_dn(m68_or__d_n_b,"or.b ")
  534. ea_to_dn(m68_or__d_n_w,"or   ")
  535. ea_to_dn(m68_or__d_n_l,"or.l ")
  536. ea_to_dn(m68_and_d_n_b,"and.b")
  537. ea_to_dn(m68_and_d_n_w,"and  ")
  538. ea_to_dn(m68_and_d_n_l,"and.l")
  539. ea_to_dn(m68_add_d_n_b,"add.b")
  540. ea_to_dn(m68_add_d_n_w,"add  ")
  541. ea_to_dn(m68_add_d_n_l,"add.l")
  542. ea_to_dn(m68_sub_d_n_b,"sub.b")
  543. ea_to_dn(m68_sub_d_n_w,"sub  ")
  544. ea_to_dn(m68_sub_d_n_l,"sub.l")
  545. ea_to_dn(m68_cmp_d_n_b,"cmp.b")
  546. ea_to_dn(m68_cmp_d_n_w,"cmp  ")
  547. ea_to_dn(m68_cmp_d_n_l,"cmp.l")
  548.  
  549. /********************      SOURCE: EFFECTIVE ADDRESS
  550. ********************* DESTINATION: ADDRESS REGISTER
  551. ********************/
  552.  
  553. #define ea_to_an(name,dump) static void name(void){\
  554.     ea;sprintf(sdebug,"%s   %s,a%d",dump,eabuffer,((inst>>9)&7));\
  555. }
  556.  
  557. ea_to_an(m68_adda__n_w,"add  ")
  558. ea_to_an(m68_adda__n_l,"add.l")
  559. ea_to_an(m68_suba__n_w,"sub  ")
  560. ea_to_an(m68_suba__n_l,"sub.l")
  561. ea_to_an(m68_cmpa__n_w,"cmp  ")
  562. ea_to_an(m68_cmpa__n_l,"cmp.l")
  563.  
  564. /******************** SUPPORT ROUTINE:  ADDX AND SUBX
  565. ********************/
  566.  
  567. #define support_addsubx(name,dump)\
  568. static void name(void){\
  569.     word nregx=(inst>>9)&7,nregy=inst&7;\
  570.     if(inst&0x0008)sprintf(sdebug,"%s  -(a%d),-(a%d)",dump,nregy,nregx);\
  571.     else sprintf(sdebug,"%s  d%d,d%d",dump,nregy,nregx);\
  572. }
  573.  
  574. support_addsubx(m68support_addx_b,"addx.b")
  575. support_addsubx(m68support_addx_w,"addx  ")
  576. support_addsubx(m68support_addx_l,"addx.l")
  577. support_addsubx(m68support_subx_b,"subx.b")
  578. support_addsubx(m68support_subx_w,"subx  ")
  579. support_addsubx(m68support_subx_l,"subx.l")
  580.  
  581. #define support_bcd(name,dump)\
  582. static void name(void){\
  583.     word nregx=(inst>>9)&7,nregy=inst&7;\
  584.     if(inst&0x0008)sprintf(sdebug,"%s    -(a%d),-(a%d)",dump,nregy,nregx);\
  585.     else sprintf(sdebug,"%s  d%d,d%d",dump,nregy,nregx);\
  586. }
  587.  
  588. support_bcd(m68support_abcd,"abcd")
  589. support_bcd(m68support_sbcd,"sbcd")
  590.  
  591. /******************** SUPPORT ROUTINE:  CMPM
  592. ********************/
  593.  
  594. #define support_cmpm(name,dump) static void name(void){\
  595.     sprintf(sdebug,"%s   (a%d)+,(a%d)+",dump,inst&7,(inst>>9)&7);\
  596. }
  597.  
  598. support_cmpm(m68support_cmpm_b,"cmp.b")
  599. support_cmpm(m68support_cmpm_w,"cmp  ")
  600. support_cmpm(m68support_cmpm_l,"cmp.l")
  601.  
  602. /******************** SUPPORT ROUTINE:  EXG
  603. ********************/
  604.  
  605. static void m68support_exg_same(void){
  606.     dword rx;
  607.     rx=(inst&8)|((inst>>9)&7);
  608.     sprintf(sdebug,"exg     %c%d,%c%d",
  609.         rx&8?'a':'d',rx&7,inst&8?'a':'d',inst&7);
  610. }
  611.  
  612. static void m68support_exg_diff(void){
  613.     sprintf(sdebug,"exg     d%d,a%d",(inst>>9)&7,inst&7);
  614. }
  615.  
  616. /********************      SOURCE: DATA REGISTER
  617. ********************* DESTINATION: EFFECTIVE ADDRESS
  618. *********************
  619. ********************* calls a support routine if EA is a register
  620. ********************/
  621.  
  622. #define dn_to_ea(name,dump,s_cond,s_routine)\
  623. static void name(void){\
  624.     ea;if(s_cond)s_routine();\
  625.     else sprintf(sdebug,"%s   d%d,%s",dump,(inst>>9)&7,eabuffer);\
  626. }
  627.  
  628. dn_to_ea(m68_add_e_n_b,"add.b",isregister,m68support_addx_b)
  629. dn_to_ea(m68_add_e_n_w,"add  ",isregister,m68support_addx_w)
  630. dn_to_ea(m68_add_e_n_l,"add.l",isregister,m68support_addx_l)
  631. dn_to_ea(m68_sub_e_n_b,"sub.b",isregister,m68support_subx_b)
  632. dn_to_ea(m68_sub_e_n_w,"sub  ",isregister,m68support_subx_w)
  633. dn_to_ea(m68_sub_e_n_l,"sub.l",isregister,m68support_subx_l)
  634. dn_to_ea(m68_eor_e_n_b,"eor.b",isaddressr,m68support_cmpm_b)
  635. dn_to_ea(m68_eor_e_n_w,"eor  ",isaddressr,m68support_cmpm_w)
  636. dn_to_ea(m68_eor_e_n_l,"eor.l",isaddressr,m68support_cmpm_l)
  637. dn_to_ea(m68_or__e_n_b,"or.b ",isregister,m68support_sbcd)
  638. dn_to_ea(m68_or__e_n_w,"or   ",isregister,m68unsupported)
  639. dn_to_ea(m68_or__e_n_l,"or.l ",isregister,m68unsupported)
  640. dn_to_ea(m68_and_e_n_b,"and.b",isregister,m68support_abcd)
  641. dn_to_ea(m68_and_e_n_w,"and  ",isregister,m68support_exg_same)
  642. dn_to_ea(m68_and_e_n_l,"and.l",isaddressr,m68support_exg_diff)
  643.  
  644. /********************      SOURCE: QUICK DATA
  645. ********************* DESTINATION: EFFECTIVE ADDRESS
  646. ********************/
  647.  
  648. #define qn_to_ea(name,dump1) static void name(void){\
  649.     ea;sprintf(sdebug,"%s   #%d,%s",dump1,(((inst>>9)&7)==0)?8:(inst>>9)&7,eabuffer);\
  650. }
  651.  
  652. qn_to_ea(m68_addq__n_b,"add.b")
  653. qn_to_ea(m68_addq__n_w,"add  ")
  654. qn_to_ea(m68_addq__n_l,"add.l")
  655. qn_to_ea(m68_subq__n_b,"sub.b")
  656. qn_to_ea(m68_subq__n_w,"sub  ")
  657. qn_to_ea(m68_subq__n_l,"sub.l")
  658.  
  659. /********************      SOURCE: QUICK DATA
  660. ********************* DESTINATION: DATA REGISTER
  661. ********************/
  662. /* MOVEQ is the only instruction that uses this form */
  663.  
  664. static void m68_moveq_n_l(void){
  665.     sprintf(sdebug,"moveq   #$"hex08",d%d",inst&0xFF,(inst>>9)&7);
  666. }
  667.  
  668. /********************      SOURCE: EFFECTIVE ADDRESS
  669. ********************* DESTINATION: EFFECTIVE ADDRESS
  670. ********************/
  671. /* MOVE is the only instruction that uses this form */
  672.  
  673. #define ea_to_ea(name,dump) static void name(void){\
  674.     char tmpbuf[40];\
  675.     ea;strcpy(tmpbuf,eabuffer);\
  676.     eacalc[((((inst>>3)&(7<<3)))|((inst>>9)&7))]();\
  677.     sprintf(sdebug,"%s  %s,%s",dump,tmpbuf,eabuffer);\
  678. }
  679.  
  680. ea_to_ea(m68_move____b,"move.b")
  681. ea_to_ea(m68_move____w,"move  ")
  682. ea_to_ea(m68_move____l,"move.l")
  683.  
  684. /******************** MOVEM, EXT
  685. ********************/
  686.  
  687. static void getreglistf(word mask,char*rl){
  688.     if(mask&0x0001){*(rl++)='d';*(rl++)='0';*(rl++)='/';}
  689.     if(mask&0x0002){*(rl++)='d';*(rl++)='1';*(rl++)='/';}
  690.     if(mask&0x0004){*(rl++)='d';*(rl++)='2';*(rl++)='/';}
  691.     if(mask&0x0008){*(rl++)='d';*(rl++)='3';*(rl++)='/';}
  692.     if(mask&0x0010){*(rl++)='d';*(rl++)='4';*(rl++)='/';}
  693.     if(mask&0x0020){*(rl++)='d';*(rl++)='5';*(rl++)='/';}
  694.     if(mask&0x0040){*(rl++)='d';*(rl++)='6';*(rl++)='/';}
  695.     if(mask&0x0080){*(rl++)='d';*(rl++)='7';*(rl++)='/';}
  696.     if(mask&0x0100){*(rl++)='a';*(rl++)='0';*(rl++)='/';}
  697.     if(mask&0x0200){*(rl++)='a';*(rl++)='1';*(rl++)='/';}
  698.     if(mask&0x0400){*(rl++)='a';*(rl++)='2';*(rl++)='/';}
  699.     if(mask&0x0800){*(rl++)='a';*(rl++)='3';*(rl++)='/';}
  700.     if(mask&0x1000){*(rl++)='a';*(rl++)='4';*(rl++)='/';}
  701.     if(mask&0x2000){*(rl++)='a';*(rl++)='5';*(rl++)='/';}
  702.     if(mask&0x4000){*(rl++)='a';*(rl++)='6';*(rl++)='/';}
  703.     if(mask&0x8000){*(rl++)='a';*(rl++)='7';*(rl++)='/';}
  704.     *(--rl)=0;
  705. }
  706.  
  707. static void getreglistb(word mask,char*rl){
  708.     if(mask&0x0001){*(rl++)='a';*(rl++)='7';*(rl++)='/';}
  709.     if(mask&0x0002){*(rl++)='a';*(rl++)='6';*(rl++)='/';}
  710.     if(mask&0x0004){*(rl++)='a';*(rl++)='5';*(rl++)='/';}
  711.     if(mask&0x0008){*(rl++)='a';*(rl++)='4';*(rl++)='/';}
  712.     if(mask&0x0010){*(rl++)='a';*(rl++)='3';*(rl++)='/';}
  713.     if(mask&0x0020){*(rl++)='a';*(rl++)='2';*(rl++)='/';}
  714.     if(mask&0x0040){*(rl++)='a';*(rl++)='1';*(rl++)='/';}
  715.     if(mask&0x0080){*(rl++)='a';*(rl++)='0';*(rl++)='/';}
  716.     if(mask&0x0100){*(rl++)='d';*(rl++)='7';*(rl++)='/';}
  717.     if(mask&0x0200){*(rl++)='d';*(rl++)='6';*(rl++)='/';}
  718.     if(mask&0x0400){*(rl++)='d';*(rl++)='5';*(rl++)='/';}
  719.     if(mask&0x0800){*(rl++)='d';*(rl++)='4';*(rl++)='/';}
  720.     if(mask&0x1000){*(rl++)='d';*(rl++)='3';*(rl++)='/';}
  721.     if(mask&0x2000){*(rl++)='d';*(rl++)='2';*(rl++)='/';}
  722.     if(mask&0x4000){*(rl++)='d';*(rl++)='1';*(rl++)='/';}
  723.     if(mask&0x8000){*(rl++)='d';*(rl++)='0';*(rl++)='/';}
  724.     *(--rl)=0;
  725. }
  726.  
  727. #define movem_mem(name,dumpm,dumpx)\
  728. static void name(void){\
  729.     word regmask;\
  730.     char reglist[50];\
  731.     if((inst&0x38)==0x0000){ /* ext */\
  732.         sprintf(sdebug,dumpx"d%d",inst&7);\
  733.     }else if((inst&0x38)==0x0020){ /* predecrement addressing mode */\
  734.         regmask=fetch();\
  735.         getreglistb(regmask,reglist);\
  736.         sprintf(sdebug,dumpm"%s,-(a%d)",reglist,inst&7);\
  737.     }else{\
  738.         regmask=fetch();\
  739.         ea;getreglistf(regmask,reglist);\
  740.         sprintf(sdebug,dumpm "%s,%s",reglist,eabuffer);\
  741.     }\
  742. }
  743.  
  744. movem_mem(m68_movem___w,"movem   ","ext     ")
  745. movem_mem(m68_movem___l,"movem.l ","ext.l   ")
  746.  
  747. #define movem_reg(name,dump) static void name(void){\
  748.     word regmask;\
  749.     char reglist[50];\
  750.     regmask=fetch();\
  751.     ea;getreglistf(regmask,reglist);\
  752.     sprintf(sdebug,dump "%s,%s",eabuffer,reglist);\
  753. }
  754.  
  755. movem_reg(m68_movem_r_w,"movem   ")
  756. movem_reg(m68_movem_r_l,"movem.l ")
  757.  
  758. /******************** INSTRUCTIONS THAT INVOLVE SR/CCR ********************/
  759.  
  760. static void m68_move2sr_w(void){ea;sprintf(sdebug,"move    %s,sr",eabuffer);}
  761. static void m68_movefsr_w(void){ea;sprintf(sdebug,"move    sr,%s",eabuffer);}
  762. static void m68_move2cc_w(void){ea;sprintf(sdebug,"move.b  %s,ccr",eabuffer);}
  763. static void m68_movefcc_w(void){ea;sprintf(sdebug,"move.b  ccr,%s",eabuffer);}
  764.  
  765. static void m68_rts_____x(void){sprintf(sdebug,"rts");}
  766.  
  767. /******************** SHIFTS AND ROTATES ********************/
  768.  
  769. #define regshift(name,sizedump) \
  770. static void name(void){\
  771.     char tmpbuf[10];\
  772.     if((inst&0x20)==0)sprintf(tmpbuf,"#$"hex08",d%d",(((inst>>9)&7)==0)?8:(inst>>9)&7,inst&7);\
  773.     else sprintf(tmpbuf,"d%d,d%d",(inst>>9)&7,inst&7);\
  774.     switch(inst&0x18){\
  775.         case 0x00:sprintf(sdebug,"as%s   %s",sizedump,tmpbuf);break;\
  776.         case 0x08:sprintf(sdebug,"ls%s   %s",sizedump,tmpbuf);break;\
  777.         case 0x10:sprintf(sdebug,"rox%s  %s",sizedump,tmpbuf);break;\
  778.         case 0x18:sprintf(sdebug,"ro%s   %s",sizedump,tmpbuf);break;\
  779.     }\
  780. }
  781.  
  782. regshift(m68_shl_r_n_b,"l.b")
  783. regshift(m68_shl_r_n_w,"l  ")
  784. regshift(m68_shl_r_n_l,"l.l")
  785. regshift(m68_shr_r_n_b,"r.b")
  786. regshift(m68_shr_r_n_w,"r  ")
  787. regshift(m68_shr_r_n_l,"r.l")
  788.  
  789. /******************** NOP ********************/
  790.  
  791. static void m68_nop_____x(void){sprintf(sdebug,"nop");}
  792.  
  793. /******************** LINK / UNLINK ********************/
  794.  
  795. static void m68_link_an_w(void){
  796.     int16 briefext=fetch();
  797.     sprintf(sdebug,"link    a%d,%c#$"hex16,inst&7,briefext<0?'-':'+',
  798.         briefext<0?-briefext:briefext
  799.     );
  800. }
  801.  
  802. static void m68_unlk_an_x(void){
  803.     sprintf(sdebug,"unlk    a%d",inst&7);
  804. }
  805.  
  806. static void m68_stop____x(void){sprintf(sdebug,"stop    #$%04X",fetch());}
  807. static void m68_rte_____x(void){sprintf(sdebug,"rte");}
  808. static void m68_rtr_____x(void){sprintf(sdebug,"rtr");}
  809. static void m68_reset___x(void){sprintf(sdebug,"reset");}
  810. static void m68_rtd_____x(void){
  811.     int16 briefext=fetch();
  812.     sprintf(sdebug,"rtd     %c#$"hex16,briefext<0?'-':'+',
  813.         briefext<0?-briefext:briefext);
  814. }
  815. static void m68_divu__n_w(void){ea;sprintf(sdebug,"divu    %s,d%d",eabuffer,(inst>>9)&7);}
  816. static void m68_divs__n_w(void){ea;sprintf(sdebug,"divs    %s,d%d",eabuffer,(inst>>9)&7);}
  817. static void m68_mulu__n_w(void){ea;sprintf(sdebug,"mulu    %s,d%d",eabuffer,(inst>>9)&7);}
  818. static void m68_muls__n_w(void){ea;sprintf(sdebug,"muls    %s,d%d",eabuffer,(inst>>9)&7);}
  819.  
  820. static void m68_asr_m___w(void){ea;sprintf(sdebug,"asr     %s",eabuffer);}
  821. static void m68_asl_m___w(void){ea;sprintf(sdebug,"asl     %s",eabuffer);}
  822. static void m68_lsr_m___w(void){ea;sprintf(sdebug,"lsr     %s",eabuffer);}
  823. static void m68_lsl_m___w(void){ea;sprintf(sdebug,"lsl     %s",eabuffer);}
  824. static void m68_roxr_m__w(void){ea;sprintf(sdebug,"roxr    %s",eabuffer);}
  825. static void m68_roxl_m__w(void){ea;sprintf(sdebug,"roxl    %s",eabuffer);}
  826. static void m68_ror_m___w(void){ea;sprintf(sdebug,"ror     %s",eabuffer);}
  827. static void m68_rol_m___w(void){ea;sprintf(sdebug,"rol     %s",eabuffer);}
  828.  
  829. static void m68_nbcd____b(void){ea;sprintf(sdebug,"nbcd.b  %s",eabuffer);}
  830. static void m68_chk___n_w(void){ea;sprintf(sdebug,"chk     %s,d%d",eabuffer,(inst>>9)&7);}
  831.  
  832. static void m68_trap_nn_x(void){sprintf(sdebug,"trap    #%d",inst&0xF);}
  833. static void m68_move_2u_l(void){sprintf(sdebug,"move.l  a%d,usp",inst&7);}
  834. static void m68_move_fu_l(void){sprintf(sdebug,"move.l  usp,a%d",inst&7);}
  835.  
  836. static void m68_trapv___x(void){sprintf(sdebug,"trapv");}
  837.  
  838. static char*specialregister(unsigned short int code){
  839.     switch(code&0xFFF){
  840.     case 0x000:return("sfc");
  841.     case 0x001:return("dfc");
  842.     case 0x800:return("usp");
  843.     case 0x801:return("vbr");
  844.     }
  845.     return("???");
  846. }
  847.  
  848. static void m68_movec_r_x(void){
  849.     unsigned short int f=fetch();
  850.     sprintf(sdebug,"movec   %s,%c%d",
  851.         specialregister(f),
  852.         (f&0x8000)?'a':'d',(f>>12)&7
  853.     );
  854. }
  855.  
  856. static void m68_movec_c_x(void){
  857.     unsigned short int f=fetch();
  858.     sprintf(sdebug,"movec   %c%d,%s",
  859.         (f&0x8000)?'a':'d',(f>>12)&7,
  860.         specialregister(f)
  861.     );
  862. }
  863.  
  864. /******************** SPECIAL INSTRUCTION TABLE ********************/
  865.  
  866. /* This table is used for 0100111001xxxxxx instructions (4E4x-4E7x) */
  867. static void(*(debugspecialmap[64]))(void)={
  868. /* 0000xx */ m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,
  869. /* 0001xx */ m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,
  870. /* 0010xx */ m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,
  871. /* 0011xx */ m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,m68_trap_nn_x,
  872. /* 0100xx */ m68_link_an_w,m68_link_an_w,m68_link_an_w,m68_link_an_w,
  873. /* 0101xx */ m68_link_an_w,m68_link_an_w,m68_link_an_w,m68_link_an_w,
  874. /* 0110xx */ m68_unlk_an_x,m68_unlk_an_x,m68_unlk_an_x,m68_unlk_an_x,
  875. /* 0111xx */ m68_unlk_an_x,m68_unlk_an_x,m68_unlk_an_x,m68_unlk_an_x,
  876. /* 1000xx */ m68_move_2u_l,m68_move_2u_l,m68_move_2u_l,m68_move_2u_l,
  877. /* 1001xx */ m68_move_2u_l,m68_move_2u_l,m68_move_2u_l,m68_move_2u_l,
  878. /* 1010xx */ m68_move_fu_l,m68_move_fu_l,m68_move_fu_l,m68_move_fu_l,
  879. /* 1011xx */ m68_move_fu_l,m68_move_fu_l,m68_move_fu_l,m68_move_fu_l,
  880. /* 1100xx */ m68_reset___x,m68_nop_____x,m68_stop____x,m68_rte_____x,
  881. /* 1101xx */ m68_rtd_____x,m68_rts_____x,m68_trapv___x,m68_rtr_____x,
  882. /* 1110xx */ m68_unrecog_x,m68_unrecog_x,m68_movec_r_x,m68_movec_c_x,
  883. /* 1111xx */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x};
  884.  
  885. static void m68_special_x(void){
  886.     debugspecialmap[inst&0x3F]();
  887. }
  888.  
  889. /******************** INSTRUCTION TABLE ********************/
  890.  
  891. /* The big 1024-element jump table that handles all possible opcodes
  892.    is in the following header file.
  893.    Use this syntax to execute an instruction:
  894.  
  895.    cpumap[i>>6]();
  896.  
  897.    ("i" is the instruction word)
  898. */
  899.  
  900. static void(*(debugmap[1024]))(void)={
  901. /* 00000000ss */ m68_ori_____b,m68_ori_____w,m68_ori_____l,m68_unrecog_x,
  902. /* 00000001ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  903. /* 00000010ss */ m68_andi____b,m68_andi____w,m68_andi____l,m68_unrecog_x,
  904. /* 00000011ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  905. /* 00000100ss */ m68_subi____b,m68_subi____w,m68_subi____l,m68_unrecog_x,
  906. /* 00000101ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  907. /* 00000110ss */ m68_addi____b,m68_addi____w,m68_addi____l,m68_unrecog_x,
  908. /* 00000111ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  909. /* 00001000ss */ m68_btst_st_x,m68_bchg_st_x,m68_bclr_st_x,m68_bset_st_x,
  910. /* 00001001ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  911. /* 00001010ss */ m68_eori____b,m68_eori____w,m68_eori____l,m68_unrecog_x,
  912. /* 00001011ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  913. /* 00001100ss */ m68_cmpi____b,m68_cmpi____w,m68_cmpi____l,m68_unrecog_x,
  914. /* 00001101ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  915. /* 00001110ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  916. /* 00001111ss */ m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,m68_bitopdn_x,
  917. /* 00010000ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  918. /* 00010001ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  919. /* 00010010ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  920. /* 00010011ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  921. /* 00010100ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  922. /* 00010101ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  923. /* 00010110ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  924. /* 00010111ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  925. /* 00011000ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  926. /* 00011001ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  927. /* 00011010ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  928. /* 00011011ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  929. /* 00011100ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  930. /* 00011101ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  931. /* 00011110ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  932. /* 00011111ss */ m68_move____b,m68_move____b,m68_move____b,m68_move____b,
  933. /* 00100000ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  934. /* 00100001ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  935. /* 00100010ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  936. /* 00100011ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  937. /* 00100100ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  938. /* 00100101ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  939. /* 00100110ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  940. /* 00100111ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  941. /* 00101000ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  942. /* 00101001ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  943. /* 00101010ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  944. /* 00101011ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  945. /* 00101100ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  946. /* 00101101ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  947. /* 00101110ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  948. /* 00101111ss */ m68_move____l,m68_move____l,m68_move____l,m68_move____l,
  949. /* 00110000ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  950. /* 00110001ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  951. /* 00110010ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  952. /* 00110011ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  953. /* 00110100ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  954. /* 00110101ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  955. /* 00110110ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  956. /* 00110111ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  957. /* 00111000ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  958. /* 00111001ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  959. /* 00111010ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  960. /* 00111011ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  961. /* 00111100ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  962. /* 00111101ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  963. /* 00111110ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  964. /* 00111111ss */ m68_move____w,m68_move____w,m68_move____w,m68_move____w,
  965. /* 01000000ss */ m68_negx____b,m68_negx____w,m68_negx____l,m68_movefsr_w,
  966. /* 01000001ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  967. /* 01000010ss */ m68_clr_____b,m68_clr_____w,m68_clr_____l,m68_movefcc_w,
  968. /* 01000011ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  969. /* 01000100ss */ m68_neg_____b,m68_neg_____w,m68_neg_____l,m68_move2cc_w,
  970. /* 01000101ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  971. /* 01000110ss */ m68_not_____b,m68_not_____w,m68_not_____l,m68_move2sr_w,
  972. /* 01000111ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  973. /* 01001000ss */ m68_nbcd____b,m68_pea_____l,m68_movem___w,m68_movem___l,
  974. /* 01001001ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  975. /* 01001010ss */ m68_tst_____b,m68_tst_____w,m68_tst_____l,m68_tas_____b,
  976. /* 01001011ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  977. /* 01001100ss */ m68_unrecog_x,m68_unrecog_x,m68_movem_r_w,m68_movem_r_l,
  978. /* 01001101ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  979. /* 01001110ss */ m68_unrecog_x,m68_special_x,m68_jsr_____x,m68_jmp_____x,
  980. /* 01001111ss */ m68_unrecog_x,m68_unrecog_x,m68_chk___n_w,m68_lea___n_l,
  981. /* 01010000ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_st______x,
  982. /* 01010001ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_sf______x,
  983. /* 01010010ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_shi_____x,
  984. /* 01010011ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_sls_____x,
  985. /* 01010100ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_scc_____x,
  986. /* 01010101ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_scs_____x,
  987. /* 01010110ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_sne_____x,
  988. /* 01010111ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_seq_____x,
  989. /* 01011000ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_svc_____x,
  990. /* 01011001ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_svs_____x,
  991. /* 01011010ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_spl_____x,
  992. /* 01011011ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_smi_____x,
  993. /* 01011100ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_sge_____x,
  994. /* 01011101ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_slt_____x,
  995. /* 01011110ss */ m68_addq__n_b,m68_addq__n_w,m68_addq__n_l,m68_sgt_____x,
  996. /* 01011111ss */ m68_subq__n_b,m68_subq__n_w,m68_subq__n_l,m68_sle_____x,
  997. /* 01100000ss */ m68_bra_____x,m68_bra_____x,m68_bra_____x,m68_bra_____x,
  998. /* 01100001ss */ m68_bsr_____x,m68_bsr_____x,m68_bsr_____x,m68_bsr_____x,
  999. /* 01100010ss */ m68_bhi_____x,m68_bhi_____x,m68_bhi_____x,m68_bhi_____x,
  1000. /* 01100011ss */ m68_bls_____x,m68_bls_____x,m68_bls_____x,m68_bls_____x,
  1001. /* 01100100ss */ m68_bcc_____x,m68_bcc_____x,m68_bcc_____x,m68_bcc_____x,
  1002. /* 01100101ss */ m68_bcs_____x,m68_bcs_____x,m68_bcs_____x,m68_bcs_____x,
  1003. /* 01100110ss */ m68_bne_____x,m68_bne_____x,m68_bne_____x,m68_bne_____x,
  1004. /* 01100111ss */ m68_beq_____x,m68_beq_____x,m68_beq_____x,m68_beq_____x,
  1005. /* 01101000ss */ m68_bvc_____x,m68_bvc_____x,m68_bvc_____x,m68_bvc_____x,
  1006. /* 01101001ss */ m68_bvs_____x,m68_bvs_____x,m68_bvs_____x,m68_bvs_____x,
  1007. /* 01101010ss */ m68_bpl_____x,m68_bpl_____x,m68_bpl_____x,m68_bpl_____x,
  1008. /* 01101011ss */ m68_bmi_____x,m68_bmi_____x,m68_bmi_____x,m68_bmi_____x,
  1009. /* 01101100ss */ m68_bge_____x,m68_bge_____x,m68_bge_____x,m68_bge_____x,
  1010. /* 01101101ss */ m68_blt_____x,m68_blt_____x,m68_blt_____x,m68_blt_____x,
  1011. /* 01101110ss */ m68_bgt_____x,m68_bgt_____x,m68_bgt_____x,m68_bgt_____x,
  1012. /* 01101111ss */ m68_ble_____x,m68_ble_____x,m68_ble_____x,m68_ble_____x,
  1013. /* 01110000ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1014. /* 01110001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1015. /* 01110010ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1016. /* 01110011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1017. /* 01110100ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1018. /* 01110101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1019. /* 01110110ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1020. /* 01110111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1021. /* 01111000ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1022. /* 01111001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1023. /* 01111010ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1024. /* 01111011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1025. /* 01111100ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1026. /* 01111101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1027. /* 01111110ss */ m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,m68_moveq_n_l,
  1028. /* 01111111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1029. /* 10000000ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1030. /* 10000001ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1031. /* 10000010ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1032. /* 10000011ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1033. /* 10000100ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1034. /* 10000101ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1035. /* 10000110ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1036. /* 10000111ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1037. /* 10001000ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1038. /* 10001001ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1039. /* 10001010ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1040. /* 10001011ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1041. /* 10001100ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1042. /* 10001101ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1043. /* 10001110ss */ m68_or__d_n_b,m68_or__d_n_w,m68_or__d_n_l,m68_divu__n_w,
  1044. /* 10001111ss */ m68_or__e_n_b,m68_or__e_n_w,m68_or__e_n_l,m68_divs__n_w,
  1045. /* 10010000ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1046. /* 10010001ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1047. /* 10010010ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1048. /* 10010011ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1049. /* 10010100ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1050. /* 10010101ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1051. /* 10010110ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1052. /* 10010111ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1053. /* 10011000ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1054. /* 10011001ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1055. /* 10011010ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1056. /* 10011011ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1057. /* 10011100ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1058. /* 10011101ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1059. /* 10011110ss */ m68_sub_d_n_b,m68_sub_d_n_w,m68_sub_d_n_l,m68_suba__n_w,
  1060. /* 10011111ss */ m68_sub_e_n_b,m68_sub_e_n_w,m68_sub_e_n_l,m68_suba__n_l,
  1061. /* 10100000ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1062. /* 10100001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1063. /* 10100010ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1064. /* 10100011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1065. /* 10100100ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1066. /* 10100101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1067. /* 10100110ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1068. /* 10100111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1069. /* 10101000ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1070. /* 10101001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1071. /* 10101010ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1072. /* 10101011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1073. /* 10101100ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1074. /* 10101101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1075. /* 10101110ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1076. /* 10101111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1077. /* 10110000ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1078. /* 10110001ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1079. /* 10110010ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1080. /* 10110011ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1081. /* 10110100ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1082. /* 10110101ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1083. /* 10110110ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1084. /* 10110111ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1085. /* 10111000ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1086. /* 10111001ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1087. /* 10111010ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1088. /* 10111011ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1089. /* 10111100ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1090. /* 10111101ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1091. /* 10111110ss */ m68_cmp_d_n_b,m68_cmp_d_n_w,m68_cmp_d_n_l,m68_cmpa__n_w,
  1092. /* 10111111ss */ m68_eor_e_n_b,m68_eor_e_n_w,m68_eor_e_n_l,m68_cmpa__n_l,
  1093. /* 11000000ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1094. /* 11000001ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1095. /* 11000010ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1096. /* 11000011ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1097. /* 11000100ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1098. /* 11000101ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1099. /* 11000110ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1100. /* 11000111ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1101. /* 11001000ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1102. /* 11001001ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1103. /* 11001010ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1104. /* 11001011ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1105. /* 11001100ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1106. /* 11001101ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1107. /* 11001110ss */ m68_and_d_n_b,m68_and_d_n_w,m68_and_d_n_l,m68_mulu__n_w,
  1108. /* 11001111ss */ m68_and_e_n_b,m68_and_e_n_w,m68_and_e_n_l,m68_muls__n_w,
  1109. /* 11010000ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1110. /* 11010001ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1111. /* 11010010ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1112. /* 11010011ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1113. /* 11010100ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1114. /* 11010101ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1115. /* 11010110ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1116. /* 11010111ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1117. /* 11011000ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1118. /* 11011001ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1119. /* 11011010ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1120. /* 11011011ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1121. /* 11011100ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1122. /* 11011101ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1123. /* 11011110ss */ m68_add_d_n_b,m68_add_d_n_w,m68_add_d_n_l,m68_adda__n_w,
  1124. /* 11011111ss */ m68_add_e_n_b,m68_add_e_n_w,m68_add_e_n_l,m68_adda__n_l,
  1125. /* 11100000ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_asr_m___w,
  1126. /* 11100001ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_asl_m___w,
  1127. /* 11100010ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_lsr_m___w,
  1128. /* 11100011ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_lsl_m___w,
  1129. /* 11100100ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_roxr_m__w,
  1130. /* 11100101ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_roxl_m__w,
  1131. /* 11100110ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_ror_m___w,
  1132. /* 11100111ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_rol_m___w,
  1133. /* 11101000ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_unrecog_x,
  1134. /* 11101001ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_unrecog_x,
  1135. /* 11101010ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_unrecog_x,
  1136. /* 11101011ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_unrecog_x,
  1137. /* 11101100ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_unrecog_x,
  1138. /* 11101101ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_unrecog_x,
  1139. /* 11101110ss */ m68_shr_r_n_b,m68_shr_r_n_w,m68_shr_r_n_l,m68_unrecog_x,
  1140. /* 11101111ss */ m68_shl_r_n_b,m68_shl_r_n_w,m68_shl_r_n_l,m68_unrecog_x,
  1141. /* 11110000ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1142. /* 11110001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1143. /* 11110010ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1144. /* 11110011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1145. /* 11110100ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1146. /* 11110101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1147. /* 11110110ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1148. /* 11110111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1149. /* 11111000ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1150. /* 11111001ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1151. /* 11111010ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1152. /* 11111011ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1153. /* 11111100ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1154. /* 11111101ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1155. /* 11111110ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,
  1156. /* 11111111ss */ m68_unrecog_x,m68_unrecog_x,m68_unrecog_x,m68_unrecog_x};
  1157.  
  1158. void cpudebug_disassemble(int n) {
  1159.     while(n--) {
  1160.         dword addr = debugpc;
  1161.       print("%06X: ", addr);
  1162.         isize = 0;
  1163.         inst = fetch();
  1164.         debugmap[inst >> 6]();
  1165.         while(addr < debugpc) {
  1166.             //print("%04X ", s68000fetch(addr) & 0xFFFF);
  1167.             addr += 2;
  1168.         }
  1169.         while(isize < 10) {
  1170.             //print("     ");
  1171.             isize += 2;
  1172.         }
  1173.         print("%s\n", sdebug);
  1174.     }
  1175. }
  1176.  
  1177. void cpudebug_hexdump(void) {
  1178.     byte c, tmpchar[16];
  1179.     dword tmpaddr;
  1180.     int i, j, k;
  1181.     tmpaddr = hexaddr & 0xFFFFFFF0;
  1182.     for(i = 0; i < 8; i++) {
  1183.         print("%08X: %c", tmpaddr,(hexaddr == tmpaddr) ? '>' : ' ');
  1184.         for(j = 0; j < 16; j += 2) {
  1185.             k = s68000fetch(tmpaddr) & 0xFFFF;
  1186.             tmpchar[j    ] = k >> 8;
  1187.             tmpchar[j + 1] = k & 0xFF;
  1188.             tmpaddr += 2;
  1189.             print("%02X%02X%c",
  1190.                 tmpchar[j], tmpchar[j + 1],
  1191.                 (( hexaddr            == tmpaddr   )&&(j!=14))?'>':
  1192.                 (((hexaddr&0xFFFFFFFE)==(tmpaddr-2))?'<':' ')
  1193.             );
  1194.         }
  1195.         print("  ");
  1196.         for(j = 0; j < 16; j++) {
  1197.             c = tmpchar[j];
  1198.             if((c<32)||(c>126))c='.';
  1199.             print("%c", c);
  1200.         }
  1201.         print("\n");
  1202.     }
  1203.     hexaddr += 0x80;
  1204. }
  1205.  
  1206. void cpudebug_registerdump(void) {
  1207.     int i;
  1208.     print(
  1209.         "d0=%08X   d4=%08X   a0=%08X   a4=%08X   %c%c%c%c%c\n",
  1210.         s68000context.dreg[0],s68000context.dreg[4],
  1211.         s68000context.areg[0],s68000context.areg[4],
  1212.         (s68000context.sr >> 4) & 1 ? 'X' : '-',
  1213.         (s68000context.sr >> 3) & 1 ? 'N' : '-',
  1214.         (s68000context.sr >> 2) & 1 ? 'Z' : '-',
  1215.         (s68000context.sr >> 1) & 1 ? 'V' : '-',
  1216.         (s68000context.sr     ) & 1 ? 'C' : '-'
  1217.     );
  1218.     print(
  1219.         "d1=%08X   d5=%08X   a1=%08X   a5=%08X   intmask=%d\n",
  1220.         s68000context.dreg[1], s68000context.dreg[5],
  1221.         s68000context.areg[1], s68000context.areg[5],
  1222.         (s68000context.sr >> 8) & 7
  1223.     );
  1224.     print(
  1225.         "d2=%08X   d6=%08X   a2=%08X   a6=%08X   ",
  1226.         s68000context.dreg[2], s68000context.dreg[6],
  1227.         s68000context.areg[2], s68000context.areg[6]
  1228.     );
  1229.     for(i = 1; i <= 7; i++) {
  1230.         if(s68000context.interrupts[0] & (1 << i)) {
  1231.             print("%02X", s68000context.interrupts[i]);
  1232.         } else {
  1233.             print("--");
  1234.         }
  1235.     }
  1236.     print(
  1237.         "\nd3=%08X   d7=%08X   a3=%08X   a7=%08X   %csp=%08X\n",
  1238.         s68000context.dreg[3], s68000context.dreg[7],
  1239.         s68000context.areg[3], s68000context.areg[7],
  1240.         ((s68000context.sr)&0x2000)?'u':'s', s68000context.asp
  1241.     );
  1242.     debugpc = s68000context.pc;
  1243.     cpudebug_disassemble(1);
  1244.     debugpc = s68000context.pc;
  1245. }
  1246.  
  1247. /*
  1248. int cpudebug_interactive(
  1249.     int cpun,
  1250.     void (*put)(const char*),
  1251.     void (*get)(char*, int),
  1252.     void (*execstep)(void),
  1253.     void (*dump)(void)
  1254. ) {
  1255.     char inputstr[80];
  1256.     char *cmd, *args, *argsend;
  1257.     dword tmppc;
  1258.     hexaddr = 0;
  1259.     cpudebug_put = put;
  1260.     cpudebug_get = get;
  1261.     for(;;) {
  1262.         s68000flushInterrupts();
  1263.         cpudebug_printf("cpu%d-", cpun);
  1264.         cpudebug_gets(inputstr, sizeof(inputstr));
  1265.         cmd = inputstr;
  1266.         while((tolower(*cmd) < 'a') && (tolower(*cmd) > 'z')) {
  1267.             if(!(*cmd)) break;
  1268.             cmd++;
  1269.         }
  1270.         if(!(*cmd)) continue;
  1271.         *cmd = tolower(*cmd);
  1272.         args = cmd + 1;
  1273.         while((*args) && ((*args) < 32)) args++;
  1274.         switch(*cmd) {
  1275.         case '?':
  1276.             cpudebug_printf(
  1277. "b [address]           Run continuously, break at PC=[address]\n"
  1278. "d [address]           Dump memory, starting at [address]\n"
  1279. "h                     Hardware dump\n"
  1280. "i [number]            Generate hardware interrupt [number]\n"
  1281. "j [address]           Jump directly to [address]\n"
  1282. "q                     Quit\n"
  1283. "r                     Show register dump and next instruction\n"
  1284. "s [n]                 Switch to CPU [n]\n"
  1285. "t [hex number]        Trace through [hex number] instructions\n"
  1286. "u [address]           Unassemble code, starting at [address]\n"
  1287.             );
  1288.             break;
  1289.         case 'b':
  1290.             if(*args) {
  1291.                 tmppc = strtoul(args, &argsend, 16);
  1292.                 if(argsend != args) {
  1293.                     while(s68000context.pc != tmppc)
  1294.                     if(execstep) execstep();
  1295.                     else s68000exec(1);
  1296.                     cpudebug_registerdump();
  1297.                 } else {
  1298.                     cpudebug_printf("Invalid address\n");
  1299.                 }
  1300.             } else {
  1301.                 cpudebug_printf("Need an address\n");
  1302.             }
  1303.             break;
  1304.         case 'u':
  1305.             if(*args) {
  1306.                 tmppc = strtoul(args, &argsend, 16);
  1307.                 if(argsend != args) debugpc = tmppc;
  1308.             }
  1309.             cpudebug_disassemble(16);
  1310.             break;
  1311.         case 'd':
  1312.             if(*args) {
  1313.                 tmppc = strtoul(args,&argsend,16);
  1314.                 if(argsend != args) hexaddr = tmppc;
  1315.             }
  1316.             cpudebug_hexdump();
  1317.             break;
  1318.         case 'h':
  1319.             if(dump) dump();
  1320.             break;
  1321.         case 'j':
  1322.             if(*args) {
  1323.                 tmppc = strtoul(args, &argsend, 16);
  1324.                 if(argsend != args) {
  1325.                     s68000context.pc = tmppc;
  1326.                     cpudebug_printf("PC set to %08X\n",
  1327.                         s68000context.pc
  1328.                     );
  1329.                     debugpc = s68000context.pc;
  1330.                     cpudebug_disassemble(1);
  1331.                     debugpc = s68000context.pc;
  1332.                 } else {
  1333.                     cpudebug_printf("Invalid address\n");
  1334.                 }
  1335.             } else {
  1336.                 cpudebug_printf("Need an address\n");
  1337.             }
  1338.             break;
  1339.         case 'i':
  1340.             if(*args) {
  1341.                 tmppc = strtoul(args, &argsend, 10);
  1342.                 if(argsend != args) {
  1343.                     cpudebug_printf("Interrupt %d generated\n", tmppc);
  1344.                     s68000interrupt(tmppc, -1);
  1345.                     s68000flushInterrupts();
  1346.                     cpudebug_registerdump();
  1347.                     debugpc = s68000context.pc;
  1348.                 } else {
  1349.                     cpudebug_printf("Invalid interrupt number\n");
  1350.                 }
  1351.             } else {
  1352.                 cpudebug_printf("Need an interrupt number\n");
  1353.             }
  1354.             break;
  1355.         case 't':
  1356.             tmppc = 1;
  1357.             if(*args) {
  1358.                 tmppc = strtoul(args, &argsend, 16);
  1359.                 if(argsend == args) tmppc = 1;
  1360.             }
  1361.             if(tmppc > 0) {
  1362.                 while(tmppc--) {
  1363.                     if(execstep) execstep();
  1364.                     else s68000exec(1);
  1365.                 }
  1366.                 cpudebug_registerdump();
  1367.             }
  1368.             break;
  1369.         case 'r':
  1370.             cpudebug_registerdump();
  1371.             break;
  1372.         case 'q':
  1373.             return -1;
  1374.         case 's':
  1375.             if(*args) {
  1376.                 tmppc = strtoul(args, &argsend, 10);
  1377.                 if(tmppc > 0) return tmppc;
  1378.                 else cpudebug_printf("Invalid CPU number\n");
  1379.             } else return 0;
  1380.             break;
  1381.         default:
  1382. /*            cpudebug_printf("Unknown command\n");*//*
  1383.             break;
  1384.         }
  1385.     }
  1386.     return -1;
  1387. }
  1388. */