PC World Komputer 1996 September

home *** CD-ROM | disk | FTP | other *** search

/ PC World Komputer 1996 September / PCWK996.iso / demo / elmark / cupl / manual / contents.doc next >

Wrap

Text File | 1992-01-22 | 19.7 KB | 310 lines

TABLE OF CONTENTS This table of contents lists each file and the sections in each file in order. The line number is given so that you can use a text editor to go directly to the line number. Also if you print the manual, you can divide the line number by the number of lines per page to get a page number. The following is the order that these files should be used. SB0.TXT Copyright SB0A.TXT Introduction To Manual SB1.TXT Chapter 1 ... Compiler (part 1) SB1-A.TXT Chapter 1 ... Compiler (part 2) SB2.TXT Chapter 2 ... Simulation SB3.TXT Chapter 3 ... CBLD SB4.TXT Chapter 4 ... PTOC SB5.TXT Chapter 5 ... FPGAs SB6A.TXT Appendix A ... Error messages SB6B.TXT Appendix B ... Device Usage Notes SB6C.TXT Appendix C ... Download Formats SB6D.TXT Appendix D ... Node Numbering SB6E.TXT Appendix E ... How To Get Support UG1.TXT User Guide 1 ... Introduction To CUPL UG2.TXT User Guide 2 ... Installation UG3.TXT User Guide 3 ... Getting Started UG4.TXT User Guide 4 ... CUPL Operation UG5.TXT User Guide 5 ... Design Examples LINE # General Introduction .................................................. 1 USER GUIDE ............................................................ 21 REFERENCE ............................................................. 46 APPENDICES ............................................................ 70 SOFTWARE DEVELOPMENT TOOLS ............................................ 91 CUPL TotalDesigner-386 ... '386 Protected Mode Version ............... 102 PLPartition - Multiple PLD Design ..................................... 120 MacCUPL - A Macintosh version of CUPL ................................. 130 DEC 3100 and 5000 .................................................... 140 SPARC based Workstations .............................................. 156 Open-PLA .............................................................. 165 ONCUPL ............................................................... 173 ALLPRO-88 - Universal Device Programmer ............................... 187 SB1.TXT ------- CUPL LANGUAGE 1 ......................................... 1 LANGUAGE ELEMENTS ..................................................... 7 VARIABLES ............................................................. 13 INDEXED VARIABLES ..................................................... 61 RESERVED WORDS AND SYMBOLS ............................................ 107 NUMBERS ............................................................... 144 COMMENTS .............................................................. 192 LIST NOTATION ......................................................... 222 TEMPLATE FILE ......................................................... 280 HEADER INFORMATION .................................................... 349 Pin Declaration Statements ............................................ 443 Node Declaration Statements ........................................... 612 Bit Field Declaration Statements ...................................... 714 MIN Declaration Statements ............................................ 779 FUSE Statement ........................................................ 821 Preprocessor Commands ................................................. 853 $DEFINE ............................................................... 883 $UNDEF ................................................................ 932 $INCLUDE .............................................................. 946 $IFDEF ................................................................ 980 $IFNDEF ............................................................... 1015 $ENDIF ................................................................ 1065 $ELSE ................................................................. 1091 $REPEAT ............................................................... 1130 $REPEND ............................................................... 1186 $MACRO ................................................................ 1196 $MEND ................................................................. 1264 LANGUAGE SYNTAX ....................................................... 1274 Logical Operators ..................................................... 1281 Arithmetic Operators .................................................. 1309 Arithmetic Function ................................................... 1328 Extensions ............................................................ 1348 SB1-A.TXT --------- LINE # FEEDBACK EXTENSIONS USAGE ............................................. 1 MULTIPLEXER EXTENSION USAGE ........................................... 39 EXTENSION USAGE ....................................................... 80 Boolean Logic Review .................................................. 360 EXPRESSIONS ........................................................... 392 LOGIC EQUATIONS .................................................... 427 APPEND STATEMENTS ..................................................... 489 Set Operations ..................................................... 533 Equality Operations ................................................... 642 Range Operations ...................................................... 932 Truth Tables .......................................................... 1142 State-Machine Syntax .................................................. 1217 State-Machine Model ................................................... 1231 Inputs ................................................................ 1249 Combinatorial Logic ................................................... 1254 State Bits ............................................................ 1263 Storage Registers ..................................................... 1267 Inputs ................................................................ 1282 Nonregistered Outputs ................................................. 1293 Registered Outputs .................................................... 1300 Syntax ................................................................ 1325 Unconditional NEXT Statement .......................................... 1398 Conditional NEXT Statement ............................................ 1457 Unconditional Synchronous Output Statement ............................ 1598 Conditional Synchronous Output Statement .............................. 1679 Unconditional Asynchronous Output Statement ....................... 1835 Conditional Asynchronous Output Statement ......................... 1884 Sample State-Machine Syntax File ...................................... 1980 Condition Syntax ...................................................... 2012 User-Defined Functions ................................................ 2090 SB2.TXT ------- FEEDBACK EXTENSIONS USAGE ............................................. 1 MULTIPLEXER EXTENSION USAGE ........................................... 39 EXTENSION USAGE ....................................................... 80 Boolean Logic Review .................................................. 360 EXPRESSIONS ........................................................... 392 LOGIC EQUATIONS .................................................... 427 APPEND STATEMENTS ..................................................... 489 Set Operations ..................................................... 533 Equality Operations ................................................... 642 Range Operations ...................................................... 932 Truth Tables .......................................................... 1142 State-Machine Syntax .................................................. 1217 State-Machine Model ................................................... 1231 Inputs ................................................................ 1249 SB2.TXT ------- LINE # Combinatorial Logic ................................................... 1254 State Bits ............................................................ 1263 Storage Registers ..................................................... 1267 Inputs ................................................................ 1282 Nonregistered Outputs ................................................. 1293 Registered Outputs .................................................... 1300 Syntax ................................................................ 1325 Unconditional NEXT Statement .......................................... 1398 Conditional NEXT Statement ............................................ 1457 Unconditional Synchronous Output Statement ............................ 1598 Conditional Synchronous Output Statement .............................. 1679 Unconditional Asynchronous Output Statement ....................... 1835 Conditional Asynchronous Output Statement ......................... 1884 Sample State-Machine Syntax File ...................................... 1980 Condition Syntax ...................................................... 2012 User-Defined Functions ................................................ 2090 SB3.TXT ------- Using CBLD 3 ......................................... 1 RUNNING CBLD .......................................................... 25 LISTING THE CONTENTS OF A LIBRARY ................................. 60 LISTING ALLOWABLE EXTENSIONS ...................................... 109 BUILDING DEVICE LIBRARIES ........................................... 140 SB4.TXT ------- Using PTOC 4 ......................................................... 1 RUNNING PTOC .......................................................... 10 PALASM SOURCE FILE FORMAT ........................................... 40 PTOC .PLD OUTPUT FILE ............................................... 83 Header Information .................................................. 88 Pin List .............................................................. 113 Equations ............................................................. 134 PTOC .SI OUTPUT FILE ................................................ 153 Translation Ambiguities ............................................. 182 SB5.TXT ------- FPGA AND HIGH DENSITY PLDS 5 ..................... 1 DESIGNING WITH FPGAs and HIGH DENSITY PLDs ............................ 7 XILINX XNF INTERFACE ................................................ 27 Getting an XNF File ................................................... 37 Translating an Existing PLD File ...................................... 46 Using a PALASM Device ................................................. 106 SB5.TXT(continued) ------------------ LINE # Source Files for XILINX Devices ....................................... 121 DEVICE FITTERS ...................................................... 142 USING CUPL FOR FPGA2020 DEVELOPMENT ............................... 187 USING CUPL WITH THE MACH DEVICES .................................. 347 USING CUPL WITH THE MAPL DEVICES .................................. 388 USING CUPL WITH THE MAX DEVICES ................................... 425 SB6A.TXT -------- ERROR MESSAGES A ...................................................... 1 CUPL ERROR MESSAGES ................................................... 58 CUPL Module Error Messages ............................................ 64 CUPLX Module Error Messages ........................................... 112 CUPLA Module Error Messages ........................................... 248 CUPLB Module Error Messages ........................................... 496 CUPLM Module Error Messages ......................................... 652 CUPLC Module Error Messages ........................................... 720 CSIM ERROR MESSAGES ................................................. 810 CSIM Module Error Messages .......................................... 815 CSIMA Module Error Messages ........................................... 863 WCSIM Error Messages .................................................. 1027 CBLD ERROR MESSAGES ................................................. 1069 CBLD Module Error Messages .......................................... 1074 PTOC ERROR MESSAGES ................................................... 1152 PTOC Module Error Messages ............................................ 1157 SB6B.TXT -------- DEVICE USAGE NOTES B ........................................ 1 SB6C.TXT -------- DOWNLOAD FORMATS C .................................. 1 DOWNLOADABLE FILE FORMATS ............................................. 6 JEDEC Format .......................................................... 12 ASCII-Hex Format ...................................................... 193 HL Formats ............................................................ 217 DOCUMENTATION FILE FORMAT ............................................. 660 PDIF FILE FORMAT ...................................................... 959 BERKELEY PLA FILE FORMAT .............................................. 980 SB6D.TXT -------- Node Numbering D .......................................... 1 Advanced Micro Devices ................................................ 13 SB6D.TXT(continued) ------------------- LINE # Altera ................................................................ 82 Atmel ................................................................. 103 Cypress ............................................................... 146 Intel ................................................................. 199 Lattice ............................................................... 244 Monolithic Memories ................................................... 267 PLX Technology ........................................................ 282 Signetics ............................................................. 295 Texas Instruments ..................................................... 563 SB6E.TXT -------- Trouble Shooting E ....................................... 1 HOW TO GET SUPPORT ................................................. 3 UG1.TXT ------- INTRODUCTION TO CUPL U1 .................................... 1 CUPL OVERVIEW ......................................................... 8 CUPL DATA FLOW ........................................................ 76 SYSTEM OVERVIEW ....................................................... 108 UG2.TXT ------- INSTALLING CUPL U2 ..................................... 1 MS-DOS INSTALLATION ................................................... 7 Specifying the Configuration .......................................... 123 The CUPL Menu System .................................................. 159 The EZ Edit Editor .................................................... 331 UG3.TXT ------- GETTING STARTED U3 ...................................... 1 FIRST STEPS ........................................................... 8 SIMPLE LOGIC DESIGN ................................................... 55 SIMPLE GATES EXAMPLE .................................................. 117 COMPILING THE SOURCE FILE ............................................. 242 SIMULATING A DESIGN ................................................. 265 UG4.TXT ------- CUPL OPERATION U4 ........................................ 1 INPUT ................................................................. 12 OUTPUT ................................................................ 66 RUNNING CUPL FROM THE COMMAND LINE .................................... 109 UG4.TXT(continued) ------------------ RUNNING CUPL USING THE MENUS .......................................... 363 UG5.TXT ------- DESIGN EXAMPLES U5 ....................................... 1 PART A. SAMPLE DESIGN SESSION ........................................ 11 STEP 1. EXAMINING THE DESIGN TASK ................................. 25 STEP 2. CREATING A CUPL SOURCE FILE ............................... 85 UG5.TXT(continued) ------------------ LINE # STEP 3. FORMULATING THE EQUATIONS ................................. 200 STEP 4. CHOOSING A TARGET DEVICE ..................................... 307 STEP 5. MAKING THE PIN ASSIGNMENTS ................................ 364 STEP 6. RUNNING CUPL ................................................. 457 STEP 7. CREATING A CSIM SOURCE FILE ............................... 822 STEP 8. RUNNING CSIM ................................................ 1014 SUMMARY ............................................................... 1187 PART B. SAMPLE PLD FILES ............................................ 1210 EXAMPLE 1. SIMPLE GATES ............................................. 1373 EXAMPLE 2. CONVERTING A TTL DESIGN TO PLDs ........................ 1460 EXAMPLE 3. TWO-BIT COUNTER ............................................ 1614 EXAMPLE 4. DECADE UP/DOWN COUNTER .................................... 1705 EXAMPLE 5. SEVEN-SEGMENT DISPLAY DECODER ............................. 2059 EXAMPLE 6. 4-BIT COUNTER WITH LOAD AND RESET .......................... 2172