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/ DOS/V Power Report 1997 July / VPR9707B.ISO / DRIVER / DIAMOND / W95J325 / W95J325.EXE / STL00016.DA_ / STL00016.DA
Text File  |  1996-05-16  |  115KB  |  3,348 lines
  1. #
  2. #    $Id: stl10016.da@ 1.2 1996/05/15 15:33:10 arisawa Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl10016.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 175Mhz DAC.
  10. #            This file is for Japanese Windows 95.
  11. #
  12.  
  13. [Objects]
  14. Draweng32=s3x6832.drw
  15. Dac=ibm525.dac
  16. Cursor=ibm525.cur
  17. PixClk=ibm525.clk
  18. Draweng=s3x68.drw
  19.  
  20. [BoardInfo]
  21. wMinimumFormatBltWidth16bpp=16
  22. wMinimumFormatBltWidth32bpp=16
  23. bPixelFormatter=1
  24. bViewports=1
  25. bNewMMIO=1
  26. bTwoPtLine=1
  27. ValidateBAR=YES
  28. SwapVLA30A25=YES
  29.  
  30. [Desktops]
  31. 2048,768,8
  32. 1600,1200,8
  33. 1280,1024,8
  34. 1152,864,16
  35. 1152,864,8
  36. 1024,1536,8
  37. 1024,768,16
  38. 1024,768,8
  39. 800,600,32
  40. 800,600,24
  41. 800,600,16
  42. 800,600,8
  43. 640,480,32
  44. 640,480,24
  45. 640,480,16
  46. 640,480,8
  47.  
  48. [Viewports]
  49. 1600,1200,8,82,66
  50. 1600,1200,8,75,60
  51. 1280,1024,8,95,90
  52. 1280,1024,8,79,75
  53. 1280,1024,8,76,72
  54. 1280,1024,8,74,70
  55. 1280,1024,8,64,60
  56. 1152,864,16,82,90
  57. 1152,864,16,71,75
  58. 1152,864,16,64,70
  59. 1152,864,16,56,60
  60. 1152,864,8,82,90
  61. 1152,864,8,71,75
  62. 1152,864,8,64,70
  63. 1152,864,8,56,60
  64. 1024,768,16,96,120
  65. 1024,768,16,81,100
  66. 1024,768,16,64,80
  67. 1024,768,16,60,75
  68. 1024,768,16,58,72
  69. 1024,768,16,56,70
  70. 1024,768,16,48,60
  71. 1024,768,8,96,120
  72. 1024,768,8,81,100
  73. 1024,768,8,64,80
  74. 1024,768,8,60,75
  75. 1024,768,8,58,72
  76. 1024,768,8,56,70
  77. 1024,768,8,48,60
  78. 800,600,32,75,120
  79. 800,600,32,64,100
  80. 800,600,32,56,90
  81. 800,600,32,46,75
  82. 800,600,32,48,72
  83. 800,600,32,37,60
  84. 800,600,32,35,56
  85. 800,600,24,75,120
  86. 800,600,24,64,100
  87. 800,600,24,56,90
  88. 800,600,24,46,75
  89. 800,600,24,48,72
  90. 800,600,24,37,60
  91. 800,600,24,35,56
  92. 800,600,16,75,120
  93. 800,600,16,64,100
  94. 800,600,16,56,90
  95. 800,600,16,46,75
  96. 800,600,16,48,72
  97. 800,600,16,37,60
  98. 800,600,16,35,56
  99. 800,600,8,75,120
  100. 800,600,8,64,100
  101. 800,600,8,56,90
  102. 800,600,8,46,75
  103. 800,600,8,48,72
  104. 800,600,8,37,60
  105. 800,600,8,35,56
  106. 640,480,32,64,120
  107. 640,480,32,52,100
  108. 640,480,32,48,90
  109. 640,480,32,37,75
  110. 640,480,32,37,72
  111. 640,480,32,31,60
  112. 640,480,24,64,120
  113. 640,480,24,52,100
  114. 640,480,24,48,90
  115. 640,480,24,37,75
  116. 640,480,24,37,72
  117. 640,480,24,31,60
  118. 640,480,16,64,120
  119. 640,480,16,52,100
  120. 640,480,16,48,90
  121. 640,480,16,37,75
  122. 640,480,16,37,72
  123. 640,480,16,31,60
  124. 640,480,8,64,120
  125. 640,480,8,52,100
  126. 640,480,8,48,90
  127. 640,480,8,37,75
  128. 640,480,8,37,72
  129. 640,480,8,31,60
  130.  
  131. [TextMode]
  132. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  133. SHELL, I10, 0x0003,  0x0000
  134. CRT, RUN, REG_LOCK_1, 0x48
  135. CRT, RUN, REG_LOCK_2, 0xA0
  136.  
  137. [GraphicsEnable]
  138. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  139. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  140.  
  141. [GraphicsDisable]
  142. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  143. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  144.  
  145. [2048,768,8]
  146. # Setting Line Pitch
  147. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  148. CRT,RUN,EXT_MODE,0x00
  149. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  150. # Setting Engine Pitch
  151. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  152. CRT,RUN,MEM_CONFIG,0x8f
  153. # Setting Basic Mode Registers.The registers
  154. # below are neither Desktop or Viewport Regs
  155. # Unlock Sequencer
  156. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  157. # Dump Sequencer Registers
  158. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  159. # Dump Graphics Controller Registers
  160. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  161. # Dump Attribute Controller Registers
  162. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  163. # Lock Sequencer
  164. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  165. DAC_IDR, RUN, DAC_OPERATION, 0x02
  166. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  167. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  168. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  169. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  170. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  171. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  172. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  173. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  174. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  175.  
  176. [1024,1536,8]
  177. # Setting Line Pitch
  178. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  179. CRT,RUN,EXT_MODE,0x00
  180. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  181. # Setting Engine Pitch
  182. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  183. CRT,RUN,MEM_CONFIG,0x09
  184. # Setting Basic Mode Registers.The registers
  185. # below are neither Desktop or Viewport Regs
  186. # Unlock Sequencer
  187. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  188. # Dump Sequencer Registers
  189. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  190. # Dump Graphics Controller Registers
  191. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  192. # Dump Attribute Controller Registers
  193. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  194. # Lock Sequencer
  195. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  196. DAC_IDR, RUN, DAC_OPERATION, 0x02
  197. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  198. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  199. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  200. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  201. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  202. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  203. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  204. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  205. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  206.  
  207. [1600,1200,8]
  208. # Setting Line Pitch
  209. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  210. CRT,RUN,EXT_MODE,0x00
  211. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  212. # Setting Engine Pitch
  213. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  214. CRT,RUN,MEM_CONFIG,0x8b
  215. # Setting Basic Mode Registers.The registers
  216. # below are neither Desktop or Viewport Regs
  217. # Unlock Sequencer
  218. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  219. # Dump Sequencer Registers
  220. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  221. # Dump Graphics Controller Registers
  222. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  223. # Dump Attribute Controller Registers
  224. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  225. # Lock Sequencer
  226. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  227. DAC_IDR, RUN, DAC_OPERATION, 0x02
  228. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  229. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  230. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  231. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  232. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  233. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  234. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  235. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  236. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  237.  
  238. [1280,1024,8]
  239. # Setting Line Pitch
  240. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  241. CRT,RUN,EXT_MODE,0x00
  242. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  243. # Setting Engine Pitch
  244. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  245. CRT,RUN,MEM_CONFIG,0x0b
  246. # Setting Basic Mode Registers.The registers
  247. # below are neither Desktop or Viewport Regs
  248. # Unlock Sequencer
  249. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  250. # Dump Sequencer Registers
  251. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  252. # Dump Graphics Controller Registers
  253. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  254. # Dump Attribute Controller Registers
  255. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  256. # Lock Sequencer
  257. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  258. DAC_IDR, RUN, DAC_OPERATION, 0x02
  259. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  260. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  261. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  262. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  263. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  264. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  265. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  266. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  267. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  268.  
  269. [1152,864,16]
  270. # Setting Line Pitch
  271. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  272. CRT,RUN,EXT_MODE,0x00
  273. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  274. # Setting Engine Pitch
  275. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  276. CRT,RUN,MEM_CONFIG,0x89
  277. # Setting Basic Mode Registers.The registers
  278. # below are neither Desktop or Viewport Regs
  279. # Unlock Sequencer
  280. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  281. # Dump Sequencer Registers
  282. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  283. # Dump Graphics Controller Registers
  284. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  285. # Dump Attribute Controller Registers
  286. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  287. # Lock Sequencer
  288. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  289. DAC_IDR, RUN, DAC_OPERATION, 0x02
  290. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  291. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  292. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  293. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  294. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  295. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  296. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  297. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  298. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  299.  
  300. [1152,864,8]
  301. # Setting Line Pitch
  302. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  303. CRT,RUN,EXT_MODE,0x00
  304. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  305. # Setting Engine Pitch
  306. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  307. CRT,RUN,MEM_CONFIG,0x89
  308. # Setting Basic Mode Registers.The registers
  309. # below are neither Desktop or Viewport Regs
  310. # Unlock Sequencer
  311. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  312. # Dump Sequencer Registers
  313. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  314. # Dump Graphics Controller Registers
  315. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  316. # Dump Attribute Controller Registers
  317. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  318. # Lock Sequencer
  319. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  320. DAC_IDR, RUN, DAC_OPERATION, 0x02
  321. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  322. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  323. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  324. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  325. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  326. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  327. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  328. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  329. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  330.  
  331. [1024,768,16]
  332. # Setting Line Pitch
  333. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  334. CRT,RUN,EXT_MODE,0x00
  335. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  336. # Setting Engine Pitch
  337. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  338. CRT,RUN,MEM_CONFIG,0x89
  339. # Setting Basic Mode Registers.The registers
  340. # below are neither Desktop or Viewport Regs
  341. # Unlock Sequencer
  342. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  343. # Dump Sequencer Registers
  344. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  345. # Dump Graphics Controller Registers
  346. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  347. # Dump Attribute Controller Registers
  348. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  349. # Lock Sequencer
  350. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  351. DAC_IDR, RUN, DAC_OPERATION, 0x02
  352. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  353. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  354. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  355. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  356. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  357. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  358. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  359. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  360. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  361.  
  362. [1024,768,8]
  363. # Setting Line Pitch
  364. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  365. CRT,RUN,EXT_MODE,0x00
  366. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  367. # Setting Engine Pitch
  368. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  369. CRT,RUN,MEM_CONFIG,0x09
  370. # Setting Basic Mode Registers.The registers
  371. # below are neither Desktop or Viewport Regs
  372. # Unlock Sequencer
  373. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  374. # Dump Sequencer Registers
  375. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  376. # Dump Graphics Controller Registers
  377. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  378. # Dump Attribute Controller Registers
  379. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  380. # Lock Sequencer
  381. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  382. DAC_IDR, RUN, DAC_OPERATION, 0x02
  383. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  384. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  385. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  386. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  387. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  388. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  389. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  390. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  391. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  392.  
  393. [800,600,32]
  394. # Setting Line Pitch
  395. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  396. CRT,RUN,EXT_MODE,0x00
  397. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  398. # Setting Engine Pitch
  399. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  400. CRT,RUN,MEM_CONFIG,0x89
  401. # Setting Basic Mode Registers.The registers
  402. # below are neither Desktop or Viewport Regs
  403. # Unlock Sequencer
  404. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  405. # Dump Sequencer Registers
  406. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  407. # Dump Graphics Controller Registers
  408. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  409. # Dump Attribute Controller Registers
  410. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  411. # Lock Sequencer
  412. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  413. DAC_IDR, RUN, DAC_OPERATION, 0x02
  414. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  415. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  416. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  417. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  418. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  419. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  420. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  421. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  422. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  423.  
  424. [800,600,24]
  425. # Setting Line Pitch
  426. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  427. CRT,RUN,EXT_MODE,0x00
  428. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  429. # Setting Engine Pitch
  430. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  431. CRT,RUN,MEM_CONFIG,0x8b
  432. # Setting Basic Mode Registers.The registers
  433. # below are neither Desktop or Viewport Regs
  434. # Unlock Sequencer
  435. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  436. # Dump Sequencer Registers
  437. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  438. # Dump Graphics Controller Registers
  439. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  440. # Dump Attribute Controller Registers
  441. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  442. # Lock Sequencer
  443. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  444. DAC_IDR, RUN, DAC_OPERATION, 0x02
  445. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  446. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  447. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  448. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  449. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  450. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  451. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  452. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  453. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  454.  
  455.  
  456. [800,600,16]
  457. # Setting Line Pitch
  458. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  459. CRT,RUN,EXT_MODE,0x00
  460. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  461. # Setting Engine Pitch
  462. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  463. CRT,RUN,MEM_CONFIG,0x89
  464. # Setting Basic Mode Registers.The registers
  465. # below are neither Desktop or Viewport Regs
  466. # Unlock Sequencer
  467. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  468. # Dump Sequencer Registers
  469. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  470. # Dump Graphics Controller Registers
  471. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  472. # Dump Attribute Controller Registers
  473. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  474. # Lock Sequencer
  475. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  476. DAC_IDR, RUN, DAC_OPERATION, 0x02
  477. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  478. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  479. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  480. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  481. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  482. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  483. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  484. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  485. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  486.  
  487. [800,600,8]
  488. # Setting Line Pitch
  489. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  490. CRT,RUN,EXT_MODE,0x00
  491. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  492. # Setting Engine Pitch
  493. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  494. CRT,RUN,MEM_CONFIG,0x89
  495. # Setting Basic Mode Registers.The registers
  496. # below are neither Desktop or Viewport Regs
  497. # Unlock Sequencer
  498. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  499. # Dump Sequencer Registers
  500. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  501. # Dump Graphics Controller Registers
  502. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  503. # Dump Attribute Controller Registers
  504. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  505. # Lock Sequencer
  506. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  507. DAC_IDR, RUN, DAC_OPERATION, 0x02
  508. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  509. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  510. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  511. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  512. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  513. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  514. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  515. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  516. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  517.  
  518. [640,480,32]
  519. # Setting Line Pitch
  520. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  521. CRT,RUN,EXT_MODE,0x00
  522. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  523. # Setting Engine Pitch
  524. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  525. CRT,RUN,MEM_CONFIG,0x89
  526. # Setting Basic Mode Registers.The registers
  527. # below are neither Desktop or Viewport Regs
  528. # Unlock Sequencer
  529. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  530. # Dump Sequencer Registers
  531. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  532. # Dump Graphics Controller Registers
  533. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  534. # Dump Attribute Controller Registers
  535. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  536. # Lock Sequencer
  537. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  538. DAC_IDR, RUN, DAC_OPERATION, 0x02
  539. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  540. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  541. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  542. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  543. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  544. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  545. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  546. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  547. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  548.  
  549. [640,480,24]
  550. # Setting Line Pitch
  551. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  552. CRT,RUN,EXT_MODE,0x00
  553. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  554. # Setting Engine Pitch
  555. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  556. CRT,RUN,MEM_CONFIG,0x8b
  557. # Setting Basic Mode Registers.The registers
  558. # below are neither Desktop or Viewport Regs
  559. # Unlock Sequencer
  560. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  561. # Dump Sequencer Registers
  562. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  563. # Dump Graphics Controller Registers
  564. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  565. # Dump Attribute Controller Registers
  566. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  567. # Lock Sequencer
  568. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  569. DAC_IDR, RUN, DAC_OPERATION, 0x02
  570. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  571. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  572. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  573. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  574. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  575. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  576. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  577. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  578. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  579.  
  580.  
  581. [640,480,16]
  582. # Setting Line Pitch
  583. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  584. CRT,RUN,EXT_MODE,0x00
  585. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  586. # Setting Engine Pitch
  587. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  588. CRT,RUN,MEM_CONFIG,0x89
  589. # Setting Basic Mode Registers.The registers
  590. # below are neither Desktop or Viewport Regs
  591. # Unlock Sequencer
  592. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  593. # Dump Sequencer Registers
  594. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  595. # Dump Graphics Controller Registers
  596. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  597. # Dump Attribute Controller Registers
  598. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  599. # Lock Sequencer
  600. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  601. DAC_IDR, RUN, DAC_OPERATION, 0x02
  602. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  603. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  604. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  605. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  606. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  607. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  608. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  609. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  610. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  611.  
  612. [640,480,8]
  613. # Setting Line Pitch
  614. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  615. CRT,RUN,EXT_MODE,0x00
  616. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  617. # Setting Engine Pitch
  618. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  619. CRT,RUN,MEM_CONFIG,0x89
  620. # Setting Basic Mode Registers.The registers
  621. # below are neither Desktop or Viewport Regs
  622. # Unlock Sequencer
  623. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  624. # Dump Sequencer Registers
  625. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  626. # Dump Graphics Controller Registers
  627. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  628. # Dump Attribute Controller Registers
  629. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  630. # Lock Sequencer
  631. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  632. DAC_IDR, RUN, DAC_OPERATION, 0x02
  633. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  634. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  635. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  636. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  637. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  638. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  639. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  640. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  641. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  642.  
  643. [1600,1200,8,82,66]
  644. # Unlock CRTC
  645. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  646. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  647. CRT,RUN,REG_LOCK_1,0x48,0xa5
  648. # Dump CRT Controller Registers
  649. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  650. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  651. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  652. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  653. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  654. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  655. CRT,RUN,MODE_CONTROL,0x02
  656. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  657. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  658. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  659. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  660. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  661. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  662. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  663. # Lock CRTC Reg 11 for compatibility
  664. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  665. # Dump ENG Register
  666. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  667. # Dump MISCOUT Register
  668. DIR,RUN,MISC_WRITE,0xef
  669. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  670. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  671. CLK_IND, RUN, FREQ_2, 0xd3
  672. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  673. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  674. CRT,RUN,LATCH_DATA, 0x08
  675.  
  676. [1600,1200,8,75,60]
  677. # Unlock CRTC
  678. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  679. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  680. CRT,RUN,REG_LOCK_1,0x48,0xa5
  681. # Dump CRT Controller Registers
  682. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  683. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  684. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  685. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  686. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  687. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  688. CRT,RUN,MODE_CONTROL,0x02
  689. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  690. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  691. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  692. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  693. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  694. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  695. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  696. # Lock CRTC Reg 11 for compatibility
  697. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  698. # Dump ENG Register
  699. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  700. # Dump MISCOUT Register
  701. DIR,RUN,MISC_WRITE,0xef
  702. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  703. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  704. CLK_IND, RUN, FREQ_2, 0xcd
  705. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  706. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  707. CRT,RUN,LATCH_DATA, 0x08
  708.  
  709. [1280,1024,8,95,90]
  710. # Unlock CRTC
  711. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  712. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  713. CRT,RUN,REG_LOCK_1,0x48,0xa5
  714. # Dump CRT Controller Registers
  715. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  716. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  717. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  718. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  719. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  720. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  721. CRT,RUN,MODE_CONTROL,0x02
  722. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  723. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  724. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  725. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  726. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  727. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  728. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  729. # Lock CRTC Reg 11 for compatibility
  730. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  731. # Dump ENG Register
  732. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  733. # Dump MISCOUT Register
  734. DIR,RUN,MISC_WRITE,0xef
  735. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  736. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  737. CLK_IND, RUN, FREQ_2, 0xd0
  738. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  739. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  740. CRT,RUN,LATCH_DATA, 0x08
  741.  
  742.  
  743. [1280,1024,8,79,75]
  744. # Unlock CRTC
  745. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  746. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  747. CRT,RUN,REG_LOCK_1,0x48,0xa5
  748. # Dump CRT Controller Registers
  749. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  750. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  751. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  752. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  753. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  754. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  755. CRT,RUN,MODE_CONTROL,0x02
  756. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  757. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  758. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  759. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  760. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  761. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  762. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  763. # Lock CRTC Reg 11 for compatibility
  764. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  765. # Dump ENG Register
  766. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  767. # Dump MISCOUT Register
  768. DIR,RUN,MISC_WRITE,0xef
  769. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  770. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  771. CLK_IND, RUN, FREQ_2, 0xc1
  772. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  773. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  774. CRT,RUN,LATCH_DATA, 0x08
  775.  
  776. [1280,1024,8,76,72]
  777. # Unlock CRTC
  778. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  779. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  780. CRT,RUN,REG_LOCK_1,0x48,0xa5
  781. # Dump CRT Controller Registers
  782. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  783. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  784. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  785. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  786. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  787. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  788. CRT,RUN,MODE_CONTROL,0x02
  789. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  790. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  791. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  792. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  793. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  794. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  795. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  796. # Lock CRTC Reg 11 for compatibility
  797. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  798. # Dump ENG Register
  799. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  800. # Dump MISCOUT Register
  801. DIR,RUN,MISC_WRITE,0xef
  802. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  803. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  804. CLK_IND, RUN, FREQ_2, 0xc1
  805. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  806. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  807. CRT,RUN,LATCH_DATA, 0x08
  808.  
  809. [1280,1024,8,74,70]
  810. # Unlock CRTC
  811. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  812. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  813. CRT,RUN,REG_LOCK_1,0x48,0xa5
  814. # Dump CRT Controller Registers
  815. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x82,0x28,0x52,0x00,0x40
  816. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  817. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  818. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  819. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  820. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  821. CRT,RUN,MODE_CONTROL,0x02
  822. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  823. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  824. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  825. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  826. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  827. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  828. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  829. # Lock CRTC Reg 11 for compatibility
  830. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  831. # Dump ENG Register
  832. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  833. # Dump MISCOUT Register
  834. DIR,RUN,MISC_WRITE,0xef
  835. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  836. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  837. CLK_IND, RUN, FREQ_2, 0xba
  838. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  839. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  840. CRT,RUN,LATCH_DATA, 0x08
  841.  
  842. [1280,1024,8,64,60]
  843. # Unlock CRTC
  844. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  845. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  846. CRT,RUN,REG_LOCK_1,0x48,0xa5
  847. # Dump CRT Controller Registers
  848. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  849. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x57,0x9e,0x28,0x52,0x00,0x40
  850. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  851. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  852. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  853. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  854. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  855. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  856. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  857. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  858. CRT,RUN,MODE_CONTROL,0x02
  859. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  860. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  861. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  862. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  863. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  864. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  865. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  866. # Lock CRTC Reg 11 for compatibility
  867. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  868. # Dump ENG Register
  869. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  870. # Dump MISCOUT Register
  871. DIR,RUN,MISC_WRITE,0xef
  872. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  873. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  874. ##CLK_IND, RUN, FREQ_2, 0xab
  875. CLK_IND, RUN, FREQ_2, 0xa9
  876. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  877. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  878. CRT,RUN,LATCH_DATA, 0x08
  879.  
  880. [1152,864,8,82,90]
  881. # Unlock CRTC
  882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  885. # Dump CRT Controller Registers
  886. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4e,0x12,0x95,0xff,0x00,0x60
  887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  888. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  889. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  890. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  891. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  892. CRT,RUN,MODE_CONTROL,0x02
  893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  899. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  900. # Lock CRTC Reg 11 for compatibility
  901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  902. # Dump ENG Register
  903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  904. # Dump MISCOUT Register
  905. DIR,RUN,MISC_WRITE,0xef
  906. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  908. CLK_IND, RUN, FREQ_2, 0xb9
  909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  911. CRT,RUN,LATCH_DATA, 0x08
  912.  
  913. [1152,864,8,71,75]
  914. # Unlock CRTC
  915. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  916. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  917. CRT,RUN,REG_LOCK_1,0x48,0xa5
  918. # Dump CRT Controller Registers
  919. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  920. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  921. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  922. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  923. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  924. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  925. CRT,RUN,MODE_CONTROL,0x02
  926. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  927. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  928. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  929. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  930. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  931. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  932. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  933. # Lock CRTC Reg 11 for compatibility
  934. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  935. # Dump ENG Register
  936. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  937. # Dump MISCOUT Register
  938. DIR,RUN,MISC_WRITE,0xef
  939. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  940. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  941. CLK_IND, RUN, FREQ_2, 0xa9
  942. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  943. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  944. CRT,RUN,LATCH_DATA, 0x08
  945.  
  946. [1152,864,8,64,70]
  947. # Unlock CRTC
  948. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  949. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  950. CRT,RUN,REG_LOCK_1,0x48,0xa5
  951. # Dump CRT Controller Registers
  952. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  953. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  954. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  955. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  956. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  957. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  958. CRT,RUN,MODE_CONTROL,0x02
  959. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  960. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  961. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  962. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  963. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  964. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  965. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  966. # Lock CRTC Reg 11 for compatibility
  967. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  968. # Dump ENG Register
  969. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  970. # Dump MISCOUT Register
  971. DIR,RUN,MISC_WRITE,0xef
  972. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  973. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  974. CLK_IND, RUN, FREQ_2, 0x9b
  975. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  976. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  977. CRT,RUN,LATCH_DATA, 0x08
  978.  
  979. [1152,864,8,56,60]
  980. # Unlock CRTC
  981. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  982. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  983. CRT,RUN,REG_LOCK_1,0x48,0xa5
  984. # Dump CRT Controller Registers
  985. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  986. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  987. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  988. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  989. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  990. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  991. CRT,RUN,MODE_CONTROL,0x02
  992. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  993. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  994. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  995. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  996. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  997. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  998. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  999. # Lock CRTC Reg 11 for compatibility
  1000. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1001. # Dump ENG Register
  1002. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1003. # Dump MISCOUT Register
  1004. DIR,RUN,MISC_WRITE,0xef
  1005. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1006. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1007. CLK_IND, RUN, FREQ_2, 0x90
  1008. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1009. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1010. CRT,RUN,LATCH_DATA, 0x08
  1011.  
  1012.  
  1013. [1152,864,16,82,90]
  1014. # Unlock CRTC
  1015. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1016. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1017. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1018. # Dump CRT Controller Registers
  1019. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1020. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1021. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1022. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1023. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1024. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1025. CRT,RUN,MODE_CONTROL,0x02
  1026. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1027. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1028. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1029. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1030. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1031. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1032. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1033. # Lock CRTC Reg 11 for compatibility
  1034. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1035. # Dump ENG Register
  1036. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1037. # Dump MISCOUT Register
  1038. DIR,RUN,MISC_WRITE,0xef
  1039. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1040. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1041. CLK_IND, RUN, FREQ_2, 0xb9
  1042. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1043. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1044. CRT,RUN,LATCH_DATA, 0x00
  1045.  
  1046.  
  1047. [1152,864,16,71,75]
  1048. # Unlock CRTC
  1049. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1050. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1051. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1052. # Dump CRT Controller Registers
  1053. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1054. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1055. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1056. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1057. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1058. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1059. CRT,RUN,MODE_CONTROL,0x02
  1060. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1061. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1062. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1063. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1064. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1065. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1066. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1067. # Lock CRTC Reg 11 for compatibility
  1068. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1069. # Dump ENG Register
  1070. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1071. # Dump MISCOUT Register
  1072. DIR,RUN,MISC_WRITE,0xef
  1073. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1074. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1075. CLK_IND, RUN, FREQ_2, 0xa9
  1076. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1077. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1078. CRT,RUN,LATCH_DATA, 0x00
  1079.  
  1080.  
  1081. [1152,864,16,64,70]
  1082. # Unlock CRTC
  1083. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1084. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1085. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1086. # Dump CRT Controller Registers
  1087. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1088. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1089. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1090. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1091. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1092. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1093. CRT,RUN,MODE_CONTROL,0x02
  1094. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1095. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1096. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1097. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1098. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1099. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1100. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1101. # Lock CRTC Reg 11 for compatibility
  1102. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1103. # Dump ENG Register
  1104. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1105. # Dump MISCOUT Register
  1106. DIR,RUN,MISC_WRITE,0xef
  1107. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1108. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1109. CLK_IND, RUN, FREQ_2, 0x9b
  1110. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1111. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1112. CRT,RUN,LATCH_DATA, 0x00
  1113.  
  1114. [1152,864,16,56,60]
  1115. # Unlock CRTC
  1116. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1117. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1118. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1119. # Dump CRT Controller Registers
  1120. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1121. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1122. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1123. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1124. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1125. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1126. CRT,RUN,MODE_CONTROL,0x02
  1127. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1128. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1129. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1130. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1131. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1132. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1133. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1134. # Lock CRTC Reg 11 for compatibility
  1135. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1136. # Dump ENG Register
  1137. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1138. # Dump MISCOUT Register
  1139. DIR,RUN,MISC_WRITE,0xef
  1140. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1141. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1142. CLK_IND, RUN, FREQ_2, 0x90
  1143. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1144. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1145. CRT,RUN,LATCH_DATA, 0x00
  1146.  
  1147. [1024,768,16,96,120]
  1148. # Unlock CRTC
  1149. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1150. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1151. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1152. # Dump CRT Controller Registers
  1153. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1154. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1155. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1156. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1157. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1158. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1159. CRT,RUN,MODE_CONTROL,0x02
  1160. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1161. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1162. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1163. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1164. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1165. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1166. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1167. # Lock CRTC Reg 11 for compatibility
  1168. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1169. # Dump ENG Register
  1170. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1171. # Dump MISCOUT Register
  1172. DIR,RUN,MISC_WRITE,0xef
  1173. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1174. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1175. CLK_IND, RUN, FREQ_2, 0xbd
  1176. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1177. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1178. CRT,RUN,LATCH_DATA, 0x00
  1179.  
  1180. [1024,768,16,81,100]
  1181. # Unlock CRTC
  1182. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1183. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1184. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1185. # Dump CRT Controller Registers
  1186. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1187. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1188. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1189. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1190. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1191. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1192. CRT,RUN,MODE_CONTROL,0x02
  1193. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1194. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1195. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1196. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1197. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1198. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1199. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1200. # Lock CRTC Reg 11 for compatibility
  1201. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1202. # Dump ENG Register
  1203. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1204. # Dump MISCOUT Register
  1205. DIR,RUN,MISC_WRITE,0xef
  1206. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1207. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1208. CLK_IND, RUN, FREQ_2, 0xa9
  1209. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1210. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1211. CRT,RUN,LATCH_DATA, 0x00
  1212.  
  1213. [1024,768,16,64,80]
  1214. # Unlock CRTC
  1215. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1216. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1217. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1218. # Dump CRT Controller Registers
  1219. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1220. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1221. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1222. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1223. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1224. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1225. CRT,RUN,MODE_CONTROL,0x02
  1226. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1227. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1228. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1229. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1230. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1231. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1232. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1233. # Lock CRTC Reg 11 for compatibility
  1234. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1235. # Dump ENG Register
  1236. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1237. # Dump MISCOUT Register
  1238. DIR,RUN,MISC_WRITE,0xef
  1239. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1240. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1241. CLK_IND, RUN, FREQ_2, 0x93
  1242. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1243. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1244. CRT,RUN,LATCH_DATA, 0x00
  1245.  
  1246. [1024,768,16,60,75]
  1247. # Unlock CRTC
  1248. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1249. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1250. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1251. # Dump CRT Controller Registers
  1252. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1253. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1254. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1255. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1256. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1257. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1258. CRT,RUN,MODE_CONTROL,0x02
  1259. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1260. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1261. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1262. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1263. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1264. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1265. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1266. # Lock CRTC Reg 11 for compatibility
  1267. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1268. # Dump ENG Register
  1269. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1270. # Dump MISCOUT Register
  1271. DIR,RUN,MISC_WRITE,0xef
  1272. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1273. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1274. CLK_IND, RUN, FREQ_2, 0x8c
  1275. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1276. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1277. CRT,RUN,LATCH_DATA, 0x00
  1278.  
  1279. [1024,768,16,58,72]
  1280. # Unlock CRTC
  1281. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1282. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1283. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1284. # Dump CRT Controller Registers
  1285. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1286. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1287. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1288. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1289. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1290. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1291. CRT,RUN,MODE_CONTROL,0x02
  1292. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1293. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1294. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1295. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1296. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1297. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1298. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1299. # Lock CRTC Reg 11 for compatibility
  1300. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1301. # Dump ENG Register
  1302. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1303. # Dump MISCOUT Register
  1304. DIR,RUN,MISC_WRITE,0xef
  1305. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1306. CLK_IND, RUN, FREQ_2,0x88
  1307. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1308. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1309. CLK_IND, RUN, FREQ_2, 0x88
  1310. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1311. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1312. CRT,RUN,LATCH_DATA, 0x00
  1313.  
  1314. [1024,768,16,56,70]
  1315. # Unlock CRTC
  1316. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1317. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1318. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1319. # Dump CRT Controller Registers
  1320. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1321. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1322. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1323. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1324. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1325. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1326. CRT,RUN,MODE_CONTROL,0x02
  1327. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1328. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1329. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1330. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1331. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1332. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1333. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1334. # Lock CRTC Reg 11 for compatibility
  1335. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1336. # Dump ENG Register
  1337. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1338. # Dump MISCOUT Register
  1339. DIR,RUN,MISC_WRITE,0xef
  1340. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1341. CLK_IND, RUN, FREQ_2,0x88
  1342. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1343. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1344. CLK_IND, RUN, FREQ_2, 0x88
  1345. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1346. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1347. CRT,RUN,LATCH_DATA, 0x00
  1348.  
  1349. [1024,768,16,48,60]
  1350. # Unlock CRTC
  1351. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1352. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1353. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1354. # Dump CRT Controller Registers
  1355. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1356. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1357. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1358. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1359. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1360. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1361. CRT,RUN,MODE_CONTROL,0x02
  1362. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1363. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1364. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1365. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1366. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1367. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1368. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1369. # Lock CRTC Reg 11 for compatibility
  1370. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1371. # Dump ENG Register
  1372. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1373. # Dump MISCOUT Register
  1374. DIR,RUN,MISC_WRITE,0xef
  1375. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1376. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1377. CLK_IND, RUN, FREQ_2, 0x7E
  1378. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1379. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1380. CRT,RUN,LATCH_DATA, 0x00
  1381.  
  1382. [1024,768,8,96,120]
  1383. # Unlock CRTC
  1384. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1385. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1386. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1387. # Dump CRT Controller Registers
  1388. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1389. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1390. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1391. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1392. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1393. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1394. CRT,RUN,MODE_CONTROL,0x02
  1395. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1396. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1397. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1398. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1399. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1400. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1401. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1402. # Lock CRTC Reg 11 for compatibility
  1403. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1404. # Dump ENG Register
  1405. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1406. # Dump MISCOUT Register
  1407. DIR,RUN,MISC_WRITE,0xef
  1408. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1409. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1410. CLK_IND, RUN, FREQ_2, 0xbd
  1411. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1412. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1413. CRT,RUN,LATCH_DATA, 0x08
  1414.  
  1415. [1024,768,8,81,100]
  1416. # Unlock CRTC
  1417. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1418. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1419. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1420. # Dump CRT Controller Registers
  1421. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1422. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1423. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1424. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1425. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1426. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1427. CRT,RUN,MODE_CONTROL,0x02
  1428. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1429. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1430. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1431. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1432. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1433. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1434. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1435. # Lock CRTC Reg 11 for compatibility
  1436. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1437. # Dump ENG Register
  1438. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1439. # Dump MISCOUT Register
  1440. DIR,RUN,MISC_WRITE,0xef
  1441. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1442. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1443. CLK_IND, RUN, FREQ_2, 0xa9
  1444. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1445. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1446. CRT,RUN,LATCH_DATA, 0x08
  1447.  
  1448.  
  1449. [1024,768,8,64,80]
  1450. # Unlock CRTC
  1451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1453. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1454. # Dump CRT Controller Registers
  1455. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1457. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1458. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1459. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1460. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1461. CRT,RUN,MODE_CONTROL,0x02
  1462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1464. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1469. # Lock CRTC Reg 11 for compatibility
  1470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1471. # Dump ENG Register
  1472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1473. # Dump MISCOUT Register
  1474. DIR,RUN,MISC_WRITE,0xef
  1475. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1476. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1477. CLK_IND, RUN, FREQ_2, 0x93
  1478. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1479. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1480. CRT,RUN,LATCH_DATA, 0x08
  1481.  
  1482. [1024,768,8,60,75]
  1483. # Unlock CRTC
  1484. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1485. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1486. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1487. # Dump CRT Controller Registers
  1488. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1489. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1490. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1491. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1492. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1493. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1494. CRT,RUN,MODE_CONTROL,0x02
  1495. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1496. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1497. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1498. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1499. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1500. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1501. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1502. # Lock CRTC Reg 11 for compatibility
  1503. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1504. # Dump ENG Register
  1505. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1506. # Dump MISCOUT Register
  1507. DIR,RUN,MISC_WRITE,0xef
  1508. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1509. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1510. CLK_IND, RUN, FREQ_2, 0x8c
  1511. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1512. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1513. CRT,RUN,LATCH_DATA, 0x08
  1514.  
  1515. [1024,768,8,58,72]
  1516. # Unlock CRTC
  1517. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1518. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1519. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1520. # Dump CRT Controller Registers
  1521. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1522. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1523. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1524. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1525. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1526. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1527. CRT,RUN,MODE_CONTROL,0x02
  1528. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1529. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1530. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1531. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1532. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1533. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1534. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1535. # Lock CRTC Reg 11 for compatibility
  1536. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1537. # Dump ENG Register
  1538. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1539. # Dump MISCOUT Register
  1540. DIR,RUN,MISC_WRITE,0xef
  1541. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1542. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1543. CLK_IND, RUN, FREQ_2, 0x88
  1544. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1545. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1546. CRT,RUN,LATCH_DATA, 0x08
  1547.  
  1548. [1024,768,8,56,70]
  1549. # Unlock CRTC
  1550. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1551. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1552. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1553. # Dump CRT Controller Registers
  1554. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1555. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1556. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1557. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1558. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1559. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1560. CRT,RUN,MODE_CONTROL,0x02
  1561. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1562. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1563. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1564. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1565. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1566. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1567. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1568. # Lock CRTC Reg 11 for compatibility
  1569. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1570. # Dump ENG Register
  1571. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1572. # Dump MISCOUT Register
  1573. DIR,RUN,MISC_WRITE,0xef
  1574. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1575. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1576. CLK_IND, RUN, FREQ_2, 0x88
  1577. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1578. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1579. CRT,RUN,LATCH_DATA, 0x08
  1580.  
  1581. [1024,768,8,48,60]
  1582. # Unlock CRTC
  1583. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1584. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1585. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1586. # Dump CRT Controller Registers
  1587. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1588. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1589. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1590. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1591. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1592. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1593. CRT,RUN,MODE_CONTROL,0x02
  1594. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1595. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1596. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1597. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1598. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1599. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1600. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1601. # Lock CRTC Reg 11 for compatibility
  1602. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1603. # Dump ENG Register
  1604. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1605. # Dump MISCOUT Register
  1606. DIR,RUN,MISC_WRITE,0xef
  1607. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1608. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1609. CLK_IND, RUN, FREQ_2, 0x7e
  1610. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1611. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1612. CRT,RUN,LATCH_DATA, 0x08
  1613.  
  1614. [800,600,32,75,120]
  1615. # Unlock CRTC
  1616. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1617. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1618. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1619. # Dump CRT Controller Registers
  1620. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1621. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1622. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1623. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1624. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1625. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1626. CRT,RUN,MODE_CONTROL,0x02
  1627. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1628. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1629. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1630. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1631. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1632. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1633. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1634. # Lock CRTC Reg 11 for compatibility
  1635. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1636. # Dump ENG Register
  1637. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1638. # Dump MISCOUT Register
  1639. DIR,RUN,MISC_WRITE,0xef
  1640. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1641. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1642. CLK_IND, RUN, FREQ_2, 0x8a
  1643. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1644. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1645. CRT,RUN,LATCH_DATA, 0x00
  1646.  
  1647. [800,600,32,64,100]
  1648. # Unlock CRTC
  1649. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1650. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1651. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1652. # Dump CRT Controller Registers
  1653. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1654. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1655. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1656. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1657. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1658. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1659. CRT,RUN,MODE_CONTROL,0x02
  1660. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1661. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1662. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1663. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1664. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1665. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1666. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1667. # Lock CRTC Reg 11 for compatibility
  1668. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1669. # Dump ENG Register
  1670. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1671. # Dump MISCOUT Register
  1672. DIR,RUN,MISC_WRITE,0xef
  1673. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1674. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1675. CLK_IND, RUN, FREQ_2, 0x7e
  1676. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1677. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1678. CRT,RUN,LATCH_DATA, 0x00
  1679.  
  1680. [800,600,32,56,90]
  1681. # Unlock CRTC
  1682. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1683. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1684. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1685. # Dump CRT Controller Registers
  1686. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1687. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1688. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1689. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1690. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1691. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1692. CRT,RUN,MODE_CONTROL,0x02
  1693. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1694. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1695. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1696. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1697. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1698. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1699. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1700. # Lock CRTC Reg 11 for compatibility
  1701. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1702. # Dump ENG Register
  1703. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1704. # Dump MISCOUT Register
  1705. DIR,RUN,MISC_WRITE,0xef
  1706. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1707. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1708. CLK_IND, RUN, FREQ_2, 0x70
  1709. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1710. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1711. CRT,RUN,LATCH_DATA, 0x00
  1712.  
  1713. [800,600,32,46,75]
  1714. # Unlock CRTC
  1715. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1716. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1717. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1718. # Dump CRT Controller Registers
  1719. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1720. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1721. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1722. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1723. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1724. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1725. CRT,RUN,MODE_CONTROL,0x02
  1726. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1727. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1728. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1729. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1730. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1731. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1732. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1733. # Lock CRTC Reg 11 for compatibility
  1734. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1735. # Dump ENG Register
  1736. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1737. # Dump MISCOUT Register
  1738. DIR,RUN,MISC_WRITE,0xef
  1739. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1740. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1741. CLK_IND, RUN, FREQ_2, 0x60
  1742. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1743. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1744. CRT,RUN,LATCH_DATA, 0x00
  1745.  
  1746. [800,600,32,48,72]
  1747. # Unlock CRTC
  1748. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1749. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1750. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1751. # Dump CRT Controller Registers
  1752. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1753. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1754. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1755. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1756. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1757. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1758. CRT,RUN,MODE_CONTROL,0x02
  1759. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1760. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1761. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1762. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1763. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1764. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1765. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1766. # Lock CRTC Reg 11 for compatibility
  1767. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1768. # Dump ENG Register
  1769. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1770. # Dump MISCOUT Register
  1771. DIR,RUN,MISC_WRITE,0xef
  1772. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1773. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1774. CLK_IND, RUN, FREQ_2, 0x61
  1775. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1776. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1777. CRT,RUN,LATCH_DATA, 0x00
  1778.  
  1779. [800,600,32,37,60]
  1780. # Unlock CRTC
  1781. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1782. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1783. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1784. # Dump CRT Controller Registers
  1785. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1786. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1787. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1788. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1789. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1790. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1791. CRT,RUN,MODE_CONTROL,0x02
  1792. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1793. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1794. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1795. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1796. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1797. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1798. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1799. # Lock CRTC Reg 11 for compatibility
  1800. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1801. # Dump ENG Register
  1802. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1803. # Dump MISCOUT Register
  1804. DIR,RUN,MISC_WRITE,0xef
  1805. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1806. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1807. CLK_IND, RUN, FREQ_2, 0x4D
  1808. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1809. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1810. CRT,RUN,LATCH_DATA, 0x00
  1811.  
  1812.  
  1813. [800,600,32,35,56]
  1814. # Unlock CRTC
  1815. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1816. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1817. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1818. # Dump CRT Controller Registers
  1819. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1820. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1821. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1822. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1823. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1824. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1825. CRT,RUN,MODE_CONTROL,0x02
  1826. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1827. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1828. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1829. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1830. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1831. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1832. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1833. # Lock CRTC Reg 11 for compatibility
  1834. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1835. # Dump ENG Register
  1836. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1837. # Dump MISCOUT Register
  1838. DIR,RUN,MISC_WRITE,0xef
  1839. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1840. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1841. CLK_IND, RUN, FREQ_2, 0x45
  1842. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1843. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1844. CRT,RUN,LATCH_DATA, 0x00
  1845.  
  1846. [800,600,24,75,120]
  1847. # Unlock CRTC
  1848. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1849. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1850. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1851. # Dump CRT Controller Registers
  1852. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1853. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1854. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1855. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1856. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1857. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1858. CRT,RUN,MODE_CONTROL,0x02
  1859. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1860. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1861. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1862. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1863. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1864. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1865. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1866. # Lock CRTC Reg 11 for compatibility
  1867. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1868. # Dump ENG Register
  1869. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1870. # Dump MISCOUT Register
  1871. DIR,RUN,MISC_WRITE,0xef
  1872. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1873. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1874. CLK_IND, RUN, FREQ_2, 0x8a
  1875. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1876. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1877. CRT,RUN,LATCH_DATA, 0x00
  1878.  
  1879.  
  1880. [800,600,24,64,100]
  1881. # Unlock CRTC
  1882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1885. # Dump CRT Controller Registers
  1886. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  1887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1888. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1889. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1890. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1891. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1892. CRT,RUN,MODE_CONTROL,0x02
  1893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1899. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1900. # Lock CRTC Reg 11 for compatibility
  1901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1902. # Dump ENG Register
  1903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1904. # Dump MISCOUT Register
  1905. DIR,RUN,MISC_WRITE,0xef
  1906. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1908. CLK_IND, RUN, FREQ_2, 0x7e
  1909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1911. CRT,RUN,LATCH_DATA, 0x00
  1912.  
  1913.  
  1914. [800,600,24,56,90]
  1915. # Unlock CRTC
  1916. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1917. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1918. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1919. # Dump CRT Controller Registers
  1920. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  1921. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1922. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1923. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1924. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1925. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1926. CRT,RUN,MODE_CONTROL,0x02
  1927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1930. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1933. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1934. # Lock CRTC Reg 11 for compatibility
  1935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1936. # Dump ENG Register
  1937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1938. # Dump MISCOUT Register
  1939. DIR,RUN,MISC_WRITE,0xef
  1940. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1942. CLK_IND, RUN, FREQ_2, 0x70
  1943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1945. CRT,RUN,LATCH_DATA, 0x00
  1946.  
  1947.  
  1948. [800,600,24,46,75]
  1949. # Unlock CRTC
  1950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1952. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1953. # Dump CRT Controller Registers
  1954. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  1955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1956. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1957. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1958. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1959. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1960. CRT,RUN,MODE_CONTROL,0x02
  1961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1963. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1967. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1968. # Lock CRTC Reg 11 for compatibility
  1969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1970. # Dump ENG Register
  1971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1972. # Dump MISCOUT Register
  1973. DIR,RUN,MISC_WRITE,0xef
  1974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1976. CLK_IND, RUN, FREQ_2, 0x60
  1977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1979. CRT,RUN,LATCH_DATA, 0x00
  1980.  
  1981.  
  1982. [800,600,24,48,72]
  1983. # Unlock CRTC
  1984. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1985. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1986. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1987. # Dump CRT Controller Registers
  1988. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  1989. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  1990. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1991. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  1992. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  1993. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1994. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  1995. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1996. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1997. CRT,RUN,MODE_CONTROL,0x02
  1998. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1999. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2000. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2001. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2002. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2003. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2004. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2005. # Lock CRTC Reg 11 for compatibility
  2006. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2007. # Dump ENG Register
  2008. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2009. # Dump MISCOUT Register
  2010. DIR,RUN,MISC_WRITE,0xef
  2011. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2012. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2013. ##CLK_IND, RUN, FREQ_2, 0x61
  2014. CLK_IND, RUN, FREQ_2, 0x62
  2015. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2016. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2017. CRT,RUN,LATCH_DATA, 0x00
  2018.  
  2019. [800,600,24,37,60]
  2020. # Unlock CRTC
  2021. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2022. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2023. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2024. # Dump CRT Controller Registers
  2025. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  2026. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2027. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2028. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2029. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2030. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2031. CRT,RUN,MODE_CONTROL,0x02
  2032. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2033. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2034. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2035. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2036. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2037. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2038. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2039. # Lock CRTC Reg 11 for compatibility
  2040. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2041. # Dump ENG Register
  2042. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2043. # Dump MISCOUT Register
  2044. DIR,RUN,MISC_WRITE,0xef
  2045. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2046. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2047. CLK_IND, RUN, FREQ_2, 0x4d
  2048. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2049. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2050. CRT,RUN,LATCH_DATA, 0x00
  2051.  
  2052.  
  2053. [800,600,24,35,56]
  2054. # Unlock CRTC
  2055. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2056. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2057. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2058. # Dump CRT Controller Registers
  2059. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  2060. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2061. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2062. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2063. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2064. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2065. CRT,RUN,MODE_CONTROL,0x02
  2066. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2067. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2068. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2069. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2070. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2071. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2072. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2073. # Lock CRTC Reg 11 for compatibility
  2074. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2075. # Dump ENG Register
  2076. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2077. # Dump MISCOUT Register
  2078. DIR,RUN,MISC_WRITE,0xef
  2079. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2080. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2081. CLK_IND, RUN, FREQ_2, 0x45
  2082. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2083. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2084. CRT,RUN,LATCH_DATA, 0x00
  2085.  
  2086. [800,600,16,75,120]
  2087. # Unlock CRTC
  2088. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2089. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2090. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2091. # Dump CRT Controller Registers
  2092. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2093. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2094. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2095. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2096. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2097. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2098. CRT,RUN,MODE_CONTROL,0x02
  2099. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2100. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2101. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2102. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2103. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2104. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2105. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2106. # Lock CRTC Reg 11 for compatibility
  2107. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2108. # Dump ENG Register
  2109. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2110. # Dump MISCOUT Register
  2111. DIR,RUN,MISC_WRITE,0xef
  2112. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2113. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2114. CLK_IND, RUN, FREQ_2, 0x8a
  2115. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2116. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2117. CRT,RUN,LATCH_DATA, 0x00
  2118.  
  2119. [800,600,16,64,100]
  2120. # Unlock CRTC
  2121. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2122. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2123. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2124. # Dump CRT Controller Registers
  2125. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2126. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2127. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2128. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2129. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2130. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2131. CRT,RUN,MODE_CONTROL,0x02
  2132. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2133. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2134. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2135. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2136. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2137. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2138. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2139. # Lock CRTC Reg 11 for compatibility
  2140. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2141. # Dump ENG Register
  2142. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2143. # Dump MISCOUT Register
  2144. DIR,RUN,MISC_WRITE,0xef
  2145. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2146. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2147. CLK_IND, RUN, FREQ_2, 0x7e
  2148. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2149. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2150. CRT,RUN,LATCH_DATA, 0x00
  2151.  
  2152. [800,600,16,56,90]
  2153. # Unlock CRTC
  2154. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2155. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2156. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2157. # Dump CRT Controller Registers
  2158. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2159. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2160. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2161. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2162. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2163. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2164. CRT,RUN,MODE_CONTROL,0x02
  2165. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2166. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2167. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2168. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2169. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2170. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2171. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2172. # Lock CRTC Reg 11 for compatibility
  2173. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2174. # Dump ENG Register
  2175. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2176. # Dump MISCOUT Register
  2177. DIR,RUN,MISC_WRITE,0xef
  2178. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2179. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2180. CLK_IND, RUN, FREQ_2, 0x70
  2181. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2182. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2183. CRT,RUN,LATCH_DATA, 0x00
  2184.  
  2185. [800,600,16,46,75]
  2186. # Unlock CRTC
  2187. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2188. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2189. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2190. # Dump CRT Controller Registers
  2191. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2192. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2193. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2194. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2195. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2196. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2197. CRT,RUN,MODE_CONTROL,0x02
  2198. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2199. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2200. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2201. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2202. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2203. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2204. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2205. # Lock CRTC Reg 11 for compatibility
  2206. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2207. # Dump ENG Register
  2208. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2209. # Dump MISCOUT Register
  2210. DIR,RUN,MISC_WRITE,0xef
  2211. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2212. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2213. CLK_IND, RUN, FREQ_2, 0x60
  2214. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2215. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2216. CRT,RUN,LATCH_DATA, 0x00
  2217.  
  2218. [800,600,16,48,72]
  2219. # Unlock CRTC
  2220. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2221. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2222. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2223. # Dump CRT Controller Registers
  2224. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2225. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2226. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2227. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2228. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2229. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2230. CRT,RUN,MODE_CONTROL,0x02
  2231. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2232. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2233. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2234. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2235. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2236. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2237. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2238. # Lock CRTC Reg 11 for compatibility
  2239. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2240. # Dump ENG Register
  2241. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2242. # Dump MISCOUT Register
  2243. DIR,RUN,MISC_WRITE,0xef
  2244. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2245. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2246. CLK_IND, RUN, FREQ_2, 0x61
  2247. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2248. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2249. CRT,RUN,LATCH_DATA, 0x00
  2250.  
  2251. [800,600,16,37,60]
  2252. # Unlock CRTC
  2253. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2254. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2255. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2256. # Dump CRT Controller Registers
  2257. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2258. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2259. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2260. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2261. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2262. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2263. CRT,RUN,MODE_CONTROL,0x02
  2264. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2265. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2266. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2267. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2268. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2269. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2270. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2271. # Lock CRTC Reg 11 for compatibility
  2272. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2273. # Dump ENG Register
  2274. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2275. # Dump MISCOUT Register
  2276. DIR,RUN,MISC_WRITE,0xef
  2277. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2278. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2279. CLK_IND, RUN, FREQ_2, 0x4D
  2280. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2281. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2282. CRT,RUN,LATCH_DATA, 0x00
  2283.  
  2284.  
  2285. [800,600,16,35,56]
  2286. # Unlock CRTC
  2287. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2288. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2289. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2290. # Dump CRT Controller Registers
  2291. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2292. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2293. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2294. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2295. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2296. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2297. CRT,RUN,MODE_CONTROL,0x02
  2298. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2299. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2300. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2301. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2302. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2303. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2304. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2305. # Lock CRTC Reg 11 for compatibility
  2306. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2307. # Dump ENG Register
  2308. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2309. # Dump MISCOUT Register
  2310. DIR,RUN,MISC_WRITE,0xef
  2311. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2312. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2313. CLK_IND, RUN, FREQ_2, 0x45
  2314. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2315. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2316. CRT,RUN,LATCH_DATA, 0x00
  2317.  
  2318. [800,600,8,75,120]
  2319. # Unlock CRTC
  2320. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2321. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2322. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2323. # Dump CRT Controller Registers
  2324. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2325. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2326. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2327. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2328. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2329. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2330. CRT,RUN,MODE_CONTROL,0x02
  2331. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2332. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2333. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2334. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2335. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2336. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2337. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2338. # Lock CRTC Reg 11 for compatibility
  2339. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2340. # Dump ENG Register
  2341. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2342. # Dump MISCOUT Register
  2343. DIR,RUN,MISC_WRITE,0xef
  2344. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2345. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2346. CLK_IND, RUN, FREQ_2, 0x8a
  2347. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2348. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2349. CRT,RUN,LATCH_DATA, 0x08
  2350.  
  2351. [800,600,8,64,100]
  2352. # Unlock CRTC
  2353. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2354. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2355. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2356. # Dump CRT Controller Registers
  2357. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2358. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2359. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2360. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2361. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2362. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2363. CRT,RUN,MODE_CONTROL,0x02
  2364. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2365. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2366. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2367. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2368. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2369. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2370. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2371. # Lock CRTC Reg 11 for compatibility
  2372. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2373. # Dump ENG Register
  2374. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2375. # Dump MISCOUT Register
  2376. DIR,RUN,MISC_WRITE,0xef
  2377. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2378. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2379. CLK_IND, RUN, FREQ_2, 0x7e
  2380. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2381. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2382. CRT,RUN,LATCH_DATA, 0x08
  2383.  
  2384. [800,600,8,56,90]
  2385. # Unlock CRTC
  2386. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2387. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2388. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2389. # Dump CRT Controller Registers
  2390. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2391. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2392. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2393. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2394. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2395. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2396. CRT,RUN,MODE_CONTROL,0x02
  2397. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2398. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2399. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2400. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2401. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2402. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2403. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2404. # Lock CRTC Reg 11 for compatibility
  2405. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2406. # Dump ENG Register
  2407. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2408. # Dump MISCOUT Register
  2409. DIR,RUN,MISC_WRITE,0xef
  2410. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2411. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2412. CLK_IND, RUN, FREQ_2, 0x70
  2413. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2414. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2415. CRT,RUN,LATCH_DATA, 0x08
  2416.  
  2417. [800,600,8,46,75]
  2418. # Unlock CRTC
  2419. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2420. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2421. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2422. # Dump CRT Controller Registers
  2423. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2424. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2425. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2426. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2427. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2428. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2429. CRT,RUN,MODE_CONTROL,0x02
  2430. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2431. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2432. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2433. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2434. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2435. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2436. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2437. # Lock CRTC Reg 11 for compatibility
  2438. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2439. # Dump ENG Register
  2440. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2441. # Dump MISCOUT Register
  2442. DIR,RUN,MISC_WRITE,0xef
  2443. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2444. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2445. CLK_IND, RUN, FREQ_2, 0x60
  2446. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2447. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2448. CRT,RUN,LATCH_DATA, 0x08
  2449.  
  2450. [800,600,8,48,72]
  2451. # Unlock CRTC
  2452. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2453. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2454. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2455. # Dump CRT Controller Registers
  2456. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2457. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2458. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2459. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2460. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2461. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2462. CRT,RUN,MODE_CONTROL,0x02
  2463. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2464. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2465. CbRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2466. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2467. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2468. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2469. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2470. # Lock CRTC Reg 11 for compatibility
  2471. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2472. # Dump ENG Register
  2473. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2474. # Dump MISCOUT Register
  2475. DIR,RUN,MISC_WRITE,0xef
  2476. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2477. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2478. CLK_IND, RUN, FREQ_2, 0x61
  2479. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2480. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2481. CRT,RUN,LATCH_DATA, 0x08
  2482.  
  2483. [800,600,8,37,60]
  2484. # Unlock CRTC
  2485. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2486. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2487. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2488. # Dump CRT Controller Registers
  2489. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2490. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2491. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2492. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2493. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2494. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2495. CRT,RUN,MODE_CONTROL,0x02
  2496. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2497. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2498. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2499. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2500. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2501. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2502. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2503. # Lock CRTC Reg 11 for compatibility
  2504. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2505. # Dump ENG Register
  2506. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2507. # Dump MISCOUT Register
  2508. DIR,RUN,MISC_WRITE,0xef
  2509. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2510. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2511. CLK_IND, RUN, FREQ_2, 0x4D
  2512. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2513. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2514. CRT,RUN,LATCH_DATA, 0x08
  2515.  
  2516. [800,600,8,35,56]
  2517. # Unlock CRTC
  2518. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2519. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2520. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2521. # Dump CRT Controller Registers
  2522. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2523. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2524. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2525. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2526. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2527. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2528. CRT,RUN,MODE_CONTROL,0x02
  2529. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2530. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2531. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2532. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2533. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2534. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2535. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2536. # Lock CRTC Reg 11 for compatibility
  2537. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2538. # Dump ENG Register
  2539. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2540. # Dump MISCOUT Register
  2541. DIR,RUN,MISC_WRITE,0xef
  2542. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2543. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2544. CLK_IND, RUN, FREQ_2, 0x45
  2545. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2546. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2547. CRT,RUN,LATCH_DATA, 0x08
  2548.  
  2549. [640,480,24,64,120]
  2550. # Unlock CRTC
  2551. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2552. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2553. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2554. # Dump CRT Controller Registers
  2555. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  2556. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2557. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2558. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2559. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2560. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2561. CRT,RUN,MODE_CONTROL,0x02
  2562. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2563. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2564. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2565. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2566. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2567. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2568. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2569. # Lock CRTC Reg 11 for compatibility
  2570. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2571. # Dump ENG Register
  2572. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2573. # Dump MISCOUT Register
  2574. DIR,RUN,MISC_WRITE,0xef
  2575. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2576. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2577. CLK_IND, RUN, FREQ_2, 0x67
  2578. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2579. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2580. CRT,RUN,LATCH_DATA, 0x00
  2581.  
  2582.  
  2583. [640,480,24,52,100]
  2584. # Unlock CRTC
  2585. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2586. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2587. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2588. # Dump CRT Controller Registers
  2589. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2590. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2591. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2592. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2593. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2594. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2595. CRT,RUN,MODE_CONTROL,0x02
  2596. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2597. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2598. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2599. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2600. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2601. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2602. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2603. # Lock CRTC Reg 11 for compatibility
  2604. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2605. # Dump ENG Register
  2606. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2607. # Dump MISCOUT Register
  2608. DIR,RUN,MISC_WRITE,0xef
  2609. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2610. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2611. CLK_IND, RUN, FREQ_2, 0x50
  2612. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2613. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2614. CRT,RUN,LATCH_DATA, 0x00
  2615.  
  2616. [640,480,24,48,90]
  2617. # Unlock CRTC
  2618. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2619. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2620. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2621. # Dump CRT Controller Registers
  2622. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2623. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2624. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2625. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2626. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2627. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2628. CRT,RUN,MODE_CONTROL,0x02
  2629. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2630. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2631. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2632. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2633. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2634. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2635. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2636. # Lock CRTC Reg 11 for compatibility
  2637. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2638. # Dump ENG Register
  2639. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2640. # Dump MISCOUT Register
  2641. DIR,RUN,MISC_WRITE,0xef
  2642. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2643. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2644. CLK_IND, RUN, FREQ_2, 0x4d
  2645. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2646. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2647. CRT,RUN,LATCH_DATA, 0x00
  2648.  
  2649.  
  2650. [640,480,24,37,75]
  2651. # Unlock CRTC
  2652. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2653. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2654. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2655. # Dump CRT Controller Registers
  2656. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  2657. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2658. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2659. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  2660. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2661. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  2662. CRT,RUN,MODE_CONTROL,0x02
  2663. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2664. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2665. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2666. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2667. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2669. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2670. # Lock CRTC Reg 11 for compatibility
  2671. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2672. # Dump ENG Register
  2673. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2674. # Dump MISCOUT Register
  2675. DIR,RUN,MISC_WRITE,0xef
  2676. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2677. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2678. CLK_IND, RUN, FREQ_2, 0x39
  2679. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2680. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2681. CRT,RUN,LATCH_DATA, 0x00
  2682.  
  2683. [640,480,24,37,72]
  2684. # Unlock CRTC
  2685. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2686. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2687. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2688. # Dump CRT Controller Registers
  2689. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  2690. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2691. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2692. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2693. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2694. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2695. CRT,RUN,MODE_CONTROL,0x02
  2696. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2697. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2698. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2699. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2700. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2702. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2703. # Lock CRTC Reg 11 for compatibility
  2704. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2705. # Dump ENG Register
  2706. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2707. # Dump MISCOUT Register
  2708. DIR,RUN,MISC_WRITE,0xef
  2709. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2710. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2711. CLK_IND, RUN, FREQ_2, 0x3a
  2712. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2713. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2714. CRT,RUN,LATCH_DATA, 0x00
  2715.  
  2716. [640,480,24,31,60]
  2717. # Unlock CRTC
  2718. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2719. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2720. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2721. # Dump CRT Controller Registers
  2722. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  2723. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2724. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2725. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  2726. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2727. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2728. CRT,RUN,MODE_CONTROL,0x02
  2729. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2730. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2731. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2732. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2733. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2735. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2736. # Lock CRTC Reg 11 for compatibility
  2737. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2738. # Dump ENG Register
  2739. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2740. # Dump MISCOUT Register
  2741. DIR,RUN,MISC_WRITE,0xef
  2742. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2743. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2744. CLK_IND, RUN, FREQ_2, 0x21
  2745. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2746. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2747. CRT,RUN,LATCH_DATA, 0x00
  2748.  
  2749. [640,480,32,64,120]
  2750. # Unlock CRTC
  2751. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2752. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2753. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2754. # Dump CRT Controller Registers
  2755. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2756. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2757. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2758. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2759. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2760. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2761. CRT,RUN,MODE_CONTROL,0x02
  2762. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2763. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2764. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2765. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2766. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2768. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2769. # Lock CRTC Reg 11 for compatibility
  2770. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2771. # Dump ENG Register
  2772. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2773. # Dump MISCOUT Register
  2774. DIR,RUN,MISC_WRITE,0xef
  2775. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2776. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2777. CLK_IND, RUN, FREQ_2, 0x67
  2778. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2779. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2780. CRT,RUN,LATCH_DATA, 0x00
  2781.  
  2782. [640,480,32,52,100]
  2783. # Unlock CRTC
  2784. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2785. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2786. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2787. # Dump CRT Controller Registers
  2788. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2789. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2790. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2791. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2792. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2793. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2794. CRT,RUN,MODE_CONTROL,0x02
  2795. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2796. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2797. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2798. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2799. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2801. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2802. # Lock CRTC Reg 11 for compatibility
  2803. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2804. # Dump ENG Register
  2805. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2806. # Dump MISCOUT Register
  2807. DIR,RUN,MISC_WRITE,0xef
  2808. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2809. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2810. CLK_IND, RUN, FREQ_2, 0x50
  2811. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2812. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2813. CRT,RUN,LATCH_DATA, 0x00
  2814.  
  2815. [640,480,32,48,90]
  2816. # Unlock CRTC
  2817. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2818. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2819. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2820. # Dump CRT Controller Registers
  2821. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2822. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2823. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2824. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2825. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2826. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2827. CRT,RUN,MODE_CONTROL,0x02
  2828. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2829. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2830. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2831. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2832. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2834. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2835. # Lock CRTC Reg 11 for compatibility
  2836. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2837. # Dump ENG Register
  2838. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2839. # Dump MISCOUT Register
  2840. DIR,RUN,MISC_WRITE,0xef
  2841. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2842. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2843. CLK_IND, RUN, FREQ_2, 0x4d
  2844. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2845. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2846. CRT,RUN,LATCH_DATA, 0x00
  2847.  
  2848. [640,480,32,37,75]
  2849. # Unlock CRTC
  2850. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2851. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2852. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2853. # Dump CRT Controller Registers
  2854. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2855. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2856. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2857. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2858. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2859. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2860. CRT,RUN,MODE_CONTROL,0x02
  2861. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2862. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2863. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2864. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2865. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2866. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2867. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2868. # Lock CRTC Reg 11 for compatibility
  2869. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2870. # Dump ENG Register
  2871. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2872. # Dump MISCOUT Register
  2873. DIR,RUN,MISC_WRITE,0xef
  2874. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2875. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2876. CLK_IND, RUN, FREQ_2, 0x3a
  2877. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2878. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2879. CRT,RUN,LATCH_DATA, 0x00
  2880.  
  2881. [640,480,32,37,72]
  2882. # Unlock CRTC
  2883. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2884. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2885. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2886. # Dump CRT Controller Registers
  2887. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2888. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2889. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2890. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2891. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2892. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2893. CRT,RUN,MODE_CONTROL,0x02
  2894. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2895. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2896. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2897. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2898. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2900. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2901. # Lock CRTC Reg 11 for compatibility
  2902. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2903. # Dump ENG Register
  2904. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2905. # Dump MISCOUT Register
  2906. DIR,RUN,MISC_WRITE,0xef
  2907. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2908. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2909. CLK_IND, RUN, FREQ_2, 0x3a
  2910. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2911. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2912. CRT,RUN,LATCH_DATA, 0x00
  2913.  
  2914. [640,480,32,31,60]
  2915. # Unlock CRTC
  2916. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2917. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2918. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2919. # Dump CRT Controller Registers
  2920. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2921. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2922. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2923. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2924. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2925. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2926. CRT,RUN,MODE_CONTROL,0x02
  2927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2930. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2933. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2934. # Lock CRTC Reg 11 for compatibility
  2935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2936. # Dump ENG Register
  2937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2938. # Dump MISCOUT Register
  2939. DIR,RUN,MISC_WRITE,0xef
  2940. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2942. CLK_IND, RUN, FREQ_2, 0x21
  2943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2945. CRT,RUN,LATCH_DATA, 0x00
  2946.  
  2947. [640,480,16,64,120]
  2948. # Unlock CRTC
  2949. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2950. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2951. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2952. # Dump CRT Controller Registers
  2953. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2954. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2955. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2956. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2957. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2958. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2959. CRT,RUN,MODE_CONTROL,0x02
  2960. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2961. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2962. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2963. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2964. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2965. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2966. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2967. # Lock CRTC Reg 11 for compatibility
  2968. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2969. # Dump ENG Register
  2970. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2971. # Dump MISCOUT Register
  2972. DIR,RUN,MISC_WRITE,0xef
  2973. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2974. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2975. CLK_IND, RUN, FREQ_2, 0x67
  2976. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2977. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2978. CRT,RUN,LATCH_DATA, 0x00
  2979.  
  2980. [640,480,16,52,100]
  2981. # Unlock CRTC
  2982. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2983. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2984. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2985. # Dump CRT Controller Registers
  2986. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2987. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2988. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2989. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2990. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2991. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2992. CRT,RUN,MODE_CONTROL,0x02
  2993. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2994. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2995. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2996. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2997. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2998. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2999. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3000. # Lock CRTC Reg 11 for compatibility
  3001. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3002. # Dump ENG Register
  3003. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3004. # Dump MISCOUT Register
  3005. DIR,RUN,MISC_WRITE,0xef
  3006. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3007. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3008. CLK_IND, RUN, FREQ_2, 0x50
  3009. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3010. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3011. CRT,RUN,LATCH_DATA, 0x00
  3012.  
  3013. [640,480,16,48,90]
  3014. # Unlock CRTC
  3015. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3016. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3017. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3018. # Dump CRT Controller Registers
  3019. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3020. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3021. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3022. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3023. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3024. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3025. CRT,RUN,MODE_CONTROL,0x02
  3026. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3027. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3028. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3029. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3030. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3031. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3032. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3033. # Lock CRTC Reg 11 for compatibility
  3034. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3035. # Dump ENG Register
  3036. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3037. # Dump MISCOUT Register
  3038. DIR,RUN,MISC_WRITE,0xef
  3039. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3040. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3041. CLK_IND, RUN, FREQ_2, 0x4d
  3042. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3043. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3044. CRT,RUN,LATCH_DATA, 0x00
  3045.  
  3046. [640,480,16,37,75]
  3047. # Unlock CRTC
  3048. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3049. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3050. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3051. # Dump CRT Controller Registers
  3052. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3053. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3054. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3055. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3056. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3057. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3058. CRT,RUN,MODE_CONTROL,0x02
  3059. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3060. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3061. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3062. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3063. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3064. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3065. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3066. # Lock CRTC Reg 11 for compatibility
  3067. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3068. # Dump ENG Register
  3069. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3070. # Dump MISCOUT Register
  3071. DIR,RUN,MISC_WRITE,0xef
  3072. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3073. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3074. CLK_IND, RUN, FREQ_2, 0x3a
  3075. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3076. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3077. CRT,RUN,LATCH_DATA, 0x00
  3078.  
  3079. [640,480,16,37,72]
  3080. # Unlock CRTC
  3081. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3082. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3083. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3084. # Dump CRT Controller Registers
  3085. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3086. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3087. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3088. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3089. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3090. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3091. CRT,RUN,MODE_CONTROL,0x02
  3092. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3093. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3094. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3095. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3096. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3097. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3098. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3099. # Lock CRTC Reg 11 for compatibility
  3100. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3101. # Dump ENG Register
  3102. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3103. # Dump MISCOUT Register
  3104. DIR,RUN,MISC_WRITE,0xef
  3105. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3106. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3107. CLK_IND, RUN, FREQ_2, 0x3a
  3108. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3109. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3110. CRT,RUN,LATCH_DATA, 0x00
  3111.  
  3112. [640,480,16,31,60]
  3113. # Unlock CRTC
  3114. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3115. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3116. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3117. # Dump CRT Controller Registers
  3118. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3119. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3120. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3121. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3122. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3123. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3124. CRT,RUN,MODE_CONTROL,0x02
  3125. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3126. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3127. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3128. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3129. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3130. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3131. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3132. # Lock CRTC Reg 11 for compatibility
  3133. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3134. # Dump ENG Register
  3135. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3136. # Dump MISCOUT Register
  3137. DIR,RUN,MISC_WRITE,0xef
  3138. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3139. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3140. CLK_IND, RUN, FREQ_2, 0x21
  3141. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3142. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3143. CRT,RUN,LATCH_DATA, 0x00
  3144.  
  3145. [640,480,8,64,120]
  3146. # Unlock CRTC
  3147. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3148. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3149. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3150. # Dump CRT Controller Registers
  3151. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3152. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3153. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3154. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3155. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3156. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3157. CRT,RUN,MODE_CONTROL,0x02
  3158. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3159. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3160. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3161. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3162. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3163. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3164. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3165. # Lock CRTC Reg 11 for compatibility
  3166. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3167. # Dump ENG Register
  3168. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3169. # Dump MISCOUT Register
  3170. DIR,RUN,MISC_WRITE,0xef
  3171. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3172. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3173. CLK_IND, RUN, FREQ_2, 0x67
  3174. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3175. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3176. CRT,RUN,LATCH_DATA, 0x08
  3177.  
  3178. [640,480,8,52,100]
  3179. # Unlock CRTC
  3180. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3181. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3182. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3183. # Dump CRT Controller Registers
  3184. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3185. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3186. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3187. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3188. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3189. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3190. CRT,RUN,MODE_CONTROL,0x02
  3191. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3192. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3193. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3194. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3195. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3196. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3197. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3198. # Lock CRTC Reg 11 for compatibility
  3199. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3200. # Dump ENG Register
  3201. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3202. # Dump MISCOUT Register
  3203. DIR,RUN,MISC_WRITE,0xef
  3204. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3205. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3206. CLK_IND, RUN, FREQ_2, 0x50
  3207. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3208. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3209. CRT,RUN,LATCH_DATA, 0x08
  3210.  
  3211. [640,480,8,48,90]
  3212. # Unlock CRTC
  3213. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3214. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3215. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3216. # Dump CRT Controller Registers
  3217. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3218. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3219. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3220. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3221. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3222. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3223. CRT,RUN,MODE_CONTROL,0x02
  3224. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3225. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3226. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3227. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3228. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3229. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3230. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3231. # Lock CRTC Reg 11 for compatibility
  3232. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3233. # Dump ENG Register
  3234. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3235. # Dump MISCOUT Register
  3236. DIR,RUN,MISC_WRITE,0xef
  3237. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3238. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3239. CLK_IND, RUN, FREQ_2, 0x4d
  3240. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3241. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3242. CRT,RUN,LATCH_DATA, 0x08
  3243.  
  3244. [640,480,8,37,75]
  3245. # Unlock CRTC
  3246. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3247. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3248. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3249. # Dump CRT Controller Registers
  3250. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3251. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3252. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3253. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3254. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3255. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3256. CRT,RUN,MODE_CONTROL,0x02
  3257. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3258. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3259. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3260. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3261. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3262. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3263. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3264. # Lock CRTC Reg 11 for compatibility
  3265. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3266. # Dump ENG Register
  3267. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3268. # Dump MISCOUT Register
  3269. DIR,RUN,MISC_WRITE,0xef
  3270. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3271. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3272. CLK_IND, RUN, FREQ_2, 0x3a
  3273. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3274. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3275. CRT,RUN,LATCH_DATA, 0x08
  3276.  
  3277. [640,480,8,37,72]
  3278. # Unlock CRTC
  3279. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3280. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3281. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3282. # Dump CRT Controller Registers
  3283. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3284. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3285. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3286. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3287. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3288. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3289. CRT,RUN,MODE_CONTROL,0x02
  3290. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3291. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3292. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3293. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3294. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3295. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3296. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3297. # Lock CRTC Reg 11 for compatibility
  3298. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3299. # Dump ENG Register
  3300. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3301. # Dump MISCOUT Register
  3302. DIR,RUN,MISC_WRITE,0xef
  3303. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3304. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3305. CLK_IND, RUN, FREQ_2, 0x3a
  3306. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3307. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3308. CRT,RUN,LATCH_DATA, 0x08
  3309.  
  3310. [640,480,8,31,60]
  3311. # Unlock CRTC
  3312. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3313. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3314. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3315. # Dump CRT Controller Registers
  3316. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3317. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3318. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3319. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3320. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3321. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3322. CRT,RUN,MODE_CONTROL,0x02
  3323. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3324. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3325. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3326. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3327. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3328. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3329. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3330. # Lock CRTC Reg 11 for compatibility
  3331. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3332. # Dump ENG Register
  3333. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3334. # Dump MISCOUT Register
  3335. DIR,RUN,MISC_WRITE,0xef
  3336. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3337. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3338. CLK_IND, RUN, FREQ_2, 0x21
  3339. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3340. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3341. CRT,RUN,LATCH_DATA, 0x08
  3342.  
  3343.  
  3344.  
  3345.  
  3346.  
  3347.  
  3348.