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/ DOS/V Power Report 1996 November / VPR9611B.ISO / driver / diamond / w95j325 / w95j325.exe / STL00019.DA_ / STL00019.DA
Text File  |  1996-05-16  |  160KB  |  4,603 lines
  1. #
  2. #    $Id: stl10019.da@ 1.2 1996/05/15 15:33:52 arisawa Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl10019.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 220Mhz DAC.
  10. #            This file is for Japanese Windows 95.
  11. #
  12.  
  13. [Objects]
  14. Draweng32=s3x6832.drw
  15. Dac=ibm525.dac
  16. Cursor=ibm525.cur
  17. PixClk=ibm525.clk
  18. Draweng=s3x68.drw
  19.  
  20. [BoardInfo]
  21. wMinimumFormatBltWidth16bpp=16
  22. wMinimumFormatBltWidth32bpp=16
  23. bPixelFormatter=1
  24. bViewports=1
  25. bNewMMIO=1
  26. bTwoPtLine=1
  27. ValidateBAR=YES
  28. SwapVLA30A25=YES
  29.  
  30. [Desktops]
  31. 2048,1536,8
  32. 2048,768,8
  33. 1600,1200,16
  34. 1600,1200,8
  35. 1280,1024,24
  36. 1280,1024,16
  37. 1280,1024,8
  38. 1152,864,32
  39. 1152,864,24
  40. 1152,864,16
  41. 1152,864,8
  42. 1024,3072,8
  43. 1024,1536,16
  44. 1024,1536,8
  45. 1024,768,32
  46. 1024,768,24
  47. 1024,768,16
  48. 1024,768,8
  49. 800,600,32
  50. 800,600,24
  51. 800,600,16
  52. 800,600,8
  53. 640,480,32
  54. 640,480,24
  55. 640,480,16
  56. 640,480,8
  57.  
  58. [Viewports]
  59. 1600,1200,16,95,76
  60. 1600,1200,16,94,75
  61. 1600,1200,16,82,66
  62. 1600,1200,16,75,60
  63. 1600,1200,8,95,76
  64. 1600,1200,8,94,75
  65. 1600,1200,8,82,66
  66. 1600,1200,8,75,60
  67. 1280,1024,24,79,75
  68. 1280,1024,24,76,72
  69. 1280,1024,24,74,70
  70. 1280,1024,24,64,60
  71. 1280,1024,16,95,90
  72. 1280,1024,16,79,75
  73. 1280,1024,16,76,72
  74. 1280,1024,16,74,70
  75. 1280,1024,16,64,60
  76. 1280,1024,8,95,90
  77. 1280,1024,8,79,75
  78. 1280,1024,8,76,72
  79. 1280,1024,8,74,70
  80. 1280,1024,8,64,60
  81. 1152,864,32,64,70
  82. 1152,864,32,56,60
  83. 1152,864,24,64,70
  84. 1152,864,24,56,60
  85. 1152,864,16,82,90
  86. 1152,864,16,71,75
  87. 1152,864,16,64,70
  88. 1152,864,16,56,60
  89. 1152,864,8,82,90
  90. 1152,864,8,71,75
  91. 1152,864,8,64,70
  92. 1152,864,8,56,60
  93. 1024,768,32,64,80
  94. 1024,768,32,60,75
  95. 1024,768,32,58,72
  96. 1024,768,32,56,70
  97. 1024,768,32,48,60
  98. 1024,768,24,64,80
  99. 1024,768,24,60,75
  100. 1024,768,24,58,72
  101. 1024,768,24,56,70
  102. 1024,768,24,48,60
  103. 1024,768,16,96,120
  104. 1024,768,16,81,100
  105. 1024,768,16,64,80
  106. 1024,768,16,60,75
  107. 1024,768,16,58,72
  108. 1024,768,16,56,70
  109. 1024,768,16,48,60
  110. 1024,768,8,96,120
  111. 1024,768,8,81,100
  112. 1024,768,8,64,80
  113. 1024,768,8,60,75
  114. 1024,768,8,58,72
  115. 1024,768,8,56,70
  116. 1024,768,8,48,60
  117. 800,600,32,75,120
  118. 800,600,32,64,100
  119. 800,600,32,56,90
  120. 800,600,32,46,75
  121. 800,600,32,48,72
  122. 800,600,32,37,60
  123. 800,600,32,35,56
  124. 800,600,24,75,120
  125. 800,600,24,64,100
  126. 800,600,24,56,90
  127. 800,600,24,46,75
  128. 800,600,24,48,72
  129. 800,600,24,37,60
  130. 800,600,24,35,56
  131. 800,600,16,75,120
  132. 800,600,16,64,100
  133. 800,600,16,56,90
  134. 800,600,16,46,75
  135. 800,600,16,48,72
  136. 800,600,16,37,60
  137. 800,600,16,35,56
  138. 800,600,8,75,120
  139. 800,600,8,64,100
  140. 800,600,8,56,90
  141. 800,600,8,46,75
  142. 800,600,8,48,72
  143. 800,600,8,37,60
  144. 800,600,8,35,56
  145. 640,480,32,64,120
  146. 640,480,32,52,100
  147. 640,480,32,48,90
  148. 640,480,32,37,75
  149. 640,480,32,37,72
  150. 640,480,32,31,60
  151. 640,480,24,64,120
  152. 640,480,24,52,100
  153. 640,480,24,48,90
  154. 640,480,24,37,75
  155. 640,480,24,37,72
  156. 640,480,24,31,60
  157. 640,480,16,64,120
  158. 640,480,16,52,100
  159. 640,480,16,48,90
  160. 640,480,16,37,75
  161. 640,480,16,37,72
  162. 640,480,16,31,60
  163. 640,480,8,64,120
  164. 640,480,8,52,100
  165. 640,480,8,48,90
  166. 640,480,8,37,75
  167. 640,480,8,37,72
  168. 640,480,8,31,60
  169.  
  170. [TextMode]
  171. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  172. SHELL, I10, 0x0003,  0x0000
  173. CRT, RUN, REG_LOCK_1, 0x48
  174. CRT, RUN, REG_LOCK_2, 0xA5
  175.  
  176. [GraphicsEnable]
  177. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  178. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  179.  
  180. [GraphicsDisable]
  181. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  182. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  183.  
  184. [2048,1536,8]
  185. # Setting Line Pitch
  186. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  187. CRT,RUN,EXT_MODE,0x00
  188. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  189. # Setting Engine Pitch
  190. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  191. CRT,RUN,MEM_CONFIG,0x8f
  192. # Setting Basic Mode Registers.The registers
  193. # below are neither Desktop or Viewport Regs
  194. # Unlock Sequencer
  195. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  196. # Dump Sequencer Registers
  197. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  198. # Dump Graphics Controller Registers
  199. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  200. # Dump Attribute Controller Registers
  201. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  202. # Lock Sequencer
  203. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  204. DAC_IDR, RUN, DAC_OPERATION, 0x02
  205. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  206. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  207. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  208. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  209. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  210. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  211. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  212. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  213. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  214.  
  215. [2048,768,8]
  216. # Setting Line Pitch
  217. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  218. CRT,RUN,EXT_MODE,0x00
  219. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  220. # Setting Engine Pitch
  221. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  222. CRT,RUN,MEM_CONFIG,0x8f
  223. # Setting Basic Mode Registers.The registers
  224. # below are neither Desktop or Viewport Regs
  225. # Unlock Sequencer
  226. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  227. # Dump Sequencer Registers
  228. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  229. # Dump Graphics Controller Registers
  230. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  231. # Dump Attribute Controller Registers
  232. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  233. # Lock Sequencer
  234. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  235. DAC_IDR, RUN, DAC_OPERATION, 0x02
  236. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  237. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  238. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  239. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  240. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  241. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  242. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  243. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  244. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  245.  
  246. [1024,3072,8]
  247. # Setting Line Pitch
  248. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  249. CRT,RUN,EXT_MODE,0x00
  250. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  251. # Setting Engine Pitch
  252. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  253. CRT,RUN,MEM_CONFIG,0x09
  254. # Setting Basic Mode Registers.The registers
  255. # below are neither Desktop or Viewport Regs
  256. # Unlock Sequencer
  257. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  258. # Dump Sequencer Registers
  259. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  260. # Dump Graphics Controller Registers
  261. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  262. # Dump Attribute Controller Registers
  263. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  264. # Lock Sequencer
  265. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  266. DAC_IDR, RUN, DAC_OPERATION, 0x02
  267. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  268. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  269. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  270. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  271. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  272. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  273. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  274. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  275. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  276.  
  277. [1024,1536,8]
  278. # Setting Line Pitch
  279. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  280. CRT,RUN,EXT_MODE,0x00
  281. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  282. # Setting Engine Pitch
  283. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  284. CRT,RUN,MEM_CONFIG,0x09
  285. # Setting Basic Mode Registers.The registers
  286. # below are neither Desktop or Viewport Regs
  287. # Unlock Sequencer
  288. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  289. # Dump Sequencer Registers
  290. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  291. # Dump Graphics Controller Registers
  292. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  293. # Dump Attribute Controller Registers
  294. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  295. # Lock Sequencer
  296. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  297. DAC_IDR, RUN, DAC_OPERATION, 0x02
  298. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  299. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  300. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  301. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  302. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  303. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  304. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  305. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  306. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  307.  
  308. [1024,1536,16]
  309. # Setting Line Pitch
  310. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  311. CRT,RUN,EXT_MODE,0x00
  312. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  313. # Setting Engine Pitch
  314. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  315. CRT,RUN,MEM_CONFIG,0x89
  316. # Setting Basic Mode Registers.The registers
  317. # below are neither Desktop or Viewport Regs
  318. # Unlock Sequencer
  319. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  320. # Dump Sequencer Registers
  321. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  322. # Dump Graphics Controller Registers
  323. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  324. # Dump Attribute Controller Registers
  325. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  326. # Lock Sequencer
  327. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  328. DAC_IDR, RUN, DAC_OPERATION, 0x02
  329. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  330. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  331. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  332. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  333. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  334. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  335. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  336. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  337. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  338.  
  339. [1600,1200,16]
  340. # Setting Line Pitch
  341. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  342. CRT,RUN,EXT_MODE,0x00
  343. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  344. # Setting Engine Pitch
  345. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  346. CRT,RUN,MEM_CONFIG,0x8b
  347. # Setting Basic Mode Registers.The registers
  348. # below are neither Desktop or Viewport Regs
  349. # Unlock Sequencer
  350. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  351. # Dump Sequencer Registers
  352. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  353. # Dump Graphics Controller Registers
  354. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  355. # Dump Attribute Controller Registers
  356. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  357. # Lock Sequencer
  358. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  359. DAC_IDR, RUN, DAC_OPERATION, 0x02
  360. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  361. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  362. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  363. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  364. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  365. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  366. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  367. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  368. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  369.  
  370. [1600,1200,8]
  371. # Setting Line Pitch
  372. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  373. CRT,RUN,EXT_MODE,0x00
  374. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  375. # Setting Engine Pitch
  376. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  377. CRT,RUN,MEM_CONFIG,0x8b
  378. # Setting Basic Mode Registers.The registers
  379. # below are neither Desktop or Viewport Regs
  380. # Unlock Sequencer
  381. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  382. # Dump Sequencer Registers
  383. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  384. # Dump Graphics Controller Registers
  385. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  386. # Dump Attribute Controller Registers
  387. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  388. # Lock Sequencer
  389. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  390. DAC_IDR, RUN, DAC_OPERATION, 0x02
  391. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  392. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  393. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  394. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  395. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  396. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  397. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  398. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  399. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  400.  
  401. [1280,1024,24]
  402. # Setting Line Pitch
  403. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  404. CRT,RUN,EXT_MODE,0x00
  405. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  406. # Setting Engine Pitch
  407. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  408. CRT,RUN,MEM_CONFIG,0x8b
  409. # Setting Basic Mode Registers.The registers
  410. # below are neither Desktop or Viewport Regs
  411. # Unlock Sequencer
  412. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  413. # Dump Sequencer Registers
  414. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  415. # Dump Graphics Controller Registers
  416. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  417. # Dump Attribute Controller Registers
  418. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  419. # Lock Sequencer
  420. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  421. DAC_IDR, RUN, DAC_OPERATION, 0x02
  422. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  423. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  424. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  425. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  426. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  427. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  428. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  429. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  430. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  431.  
  432. [1280,1024,16]
  433. # Setting Line Pitch
  434. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  435. CRT,RUN,EXT_MODE,0x00
  436. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  437. # Setting Engine Pitch
  438. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  439. CRT,RUN,MEM_CONFIG,0x8b
  440. # Setting Basic Mode Registers.The registers
  441. # below are neither Desktop or Viewport Regs
  442. # Unlock Sequencer
  443. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  444. # Dump Sequencer Registers
  445. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  446. # Dump Graphics Controller Registers
  447. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  448. # Dump Attribute Controller Registers
  449. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  450. # Lock Sequencer
  451. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  452. DAC_IDR, RUN, DAC_OPERATION, 0x02
  453. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  454. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  455. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  456. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  457. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  458. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  459. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  460. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  461. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  462.  
  463. [1280,1024,8]
  464. # Setting Line Pitch
  465. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  466. CRT,RUN,EXT_MODE,0x00
  467. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  468. # Setting Engine Pitch
  469. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  470. CRT,RUN,MEM_CONFIG,0x0b
  471. # Setting Basic Mode Registers.The registers
  472. # below are neither Desktop or Viewport Regs
  473. # Unlock Sequencer
  474. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  475. # Dump Sequencer Registers
  476. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  477. # Dump Graphics Controller Registers
  478. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  479. # Dump Attribute Controller Registers
  480. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  481. # Lock Sequencer
  482. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  483. DAC_IDR, RUN, DAC_OPERATION, 0x02
  484. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  485. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  486. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  487. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  488. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  489. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  490. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  491. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  492. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  493.  
  494. [1152,864,32]
  495. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  496. CRT,RUN,EXT_MODE,0x00
  497. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  498. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  499. CRT,RUN,MEM_CONFIG,0x89
  500. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  501. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  502. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  503. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  504. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  505. DAC_IDR, RUN, DAC_OPERATION, 0x02
  506. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  507. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  508. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  509. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  510. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  511. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  512. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  513. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  514. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  515.  
  516. [1152,864,24]
  517. # Setting Line Pitch
  518. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  519. CRT,RUN,EXT_MODE,0x00
  520. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  521. # Setting Engine Pitch
  522. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  523. CRT,RUN,MEM_CONFIG,0x8b
  524. # Setting Basic Mode Registers.The registers
  525. # below are neither Desktop or Viewport Regs
  526. # Unlock Sequencer
  527. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  528. # Dump Sequencer Registers
  529. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  530. # Dump Graphics Controller Registers
  531. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  532. # Dump Attribute Controller Registers
  533. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  534. # Lock Sequencer
  535. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  536. DAC_IDR, RUN, DAC_OPERATION, 0x02
  537. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  538. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  539. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  540. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  541. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  542. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  543. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  544. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  545. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  546.  
  547. [1152,864,16]
  548. # Setting Line Pitch
  549. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  550. CRT,RUN,EXT_MODE,0x00
  551. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  552. # Setting Engine Pitch
  553. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  554. CRT,RUN,MEM_CONFIG,0x8b
  555. # Setting Basic Mode Registers.The registers
  556. # below are neither Desktop or Viewport Regs
  557. # Unlock Sequencer
  558. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  559. # Dump Sequencer Registers
  560. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  561. # Dump Graphics Controller Registers
  562. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  563. # Dump Attribute Controller Registers
  564. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  565. # Lock Sequencer
  566. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  567. DAC_IDR, RUN, DAC_OPERATION, 0x02
  568. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  569. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  570. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  571. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  572. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  573. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  574. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  575. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  576. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  577.  
  578. [1152,864,8]
  579. # Setting Line Pitch
  580. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  581. CRT,RUN,EXT_MODE,0x00
  582. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  583. # Setting Engine Pitch
  584. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  585. CRT,RUN,MEM_CONFIG,0x89
  586. # Setting Basic Mode Registers.The registers
  587. # below are neither Desktop or Viewport Regs
  588. # Unlock Sequencer
  589. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  590. # Dump Sequencer Registers
  591. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  592. # Dump Graphics Controller Registers
  593. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  594. # Dump Attribute Controller Registers
  595. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  596. # Lock Sequencer
  597. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  598. DAC_IDR, RUN, DAC_OPERATION, 0x02
  599. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  600. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  601. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  602. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  603. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  604. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  605. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  606. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  607. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  608.  
  609. [1024,768,32]
  610. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  611. CRT,RUN,EXT_MODE,0x00
  612. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  613. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  614. CRT,RUN,MEM_CONFIG,0x89
  615. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  616. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  617. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  618. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  619. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  620. DAC_IDR, RUN, DAC_OPERATION, 0x02
  621. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  622. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  623. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  624. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  625. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  626. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  627. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  628. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  629. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  630.  
  631. [1024,768,24]
  632. # Setting Line Pitch
  633. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  634. CRT,RUN,EXT_MODE,0x00
  635. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  636. # Setting Engine Pitch
  637. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  638. CRT,RUN,MEM_CONFIG,0x89
  639. # Setting Basic Mode Registers.The registers
  640. # below are neither Desktop or Viewport Regs
  641. # Unlock Sequencer
  642. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  643. # Dump Sequencer Registers
  644. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  645. # Dump Graphics Controller Registers
  646. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  647. # Dump Attribute Controller Registers
  648. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  649. # Lock Sequencer
  650. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  651. DAC_IDR, RUN, DAC_OPERATION, 0x02
  652. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  653. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  654. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  655. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  656. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  657. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  658. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  659. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  660. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  661.  
  662. [1024,768,16]
  663. # Setting Line Pitch
  664. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  665. CRT,RUN,EXT_MODE,0x00
  666. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  667. # Setting Engine Pitch
  668. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  669. CRT,RUN,MEM_CONFIG,0x89
  670. # Setting Basic Mode Registers.The registers
  671. # below are neither Desktop or Viewport Regs
  672. # Unlock Sequencer
  673. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  674. # Dump Sequencer Registers
  675. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  676. # Dump Graphics Controller Registers
  677. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  678. # Dump Attribute Controller Registers
  679. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  680. # Lock Sequencer
  681. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  682. DAC_IDR, RUN, DAC_OPERATION, 0x02
  683. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  684. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  685. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  686. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  687. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  688. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  689. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  690. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  691. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  692.  
  693. [1024,768,8]
  694. # Setting Line Pitch
  695. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  696. CRT,RUN,EXT_MODE,0x00
  697. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  698. # Setting Engine Pitch
  699. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  700. CRT,RUN,MEM_CONFIG,0x09
  701. # Setting Basic Mode Registers.The registers
  702. # below are neither Desktop or Viewport Regs
  703. # Unlock Sequencer
  704. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  705. # Dump Sequencer Registers
  706. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  707. # Dump Graphics Controller Registers
  708. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  709. # Dump Attribute Controller Registers
  710. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  711. # Lock Sequencer
  712. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  713. DAC_IDR, RUN, DAC_OPERATION, 0x02
  714. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  715. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  716. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  717. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  718. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  719. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  720. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  721. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  722. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  723.  
  724. [800,600,32]
  725. # Setting Line Pitch
  726. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  727. CRT,RUN,EXT_MODE,0x00
  728. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  729. # Setting Engine Pitch
  730. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  731. CRT,RUN,MEM_CONFIG,0x8b
  732. # Setting Basic Mode Registers.The registers
  733. # below are neither Desktop or Viewport Regs
  734. # Unlock Sequencer
  735. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  736. # Dump Sequencer Registers
  737. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  738. # Dump Graphics Controller Registers
  739. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  740. # Dump Attribute Controller Registers
  741. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  742. # Lock Sequencer
  743. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  744. DAC_IDR, RUN, DAC_OPERATION, 0x02
  745. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  746. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  747. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  748. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  749. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  750. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  751. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  752. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  753. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  754.  
  755. [800,600,24]
  756. # Setting Line Pitch
  757. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  758. CRT,RUN,EXT_MODE,0x00
  759. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  760. # Setting Engine Pitch
  761. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  762. CRT,RUN,MEM_CONFIG,0x8b
  763. # Setting Basic Mode Registers.The registers
  764. # below are neither Desktop or Viewport Regs
  765. # Unlock Sequencer
  766. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  767. # Dump Sequencer Registers
  768. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  769. # Dump Graphics Controller Registers
  770. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  771. # Dump Attribute Controller Registers
  772. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  773. # Lock Sequencer
  774. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  775. DAC_IDR, RUN, DAC_OPERATION, 0x02
  776. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  777. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  778. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  779. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  780. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  781. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  782. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  783. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  784. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  785.  
  786. [800,600,16]
  787. # Setting Line Pitch
  788. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  789. CRT,RUN,EXT_MODE,0x00
  790. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  791. # Setting Engine Pitch
  792. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  793. CRT,RUN,MEM_CONFIG,0x8b
  794. # Setting Basic Mode Registers.The registers
  795. # below are neither Desktop or Viewport Regs
  796. # Unlock Sequencer
  797. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  798. # Dump Sequencer Registers
  799. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  800. # Dump Graphics Controller Registers
  801. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  802. # Dump Attribute Controller Registers
  803. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  804. # Lock Sequencer
  805. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  806. DAC_IDR, RUN, DAC_OPERATION, 0x02
  807. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  808. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  809. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  810. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  811. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  812. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  813. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  814. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  815. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  816.  
  817. [800,600,8]
  818. # Setting Line Pitch
  819. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  820. CRT,RUN,EXT_MODE,0x00
  821. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  822. # Setting Engine Pitch
  823. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  824. CRT,RUN,MEM_CONFIG,0x8b
  825. # Setting Basic Mode Registers.The registers
  826. # below are neither Desktop or Viewport Regs
  827. # Unlock Sequencer
  828. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  829. # Dump Sequencer Registers
  830. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  831. # Dump Graphics Controller Registers
  832. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  833. # Dump Attribute Controller Registers
  834. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  835. # Lock Sequencer
  836. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  837. DAC_IDR, RUN, DAC_OPERATION, 0x02
  838. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  839. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  840. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  841. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  842. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  843. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  844. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  845. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  846. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  847.  
  848. [640,480,32]
  849. # Setting Line Pitch
  850. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  851. CRT,RUN,EXT_MODE,0x00
  852. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  853. # Setting Engine Pitch
  854. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  855. CRT,RUN,MEM_CONFIG,0x8b
  856. # Setting Basic Mode Registers.The registers
  857. # below are neither Desktop or Viewport Regs
  858. # Unlock Sequencer
  859. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  860. # Dump Sequencer Registers
  861. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  862. # Dump Graphics Controller Registers
  863. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  864. # Dump Attribute Controller Registers
  865. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  866. # Lock Sequencer
  867. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  868. DAC_IDR, RUN, DAC_OPERATION, 0x02
  869. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  870. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  871. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  872. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  873. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  874. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  875. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  876. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  877. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  878.  
  879. [640,480,24]
  880. # Setting Line Pitch
  881. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  882. CRT,RUN,EXT_MODE,0x00
  883. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  884. # Setting Engine Pitch
  885. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  886. CRT,RUN,MEM_CONFIG,0x8b
  887. # Setting Basic Mode Registers.The registers
  888. # below are neither Desktop or Viewport Regs
  889. # Unlock Sequencer
  890. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  891. # Dump Sequencer Registers
  892. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  893. # Dump Graphics Controller Registers
  894. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  895. # Dump Attribute Controller Registers
  896. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  897. # Lock Sequencer
  898. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  899. DAC_IDR, RUN, DAC_OPERATION, 0x02
  900. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  901. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  902. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  903. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  904. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  905. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  906. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  907. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  908. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  909.  
  910. [640,480,16]
  911. # Setting Line Pitch
  912. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  913. CRT,RUN,EXT_MODE,0x00
  914. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  915. # Setting Engine Pitch
  916. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  917. CRT,RUN,MEM_CONFIG,0x8b
  918. # Setting Basic Mode Registers.The registers
  919. # below are neither Desktop or Viewport Regs
  920. # Unlock Sequencer
  921. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  922. # Dump Sequencer Registers
  923. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  924. # Dump Graphics Controller Registers
  925. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  926. # Dump Attribute Controller Registers
  927. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  928. # Lock Sequencer
  929. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  930. DAC_IDR, RUN, DAC_OPERATION, 0x02
  931. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  932. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  933. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  934. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  935. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  936. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  937. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  938. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  939. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  940.  
  941. [640,480,8]
  942. # Setting Line Pitch
  943. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  944. CRT,RUN,EXT_MODE,0x00
  945. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  946. # Setting Engine Pitch
  947. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  948. CRT,RUN,MEM_CONFIG,0x8b
  949. # Setting Basic Mode Registers.The registers
  950. # below are neither Desktop or Viewport Regs
  951. # Unlock Sequencer
  952. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  953. # Dump Sequencer Registers
  954. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  955. # Dump Graphics Controller Registers
  956. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  957. # Dump Attribute Controller Registers
  958. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  959. # Lock Sequencer
  960. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  961. DAC_IDR, RUN, DAC_OPERATION, 0x02
  962. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  963. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  964. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  965. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  966. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  967. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  968. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  969. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  970. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  971.  
  972. [1600,1200,16,95,76]
  973. # Unlock CRTC
  974. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  975. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  976. CRT,RUN,REG_LOCK_1,0x48,0xa5
  977. # Dump CRT Controller Registers
  978. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  979. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  980. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  981. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  982. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  983. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  984. CRT,RUN,MODE_CONTROL,0x02
  985. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  986. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  987. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  988. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  989. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  990. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  991. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  992. # Lock CRTC Reg 11 for compatibility
  993. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  994. # Dump ENG Register
  995. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  996. # Dump MISCOUT Register
  997. DIR,RUN,MISC_WRITE,0xef
  998. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  999. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1000. CLK_IND, RUN, FREQ_2, 0xe0
  1001. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1002. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1003. CRT,RUN,LATCH_DATA, 0x00
  1004.  
  1005. [1600,1200,16,94,75]
  1006. # Unlock CRTC
  1007. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1008. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1009. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1010. # Dump CRT Controller Registers
  1011. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  1012. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1013. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  1014. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1015. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1016. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  1017. CRT,RUN,MODE_CONTROL,0x02
  1018. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1019. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1020. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1021. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1022. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1023. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1024. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1025. # Lock CRTC Reg 11 for compatibility
  1026. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1027. # Dump ENG Register
  1028. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1029. # Dump MISCOUT Register
  1030. DIR,RUN,MISC_WRITE,0xef
  1031. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1032. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1033. CLK_IND, RUN, FREQ_2, 0xe2
  1034. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1035. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1036. CRT,RUN,LATCH_DATA, 0x00
  1037.  
  1038. [1600,1200,16,82,66]
  1039. # Unlock CRTC
  1040. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1041. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1042. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1043. # Dump CRT Controller Registers
  1044. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1045. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1046. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1047. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1048. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1049. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1050. CRT,RUN,MODE_CONTROL,0x02
  1051. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1052. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1053. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1054. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1055. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1056. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1057. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1058. # Lock CRTC Reg 11 for compatibility
  1059. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1060. # Dump ENG Register
  1061. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1062. # Dump MISCOUT Register
  1063. DIR,RUN,MISC_WRITE,0xef
  1064. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1065. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1066. CLK_IND, RUN, FREQ_2, 0xd3
  1067. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1068. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1069. CRT,RUN,LATCH_DATA, 0x00
  1070.  
  1071. [1600,1200,16,75,60]
  1072. # Unlock CRTC
  1073. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1074. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1075. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1076. # Dump CRT Controller Registers
  1077. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1078. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1079. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1080. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1081. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1082. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1083. CRT,RUN,MODE_CONTROL,0x02
  1084. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1085. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1086. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1087. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1088. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1089. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1090. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1091. # Lock CRTC Reg 11 for compatibility
  1092. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1093. # Dump ENG Register
  1094. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1095. # Dump MISCOUT Register
  1096. DIR,RUN,MISC_WRITE,0xef
  1097. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1098. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1099. CLK_IND, RUN, FREQ_2, 0xcd
  1100. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1101. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1102. CRT,RUN,LATCH_DATA, 0x00
  1103.  
  1104. [1600,1200,8,95,76]
  1105. # Unlock CRTC
  1106. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1107. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1108. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1109. # Dump CRT Controller Registers
  1110. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  1111. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1112. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  1113. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1114. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1115. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  1116. CRT,RUN,MODE_CONTROL,0x02
  1117. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1118. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1119. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1120. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1121. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1122. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1123. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1124. # Lock CRTC Reg 11 for compatibility
  1125. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1126. # Dump ENG Register
  1127. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1128. # Dump MISCOUT Register
  1129. DIR,RUN,MISC_WRITE,0xef
  1130. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1131. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1132. CLK_IND, RUN, FREQ_2, 0xe0
  1133. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1134. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1135. CRT,RUN,LATCH_DATA, 0x08
  1136.  
  1137. [1600,1200,8,94,75]
  1138. # Unlock CRTC
  1139. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1140. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1141. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1142. # Dump CRT Controller Registers
  1143. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  1144. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1145. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  1146. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1147. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1148. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  1149. CRT,RUN,MODE_CONTROL,0x02
  1150. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1151. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1152. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1153. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1154. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1155. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1156. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1157. # Lock CRTC Reg 11 for compatibility
  1158. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1159. # Dump ENG Register
  1160. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1161. # Dump MISCOUT Register
  1162. DIR,RUN,MISC_WRITE,0xef
  1163. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1164. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1165. CLK_IND, RUN, FREQ_2, 0xe2
  1166. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1167. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1168. CRT,RUN,LATCH_DATA, 0x08
  1169.  
  1170. [1600,1200,8,82,66]
  1171. # Unlock CRTC
  1172. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1173. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1174. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1175. # Dump CRT Controller Registers
  1176. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1177. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1178. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1179. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1180. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1181. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1182. CRT,RUN,MODE_CONTROL,0x02
  1183. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1184. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1185. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1186. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1187. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1188. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1189. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1190. # Lock CRTC Reg 11 for compatibility
  1191. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1192. # Dump ENG Register
  1193. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1194. # Dump MISCOUT Register
  1195. DIR,RUN,MISC_WRITE,0xef
  1196. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1197. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1198. CLK_IND, RUN, FREQ_2, 0xd3
  1199. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1200. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1201. CRT,RUN,LATCH_DATA, 0x08
  1202.  
  1203. [1600,1200,8,75,60]
  1204. # Unlock CRTC
  1205. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1206. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1207. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1208. # Dump CRT Controller Registers
  1209. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1210. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1211. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1212. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1213. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1214. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1215. CRT,RUN,MODE_CONTROL,0x02
  1216. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1217. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1218. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1219. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1220. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1221. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1222. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1223. # Lock CRTC Reg 11 for compatibility
  1224. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1225. # Dump ENG Register
  1226. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1227. # Dump MISCOUT Register
  1228. DIR,RUN,MISC_WRITE,0xef
  1229. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1230. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1231. CLK_IND, RUN, FREQ_2, 0xcd
  1232. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1233. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1234. CRT,RUN,LATCH_DATA, 0x08
  1235.  
  1236. [1280,1024,24,79,75]
  1237. # Unlock CRTC
  1238. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1239. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1240. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1241. # Dump CRT Controller Registers
  1242. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7b,0x03,0x29,0x42,0x00,0x40
  1243. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1244. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1245. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1246. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1247. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1248. CRT,RUN,MODE_CONTROL,0x02
  1249. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1250. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1251. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1252. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1253. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1254. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1255. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1256. # Lock CRTC Reg 11 for compatibility
  1257. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1258. # Dump ENG Register
  1259. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1260. # Dump MISCOUT Register
  1261. DIR,RUN,MISC_WRITE,0xef
  1262. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1263. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1264. CLK_IND, RUN, FREQ_2, 0xc1
  1265. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1266. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1267. CRT,RUN,LATCH_DATA, 0x00
  1268.  
  1269. [1280,1024,24,76,72]
  1270. # Unlock CRTC
  1271. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1272. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1273. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1274. # Dump CRT Controller Registers
  1275. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7c,0x04,0x2c,0x42,0x00,0x40
  1276. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1277. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1278. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1279. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1280. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1281. CRT,RUN,MODE_CONTROL,0x02
  1282. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1283. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1284. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1285. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1286. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1287. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1288. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1289. # Lock CRTC Reg 11 for compatibility
  1290. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1291. # Dump ENG Register
  1292. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1293. # Dump MISCOUT Register
  1294. DIR,RUN,MISC_WRITE,0xef
  1295. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1296. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1297. CLK_IND, RUN, FREQ_2, 0xc1
  1298. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1299. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1300. CRT,RUN,LATCH_DATA, 0x00
  1301.  
  1302. [1280,1024,24,74,70]
  1303. # Unlock CRTC
  1304. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1305. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1306. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1307. # Dump CRT Controller Registers
  1308. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x80,0x0a,0x28,0x52,0x00,0x40
  1309. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1310. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1311. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1312. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1313. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1314. CRT,RUN,MODE_CONTROL,0x02
  1315. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1316. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1317. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1318. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1319. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1320. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1321. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1322. # Lock CRTC Reg 11 for compatibility
  1323. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1324. # Dump ENG Register
  1325. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1326. # Dump MISCOUT Register
  1327. DIR,RUN,MISC_WRITE,0xef
  1328. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1329. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1330. CLK_IND, RUN, FREQ_2, 0xba
  1331. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1332. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1333. CRT,RUN,LATCH_DATA, 0x00
  1334.  
  1335. [1280,1024,24,64,60]
  1336. # Unlock CRTC
  1337. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1338. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1339. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1340. # Dump CRT Controller Registers
  1341. ##CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1342. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x08,0x28,0x52,0x00,0x40
  1343. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1344. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1345. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1346. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1347. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1348. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1349. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1350. CRT,RUN,MODE_CONTROL,0x02
  1351. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1352. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1353. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1354. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1355. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1356. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1357. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1358. # Lock CRTC Reg 11 for compatibility
  1359. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1360. # Dump ENG Register
  1361. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1362. # Dump MISCOUT Register
  1363. DIR,RUN,MISC_WRITE,0xef
  1364. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1365. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1366. ##CLK_IND, RUN, FREQ_2, 0xab
  1367. CLK_IND, RUN, FREQ_2, 0xa9
  1368. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1369. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1370. CRT,RUN,LATCH_DATA, 0x00
  1371.  
  1372. [1280,1024,16,95,90]
  1373. # Unlock CRTC
  1374. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1375. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1376. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1377. # Dump CRT Controller Registers
  1378. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1379. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1380. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1381. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1382. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1383. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1384. CRT,RUN,MODE_CONTROL,0x02
  1385. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1386. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1387. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1388. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1389. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1390. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1391. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1392. # Lock CRTC Reg 11 for compatibility
  1393. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1394. # Dump ENG Register
  1395. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1396. # Dump MISCOUT Register
  1397. DIR,RUN,MISC_WRITE,0xef
  1398. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1399. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1400. CLK_IND, RUN, FREQ_2, 0xd0
  1401. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1402. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1403. CRT,RUN,LATCH_DATA, 0x00
  1404.  
  1405. [1280,1024,16,79,75]
  1406. # Unlock CRTC
  1407. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1408. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1409. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1410. # Dump CRT Controller Registers
  1411. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1412. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1413. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1414. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1415. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1416. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1417. CRT,RUN,MODE_CONTROL,0x02
  1418. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1419. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1420. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1421. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1422. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1423. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1424. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1425. # Lock CRTC Reg 11 for compatibility
  1426. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1427. # Dump ENG Register
  1428. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1429. # Dump MISCOUT Register
  1430. DIR,RUN,MISC_WRITE,0xef
  1431. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1432. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1433. CLK_IND, RUN, FREQ_2, 0xc1
  1434. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1435. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1436. CRT,RUN,LATCH_DATA, 0x00
  1437.  
  1438. [1280,1024,16,76,72]
  1439. # Unlock CRTC
  1440. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1441. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1442. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1443. # Dump CRT Controller Registers
  1444. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1445. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1446. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1447. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1448. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1449. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1450. CRT,RUN,MODE_CONTROL,0x02
  1451. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1452. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1453. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1454. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1455. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1456. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1457. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1458. # Lock CRTC Reg 11 for compatibility
  1459. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1460. # Dump ENG Register
  1461. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1462. # Dump MISCOUT Register
  1463. DIR,RUN,MISC_WRITE,0xef
  1464. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1465. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1466. CLK_IND, RUN, FREQ_2, 0xc1
  1467. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1468. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1469. CRT,RUN,LATCH_DATA, 0x00
  1470.  
  1471. [1280,1024,16,74,70]
  1472. # Unlock CRTC
  1473. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1474. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1475. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1476. # Dump CRT Controller Registers
  1477. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x56,0x9d,0x28,0x52,0x00,0x40
  1478. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1479. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1480. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1481. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1482. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1483. CRT,RUN,MODE_CONTROL,0x02
  1484. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1485. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1486. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1487. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1488. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1489. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1490. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1491. # Lock CRTC Reg 11 for compatibility
  1492. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1493. # Dump ENG Register
  1494. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1495. # Dump MISCOUT Register
  1496. DIR,RUN,MISC_WRITE,0xef
  1497. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1498. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1499. CLK_IND, RUN, FREQ_2, 0xba
  1500. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1501. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1502. CRT,RUN,LATCH_DATA, 0x00
  1503.  
  1504. [1280,1024,16,64,60]
  1505. # Unlock CRTC
  1506. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1507. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1508. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1509. # Dump CRT Controller Registers
  1510. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1511. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x53,0x9a,0x28,0x52,0x00,0x40
  1512. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1513. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1514. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1515. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1516. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1517. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1518. ##CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1519. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1520. CRT,RUN,MODE_CONTROL,0x02
  1521. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1522. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1523. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1524. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1525. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1526. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1527. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1528. # Lock CRTC Reg 11 for compatibility
  1529. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1530. # Dump ENG Register
  1531. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1532. # Dump MISCOUT Register
  1533. DIR,RUN,MISC_WRITE,0xef
  1534. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1535. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1536. ##CLK_IND, RUN, FREQ_2, 0xab
  1537. CLK_IND, RUN, FREQ_2, 0xa9
  1538. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1539. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1540. CRT,RUN,LATCH_DATA, 0x00
  1541.  
  1542. [1280,1024,8,95,90]
  1543. # Unlock CRTC
  1544. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1545. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1546. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1547. # Dump CRT Controller Registers
  1548. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  1549. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1550. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1551. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1552. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1553. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1554. CRT,RUN,MODE_CONTROL,0x02
  1555. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1556. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1557. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1558. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1559. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1560. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1561. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1562. # Lock CRTC Reg 11 for compatibility
  1563. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1564. # Dump ENG Register
  1565. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1566. # Dump MISCOUT Register
  1567. DIR,RUN,MISC_WRITE,0xef
  1568. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1569. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1570. CLK_IND, RUN, FREQ_2, 0xd0
  1571. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1572. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1573. CRT,RUN,LATCH_DATA, 0x08
  1574.  
  1575. [1280,1024,8,79,75]
  1576. # Unlock CRTC
  1577. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1578. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1579. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1580. # Dump CRT Controller Registers
  1581. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  1582. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1583. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1584. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1585. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1586. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1587. CRT,RUN,MODE_CONTROL,0x02
  1588. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1589. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1590. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1591. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1592. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1593. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1594. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1595. # Lock CRTC Reg 11 for compatibility
  1596. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1597. # Dump ENG Register
  1598. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1599. # Dump MISCOUT Register
  1600. DIR,RUN,MISC_WRITE,0xef
  1601. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1602. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1603. CLK_IND, RUN, FREQ_2, 0xc1
  1604. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1605. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1606. CRT,RUN,LATCH_DATA, 0x08
  1607.  
  1608. [1280,1024,8,76,72]
  1609. # Unlock CRTC
  1610. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1611. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1612. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1613. # Dump CRT Controller Registers
  1614. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  1615. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1616. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1617. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1618. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1619. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1620. CRT,RUN,MODE_CONTROL,0x02
  1621. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1622. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1623. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1624. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1625. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1626. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1627. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1628. # Lock CRTC Reg 11 for compatibility
  1629. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1630. # Dump ENG Register
  1631. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1632. # Dump MISCOUT Register
  1633. DIR,RUN,MISC_WRITE,0xef
  1634. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1635. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1636. CLK_IND, RUN, FREQ_2, 0xc1
  1637. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1638. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1639. CRT,RUN,LATCH_DATA, 0x08
  1640.  
  1641. [1280,1024,8,74,70]
  1642. # Unlock CRTC
  1643. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1644. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1645. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1646. # Dump CRT Controller Registers
  1647. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x82,0x28,0x52,0x00,0x40
  1648. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1649. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1650. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1651. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1652. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1653. CRT,RUN,MODE_CONTROL,0x02
  1654. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1655. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1656. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1657. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1658. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1659. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1660. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1661. # Lock CRTC Reg 11 for compatibility
  1662. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1663. # Dump ENG Register
  1664. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1665. # Dump MISCOUT Register
  1666. DIR,RUN,MISC_WRITE,0xef
  1667. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1668. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1669. CLK_IND, RUN, FREQ_2, 0xba
  1670. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1671. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1672. CRT,RUN,LATCH_DATA, 0x08
  1673.  
  1674. [1280,1024,8,64,60]
  1675. # Unlock CRTC
  1676. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1677. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1678. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1679. # Dump CRT Controller Registers
  1680. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  1681. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x57,0x9e,0x28,0x52,0x00,0x40
  1682. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1683. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1684. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1685. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1686. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1687. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1688. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1689. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1690. CRT,RUN,MODE_CONTROL,0x02
  1691. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1692. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1693. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1694. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1695. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1696. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1697. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1698. # Lock CRTC Reg 11 for compatibility
  1699. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1700. # Dump ENG Register
  1701. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1702. # Dump MISCOUT Register
  1703. DIR,RUN,MISC_WRITE,0xef
  1704. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1705. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1706. ##CLK_IND, RUN, FREQ_2, 0xab
  1707. CLK_IND, RUN, FREQ_2, 0xa9
  1708. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1709. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1710. CRT,RUN,LATCH_DATA, 0x08
  1711.  
  1712. [1152,864,32,64,70]
  1713. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1714. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1715. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1716. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1717. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1718. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1719. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1720. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1721. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1722. CRT,RUN,MODE_CONTROL,0x02
  1723. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1724. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1725. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1726. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1727. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1728. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1729. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1730. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1731. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1732. DIR,RUN,MISC_WRITE,0x2f
  1733. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1734. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1735. CLK_IND, RUN, FREQ_2, 0x9b
  1736. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1737. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1738. CRT,RUN,LATCH_DATA, 0x00
  1739.  
  1740. [1152,864,32,56,60]
  1741. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1742. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1743. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1744. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1745. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1746. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1747. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1748. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1749. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1750. CRT,RUN,MODE_CONTROL,0x02
  1751. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1752. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1753. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1754. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1755. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1756. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1757. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1758. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1759. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1760. DIR,RUN,MISC_WRITE,0x2f
  1761. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1762. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1763. CLK_IND, RUN, FREQ_2, 0x90
  1764. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1765. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1766. CRT,RUN,LATCH_DATA, 0x00
  1767.  
  1768. [1152,864,24,64,70]
  1769. # Unlock CRTC
  1770. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1771. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1772. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1773. # Dump CRT Controller Registers
  1774. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1775. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1776. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1777. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1778. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1779. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1780. CRT,RUN,MODE_CONTROL,0x02
  1781. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1782. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1783. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1784. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1785. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1786. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1787. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1788. # Lock CRTC Reg 11 for compatibility
  1789. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1790. # Dump ENG Register
  1791. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1792. # Dump MISCOUT Register
  1793. DIR,RUN,MISC_WRITE,0xef
  1794. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1795. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1796. CLK_IND, RUN, FREQ_2, 0x9b
  1797. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1798. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1799. CRT,RUN,LATCH_DATA, 0x00
  1800.  
  1801. [1152,864,24,56,60]
  1802. # Unlock CRTC
  1803. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1804. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1805. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1806. # Dump CRT Controller Registers
  1807. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6e,0x14,0xac,0xff,0x00,0x60
  1808. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1809. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1810. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1811. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1812. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1813. CRT,RUN,MODE_CONTROL,0x02
  1814. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1815. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1816. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1817. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1818. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1819. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1820. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1821. # Lock CRTC Reg 11 for compatibility
  1822. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1823. # Dump ENG Register
  1824. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1825. # Dump MISCOUT Register
  1826. DIR,RUN,MISC_WRITE,0xef
  1827. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1828. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1829. CLK_IND, RUN, FREQ_2, 0x90
  1830. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1831. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1832. CRT,RUN,LATCH_DATA, 0x00
  1833.  
  1834. [1152,864,16,82,90]
  1835. # Unlock CRTC
  1836. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1837. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1838. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1839. # Dump CRT Controller Registers
  1840. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1841. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1842. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1843. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1844. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1845. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1846. CRT,RUN,MODE_CONTROL,0x02
  1847. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1848. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1849. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1850. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1851. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1852. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1853. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1854. # Lock CRTC Reg 11 for compatibility
  1855. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1856. # Dump ENG Register
  1857. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1858. # Dump MISCOUT Register
  1859. DIR,RUN,MISC_WRITE,0xef
  1860. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1861. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1862. CLK_IND, RUN, FREQ_2, 0xb9
  1863. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1864. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1865. CRT,RUN,LATCH_DATA, 0x00
  1866.  
  1867. [1152,864,16,71,75]
  1868. # Unlock CRTC
  1869. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1870. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1871. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1872. # Dump CRT Controller Registers
  1873. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1874. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1875. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1876. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1877. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1878. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1879. CRT,RUN,MODE_CONTROL,0x02
  1880. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1881. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1882. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1883. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1884. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1885. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1886. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1887. # Lock CRTC Reg 11 for compatibility
  1888. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1889. # Dump ENG Register
  1890. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1891. # Dump MISCOUT Register
  1892. DIR,RUN,MISC_WRITE,0xef
  1893. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1894. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1895. CLK_IND, RUN, FREQ_2, 0xa9
  1896. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1897. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1898. CRT,RUN,LATCH_DATA, 0x00
  1899.  
  1900. [1152,864,16,64,70]
  1901. # Unlock CRTC
  1902. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1903. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1904. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1905. # Dump CRT Controller Registers
  1906. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1907. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1908. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1909. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1910. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1911. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1912. CRT,RUN,MODE_CONTROL,0x02
  1913. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1914. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1915. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1916. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1917. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1918. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1919. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1920. # Lock CRTC Reg 11 for compatibility
  1921. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1922. # Dump ENG Register
  1923. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1924. # Dump MISCOUT Register
  1925. DIR,RUN,MISC_WRITE,0xef
  1926. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1927. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1928. CLK_IND, RUN, FREQ_2, 0x9b
  1929. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1930. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1931. CRT,RUN,LATCH_DATA, 0x00
  1932.  
  1933. [1152,864,16,56,60]
  1934. # Unlock CRTC
  1935. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1936. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1937. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1938. # Dump CRT Controller Registers
  1939. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1940. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1941. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1942. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1943. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1944. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1945. CRT,RUN,MODE_CONTROL,0x02
  1946. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1947. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1948. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1949. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1950. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1951. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1952. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1953. # Lock CRTC Reg 11 for compatibility
  1954. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1955. # Dump ENG Register
  1956. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1957. # Dump MISCOUT Register
  1958. DIR,RUN,MISC_WRITE,0xef
  1959. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1960. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1961. CLK_IND, RUN, FREQ_2, 0x90
  1962. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1963. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1964. CRT,RUN,LATCH_DATA, 0x00
  1965.  
  1966. [1152,864,8,82,90]
  1967. # Unlock CRTC
  1968. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1969. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1970. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1971. # Dump CRT Controller Registers
  1972. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4e,0x12,0x95,0xff,0x00,0x60
  1973. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1974. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1975. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1976. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1977. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1978. CRT,RUN,MODE_CONTROL,0x02
  1979. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1980. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1981. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1982. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1983. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1984. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1985. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1986. # Lock CRTC Reg 11 for compatibility
  1987. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1988. # Dump ENG Register
  1989. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1990. # Dump MISCOUT Register
  1991. DIR,RUN,MISC_WRITE,0xef
  1992. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1993. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1994. CLK_IND, RUN, FREQ_2, 0xb9
  1995. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1996. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1997. CRT,RUN,LATCH_DATA, 0x08
  1998.  
  1999. [1152,864,8,71,75]
  2000. # Unlock CRTC
  2001. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2002. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2003. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2004. # Dump CRT Controller Registers
  2005. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  2006. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2007. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  2008. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  2009. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2010. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  2011. CRT,RUN,MODE_CONTROL,0x02
  2012. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2013. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2014. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2015. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2016. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2017. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2018. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  2019. # Lock CRTC Reg 11 for compatibility
  2020. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2021. # Dump ENG Register
  2022. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2023. # Dump MISCOUT Register
  2024. DIR,RUN,MISC_WRITE,0xef
  2025. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2026. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2027. CLK_IND, RUN, FREQ_2, 0xa9
  2028. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2029. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2030. CRT,RUN,LATCH_DATA, 0x08
  2031.  
  2032. [1152,864,8,64,70]
  2033. # Unlock CRTC
  2034. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2035. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2036. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2037. # Dump CRT Controller Registers
  2038. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  2039. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2040. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  2041. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  2042. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2043. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  2044. CRT,RUN,MODE_CONTROL,0x02
  2045. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2046. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2047. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2048. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2049. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2050. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2051. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  2052. # Lock CRTC Reg 11 for compatibility
  2053. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2054. # Dump ENG Register
  2055. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2056. # Dump MISCOUT Register
  2057. DIR,RUN,MISC_WRITE,0xef
  2058. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2059. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2060. CLK_IND, RUN, FREQ_2, 0x9b
  2061. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2062. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2063. CRT,RUN,LATCH_DATA, 0x08
  2064.  
  2065. [1152,864,8,56,60]
  2066. # Unlock CRTC
  2067. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2068. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2069. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2070. # Dump CRT Controller Registers
  2071. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  2072. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2073. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  2074. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  2075. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2076. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  2077. CRT,RUN,MODE_CONTROL,0x02
  2078. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2079. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2080. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2081. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2082. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2083. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2084. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  2085. # Lock CRTC Reg 11 for compatibility
  2086. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2087. # Dump ENG Register
  2088. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2089. # Dump MISCOUT Register
  2090. DIR,RUN,MISC_WRITE,0xef
  2091. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2092. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2093. CLK_IND, RUN, FREQ_2, 0x90
  2094. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2095. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2096. CRT,RUN,LATCH_DATA, 0x08
  2097.  
  2098. [1024,768,32,64,80]
  2099. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2100. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2101. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2102. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2103. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2104. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2105. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2106. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2107. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2108. CRT,RUN,MODE_CONTROL,0x02
  2109. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2110. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2111. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2112. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2113. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2114. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2115. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2116. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2117. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2118. DIR,RUN,MISC_WRITE,0x2f
  2119. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2120. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2121. CLK_IND, RUN, FREQ_2, 0x93
  2122. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2123. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2124. CRT,RUN,LATCH_DATA, 0x00
  2125.  
  2126. [1024,768,32,60,75]
  2127. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2128. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2129. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2130. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2131. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2132. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2133. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2134. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2135. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2136. CRT,RUN,MODE_CONTROL,0x02
  2137. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2138. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2139. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2140. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2141. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2142. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2143. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2144. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2145. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2146. DIR,RUN,MISC_WRITE,0x2f
  2147. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2148. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2149. CLK_IND, RUN, FREQ_2, 0x8c
  2150. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2151. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2152. CRT,RUN,LATCH_DATA, 0x00
  2153.  
  2154. [1024,768,32,58,72]
  2155. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2156. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2157. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2158. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2159. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2160. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2161. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2162. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2163. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2164. CRT,RUN,MODE_CONTROL,0x02
  2165. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2166. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2167. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2168. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2169. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2170. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2171. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2172. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2173. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2174. DIR,RUN,MISC_WRITE,0x2f
  2175. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2176. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2177. CLK_IND, RUN, FREQ_2, 0x88
  2178. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2179. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2180. CRT,RUN,LATCH_DATA, 0x00
  2181.  
  2182. [1024,768,32,56,70]
  2183. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2184. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2185. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2186. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2187. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2188. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2189. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2190. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2191. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2192. CRT,RUN,MODE_CONTROL,0x02
  2193. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2194. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2195. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2196. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2197. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2198. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2199. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2200. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2201. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2202. DIR,RUN,MISC_WRITE,0x2f
  2203. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2204. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2205. CLK_IND, RUN, FREQ_2, 0x88
  2206. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2207. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2208. CRT,RUN,LATCH_DATA, 0x00
  2209.  
  2210. [1024,768,32,48,60]
  2211. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2212. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2213. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2214. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2215. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2216. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2217. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2218. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2219. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2220. CRT,RUN,MODE_CONTROL,0x02
  2221. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2222. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2223. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2224. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2225. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2226. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2227. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2228. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2229. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2230. DIR,RUN,MISC_WRITE,0x2f
  2231. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2232. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2233. CLK_IND, RUN, FREQ_2, 0x7e
  2234. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2235. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2236. CRT,RUN,LATCH_DATA, 0x00
  2237.  
  2238. [1024,768,24,64,80]
  2239. # Unlock CRTC
  2240. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2241. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2242. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2243. # Dump CRT Controller Registers
  2244. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x68,0x91,0x1f,0xf5,0x00,0x60
  2245. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2246. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  2247. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  2248. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2249. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  2250. CRT,RUN,MODE_CONTROL,0x02
  2251. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2252. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2253. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2254. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2255. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2256. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2257. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2258. # Lock CRTC Reg 11 for compatibility
  2259. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2260. # Dump ENG Register
  2261. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2262. # Dump MISCOUT Register
  2263. DIR,RUN,MISC_WRITE,0xef
  2264. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2265. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2266. CLK_IND, RUN, FREQ_2, 0x93
  2267. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2268. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2269. CRT,RUN,LATCH_DATA, 0x00
  2270.  
  2271. [1024,768,24,60,75]
  2272. # Unlock CRTC
  2273. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2274. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2275. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2276. # Dump CRT Controller Registers
  2277. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x62,0x8f,0x1e,0xf1,0x00,0x60
  2278. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2279. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2280. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2281. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2282. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2283. CRT,RUN,MODE_CONTROL,0x02
  2284. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2285. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2286. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2287. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2288. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2289. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2290. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2291. # Lock CRTC Reg 11 for compatibility
  2292. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2293. # Dump ENG Register
  2294. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2295. # Dump MISCOUT Register
  2296. DIR,RUN,MISC_WRITE,0xef
  2297. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2298. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2299. CLK_IND, RUN, FREQ_2, 0x8c
  2300. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2301. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2302. CRT,RUN,LATCH_DATA, 0x00
  2303.  
  2304. [1024,768,24,58,72]
  2305. # Unlock CRTC
  2306. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2307. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2308. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2309. # Dump CRT Controller Registers
  2310. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x63,0x8c,0x19,0xf5,0x00,0x60
  2311. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2312. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2313. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2314. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2315. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2316. CRT,RUN,MODE_CONTROL,0x02
  2317. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2318. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2319. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2320. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2321. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2322. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2323. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2324. # Lock CRTC Reg 11 for compatibility
  2325. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2326. # Dump ENG Register
  2327. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2328. # Dump MISCOUT Register
  2329. DIR,RUN,MISC_WRITE,0xef
  2330. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2331. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2332. CLK_IND, RUN, FREQ_2, 0x88
  2333. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2334. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2335. CRT,RUN,LATCH_DATA, 0x00
  2336.  
  2337. [1024,768,24,56,70]
  2338. # Unlock CRTC
  2339. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2340. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2341. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2342. # Dump CRT Controller Registers
  2343. ##CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x61,0x8e,0x2a,0xf5,0x00,0x60
  2344. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x63,0x90,0x24,0xfd,0x00,0x60
  2345. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2346. ##CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2347. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2348. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2349. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x25,0xeb,0xff
  2350. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2351. ##CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2352. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2353. CRT,RUN,MODE_CONTROL,0x02
  2354. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2355. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2356. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2357. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2358. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2359. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2360. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2361. # Lock CRTC Reg 11 for compatibility
  2362. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2363. # Dump ENG Register
  2364. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2365. # Dump MISCOUT Register
  2366. DIR,RUN,MISC_WRITE,0xef
  2367. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2368. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2369. ##CLK_IND, RUN, FREQ_2, 0x88
  2370. CLK_IND, RUN, FREQ_2, 0x89
  2371. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2372. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2373. CRT,RUN,LATCH_DATA, 0x00
  2374.  
  2375. [1024,768,24,48,60]
  2376. # Unlock CRTC
  2377. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2378. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2379. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2380. # Dump CRT Controller Registers
  2381. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2382. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2383. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2384. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2385. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2386. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2387. CRT,RUN,MODE_CONTROL,0x02
  2388. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2389. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2390. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2391. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2392. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2393. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2394. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2395. # Lock CRTC Reg 11 for compatibility
  2396. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2397. # Dump ENG Register
  2398. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2399. # Dump MISCOUT Register
  2400. DIR,RUN,MISC_WRITE,0xef
  2401. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2402. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2403. CLK_IND, RUN, FREQ_2, 0x7e
  2404. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2405. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2406. CRT,RUN,LATCH_DATA, 0x00
  2407.  
  2408. [1024,768,16,96,120]
  2409. # Unlock CRTC
  2410. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2411. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2412. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2413. # Dump CRT Controller Registers
  2414. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2415. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2416. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2417. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2418. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2419. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2420. CRT,RUN,MODE_CONTROL,0x02
  2421. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2422. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2423. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2424. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2425. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2426. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2427. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2428. # Lock CRTC Reg 11 for compatibility
  2429. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2430. # Dump ENG Register
  2431. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2432. # Dump MISCOUT Register
  2433. DIR,RUN,MISC_WRITE,0xef
  2434. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2435. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2436. CLK_IND, RUN, FREQ_2, 0xbd
  2437. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2438. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2439. CRT,RUN,LATCH_DATA, 0x00
  2440.  
  2441. [1024,768,16,81,100]
  2442. # Unlock CRTC
  2443. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2444. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2445. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2446. # Dump CRT Controller Registers
  2447. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2448. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2449. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2450. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2451. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2452. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2453. CRT,RUN,MODE_CONTROL,0x02
  2454. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2455. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2456. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2457. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2458. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2459. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2460. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2461. # Lock CRTC Reg 11 for compatibility
  2462. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2463. # Dump ENG Register
  2464. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2465. # Dump MISCOUT Register
  2466. DIR,RUN,MISC_WRITE,0xef
  2467. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2468. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2469. CLK_IND, RUN, FREQ_2, 0xa9
  2470. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2471. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2472. CRT,RUN,LATCH_DATA, 0x00
  2473.  
  2474. [1024,768,16,64,80]
  2475. # Unlock CRTC
  2476. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2477. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2478. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2479. # Dump CRT Controller Registers
  2480. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2481. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2482. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2483. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2484. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2485. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2486. CRT,RUN,MODE_CONTROL,0x02
  2487. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2488. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2489. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2490. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2491. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2492. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2493. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2494. # Lock CRTC Reg 11 for compatibility
  2495. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2496. # Dump ENG Register
  2497. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2498. # Dump MISCOUT Register
  2499. DIR,RUN,MISC_WRITE,0xef
  2500. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2501. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2502. CLK_IND, RUN, FREQ_2, 0x93
  2503. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2504. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2505. CRT,RUN,LATCH_DATA, 0x00
  2506.  
  2507. [1024,768,16,60,75]
  2508. # Unlock CRTC
  2509. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2510. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2511. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2512. # Dump CRT Controller Registers
  2513. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2514. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2515. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2516. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2517. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2518. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2519. CRT,RUN,MODE_CONTROL,0x02
  2520. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2521. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2522. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2523. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2524. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2525. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2526. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2527. # Lock CRTC Reg 11 for compatibility
  2528. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2529. # Dump ENG Register
  2530. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2531. # Dump MISCOUT Register
  2532. DIR,RUN,MISC_WRITE,0xef
  2533. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2534. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2535. CLK_IND, RUN, FREQ_2, 0x8c
  2536. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2537. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2538. CRT,RUN,LATCH_DATA, 0x00
  2539.  
  2540. [1024,768,16,58,72]
  2541. # Unlock CRTC
  2542. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2543. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2544. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2545. # Dump CRT Controller Registers
  2546. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2547. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2548. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2549. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2550. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2551. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2552. CRT,RUN,MODE_CONTROL,0x02
  2553. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2554. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2555. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2556. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2557. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2558. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2559. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2560. # Lock CRTC Reg 11 for compatibility
  2561. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2562. # Dump ENG Register
  2563. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2564. # Dump MISCOUT Register
  2565. DIR,RUN,MISC_WRITE,0xef
  2566. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2567. CLK_IND, RUN, FREQ_2,0x88
  2568. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2569. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2570. CLK_IND, RUN, FREQ_2, 0x88
  2571. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2572. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2573. CRT,RUN,LATCH_DATA, 0x00
  2574.  
  2575. [1024,768,16,56,70]
  2576. # Unlock CRTC
  2577. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2578. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2579. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2580. # Dump CRT Controller Registers
  2581. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2582. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2583. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2584. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2585. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2586. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2587. CRT,RUN,MODE_CONTROL,0x02
  2588. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2589. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2590. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2591. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2592. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2593. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2594. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2595. # Lock CRTC Reg 11 for compatibility
  2596. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2597. # Dump ENG Register
  2598. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2599. # Dump MISCOUT Register
  2600. DIR,RUN,MISC_WRITE,0xef
  2601. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2602. CLK_IND, RUN, FREQ_2,0x88
  2603. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2604. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2605. CLK_IND, RUN, FREQ_2, 0x88
  2606. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2607. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2608. CRT,RUN,LATCH_DATA, 0x00
  2609.  
  2610. [1024,768,16,48,60]
  2611. # Unlock CRTC
  2612. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2613. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2614. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2615. # Dump CRT Controller Registers
  2616. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2617. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2618. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2619. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2620. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2621. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2622. CRT,RUN,MODE_CONTROL,0x02
  2623. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2624. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2625. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2626. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2627. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2628. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2629. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2630. # Lock CRTC Reg 11 for compatibility
  2631. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2632. # Dump ENG Register
  2633. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2634. # Dump MISCOUT Register
  2635. DIR,RUN,MISC_WRITE,0xef
  2636. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2637. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2638. CLK_IND, RUN, FREQ_2, 0x7E
  2639. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2640. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2641. CRT,RUN,LATCH_DATA, 0x00
  2642.  
  2643. [1024,768,8,96,120]
  2644. # Unlock CRTC
  2645. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2646. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2647. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2648. # Dump CRT Controller Registers
  2649. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2650. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2651. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2652. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2653. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2654. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2655. CRT,RUN,MODE_CONTROL,0x02
  2656. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2657. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2658. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2659. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2660. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2661. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2662. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2663. # Lock CRTC Reg 11 for compatibility
  2664. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2665. # Dump ENG Register
  2666. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2667. # Dump MISCOUT Register
  2668. DIR,RUN,MISC_WRITE,0xef
  2669. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2670. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2671. CLK_IND, RUN, FREQ_2, 0xbd
  2672. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2673. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2674. CRT,RUN,LATCH_DATA, 0x08
  2675.  
  2676. [1024,768,8,81,100]
  2677. # Unlock CRTC
  2678. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2679. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2680. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2681. # Dump CRT Controller Registers
  2682. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2683. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2684. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2685. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2686. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2687. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2688. CRT,RUN,MODE_CONTROL,0x02
  2689. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2690. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2691. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2692. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2693. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2694. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2695. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2696. # Lock CRTC Reg 11 for compatibility
  2697. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2698. # Dump ENG Register
  2699. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2700. # Dump MISCOUT Register
  2701. DIR,RUN,MISC_WRITE,0xef
  2702. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2703. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2704. CLK_IND, RUN, FREQ_2, 0xa9
  2705. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2706. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2707. CRT,RUN,LATCH_DATA, 0x08
  2708.  
  2709. [1024,768,8,64,80]
  2710. # Unlock CRTC
  2711. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2712. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2713. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2714. # Dump CRT Controller Registers
  2715. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2716. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2717. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2718. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2719. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2720. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2721. CRT,RUN,MODE_CONTROL,0x02
  2722. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2723. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2724. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2725. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2726. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2727. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2728. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2729. # Lock CRTC Reg 11 for compatibility
  2730. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2731. # Dump ENG Register
  2732. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2733. # Dump MISCOUT Register
  2734. DIR,RUN,MISC_WRITE,0xef
  2735. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2736. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2737. CLK_IND, RUN, FREQ_2, 0x93
  2738. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2739. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2740. CRT,RUN,LATCH_DATA, 0x08
  2741.  
  2742. [1024,768,8,60,75]
  2743. # Unlock CRTC
  2744. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2745. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2746. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2747. # Dump CRT Controller Registers
  2748. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2749. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2750. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2751. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2752. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2753. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2754. CRT,RUN,MODE_CONTROL,0x02
  2755. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2756. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2757. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2758. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2759. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2760. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2761. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2762. # Lock CRTC Reg 11 for compatibility
  2763. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2764. # Dump ENG Register
  2765. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2766. # Dump MISCOUT Register
  2767. DIR,RUN,MISC_WRITE,0xef
  2768. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2769. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2770. CLK_IND, RUN, FREQ_2, 0x8c
  2771. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2772. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2773. CRT,RUN,LATCH_DATA, 0x08
  2774.  
  2775. [1024,768,8,58,72]
  2776. # Unlock CRTC
  2777. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2778. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2779. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2780. # Dump CRT Controller Registers
  2781. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2782. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2783. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2784. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2785. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2786. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2787. CRT,RUN,MODE_CONTROL,0x02
  2788. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2789. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2790. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2791. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2792. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2793. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2794. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2795. # Lock CRTC Reg 11 for compatibility
  2796. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2797. # Dump ENG Register
  2798. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2799. # Dump MISCOUT Register
  2800. DIR,RUN,MISC_WRITE,0xef
  2801. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2802. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2803. CLK_IND, RUN, FREQ_2, 0x88
  2804. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2805. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2806. CRT,RUN,LATCH_DATA, 0x08
  2807.  
  2808. [1024,768,8,56,70]
  2809. # Unlock CRTC
  2810. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2811. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2812. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2813. # Dump CRT Controller Registers
  2814. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2815. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2816. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2817. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2818. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2819. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2820. CRT,RUN,MODE_CONTROL,0x02
  2821. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2822. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2823. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2824. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2825. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2826. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2827. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2828. # Lock CRTC Reg 11 for compatibility
  2829. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2830. # Dump ENG Register
  2831. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2832. # Dump MISCOUT Register
  2833. DIR,RUN,MISC_WRITE,0xef
  2834. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2835. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2836. CLK_IND, RUN, FREQ_2, 0x88
  2837. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2838. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2839. CRT,RUN,LATCH_DATA, 0x08
  2840.  
  2841. [1024,768,8,48,60]
  2842. # Unlock CRTC
  2843. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2844. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2845. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2846. # Dump CRT Controller Registers
  2847. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2848. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2849. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2850. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2851. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2852. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2853. CRT,RUN,MODE_CONTROL,0x02
  2854. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2855. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2856. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2857. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2858. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2859. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2860. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2861. # Lock CRTC Reg 11 for compatibility
  2862. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2863. # Dump ENG Register
  2864. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2865. # Dump MISCOUT Register
  2866. DIR,RUN,MISC_WRITE,0xef
  2867. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2868. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2869. CLK_IND, RUN, FREQ_2, 0x7e
  2870. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2871. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2872. CRT,RUN,LATCH_DATA, 0x08
  2873.  
  2874. [800,600,32,75,120]
  2875. # Unlock CRTC
  2876. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2877. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2878. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2879. # Dump CRT Controller Registers
  2880. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2881. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2882. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2883. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2884. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2885. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2886. CRT,RUN,MODE_CONTROL,0x02
  2887. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2888. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2889. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2890. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2891. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2892. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2893. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2894. # Lock CRTC Reg 11 for compatibility
  2895. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2896. # Dump ENG Register
  2897. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2898. # Dump MISCOUT Register
  2899. DIR,RUN,MISC_WRITE,0xef
  2900. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2901. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2902. CLK_IND, RUN, FREQ_2, 0x8a
  2903. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2904. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2905. CRT,RUN,LATCH_DATA, 0x00
  2906.  
  2907. [800,600,32,64,100]
  2908. # Unlock CRTC
  2909. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2910. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2911. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2912. # Dump CRT Controller Registers
  2913. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2914. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2915. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2916. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2917. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2918. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2919. CRT,RUN,MODE_CONTROL,0x02
  2920. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2921. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2922. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2923. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2924. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2925. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2926. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2927. # Lock CRTC Reg 11 for compatibility
  2928. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2929. # Dump ENG Register
  2930. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2931. # Dump MISCOUT Register
  2932. DIR,RUN,MISC_WRITE,0xef
  2933. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2934. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2935. CLK_IND, RUN, FREQ_2, 0x7e
  2936. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2937. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2938. CRT,RUN,LATCH_DATA, 0x00
  2939.  
  2940. [800,600,32,56,90]
  2941. # Unlock CRTC
  2942. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2943. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2944. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2945. # Dump CRT Controller Registers
  2946. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2947. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2948. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2949. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2950. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2951. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2952. CRT,RUN,MODE_CONTROL,0x02
  2953. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2954. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2955. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2956. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2957. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2958. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2959. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2960. # Lock CRTC Reg 11 for compatibility
  2961. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2962. # Dump ENG Register
  2963. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2964. # Dump MISCOUT Register
  2965. DIR,RUN,MISC_WRITE,0xef
  2966. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2967. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2968. CLK_IND, RUN, FREQ_2, 0x70
  2969. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2970. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2971. CRT,RUN,LATCH_DATA, 0x00
  2972.  
  2973. [800,600,32,46,75]
  2974. # Unlock CRTC
  2975. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2976. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2977. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2978. # Dump CRT Controller Registers
  2979. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2980. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2981. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2982. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2983. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2984. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2985. CRT,RUN,MODE_CONTROL,0x02
  2986. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2987. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2988. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2989. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2990. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2991. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2992. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2993. # Lock CRTC Reg 11 for compatibility
  2994. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2995. # Dump ENG Register
  2996. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2997. # Dump MISCOUT Register
  2998. DIR,RUN,MISC_WRITE,0xef
  2999. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3000. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3001. CLK_IND, RUN, FREQ_2, 0x60
  3002. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3003. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3004. CRT,RUN,LATCH_DATA, 0x00
  3005.  
  3006. [800,600,32,48,72]
  3007. # Unlock CRTC
  3008. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3009. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3010. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3011. # Dump CRT Controller Registers
  3012. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3013. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3014. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3015. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3016. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3017. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3018. CRT,RUN,MODE_CONTROL,0x02
  3019. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3020. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3021. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3022. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3023. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3024. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  3025. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3026. # Lock CRTC Reg 11 for compatibility
  3027. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3028. # Dump ENG Register
  3029. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3030. # Dump MISCOUT Register
  3031. DIR,RUN,MISC_WRITE,0xef
  3032. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3033. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3034. CLK_IND, RUN, FREQ_2, 0x61
  3035. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3036. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3037. CRT,RUN,LATCH_DATA, 0x00
  3038.  
  3039. [800,600,32,35,56]
  3040. # Unlock CRTC
  3041. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3042. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3043. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3044. # Dump CRT Controller Registers
  3045. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3046. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3047. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3048. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3049. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3050. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3051. CRT,RUN,MODE_CONTROL,0x02
  3052. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3053. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3054. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3055. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3056. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3057. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  3058. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3059. # Lock CRTC Reg 11 for compatibility
  3060. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3061. # Dump ENG Register
  3062. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3063. # Dump MISCOUT Register
  3064. DIR,RUN,MISC_WRITE,0xef
  3065. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3066. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3067. CLK_IND, RUN, FREQ_2, 0x45
  3068. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3069. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3070. CRT,RUN,LATCH_DATA, 0x00
  3071.  
  3072. [800,600,32,37,60]
  3073. # Unlock CRTC
  3074. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3075. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3076. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3077. # Dump CRT Controller Registers
  3078. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3079. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3080. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3081. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3082. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3083. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3084. CRT,RUN,MODE_CONTROL,0x02
  3085. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3086. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3087. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3088. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3089. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3090. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  3091. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3092. # Lock CRTC Reg 11 for compatibility
  3093. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3094. # Dump ENG Register
  3095. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3096. # Dump MISCOUT Register
  3097. DIR,RUN,MISC_WRITE,0xef
  3098. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3099. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3100. CLK_IND, RUN, FREQ_2, 0x4D
  3101. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3102. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3103. CRT,RUN,LATCH_DATA, 0x00
  3104.  
  3105. [800,600,24,75,120]
  3106. # Unlock CRTC
  3107. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3108. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3109. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3110. # Dump CRT Controller Registers
  3111. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  3112. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3113. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  3114. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3115. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3116. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  3117. CRT,RUN,MODE_CONTROL,0x02
  3118. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3119. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3120. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3121. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3122. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3123. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3124. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3125. # Lock CRTC Reg 11 for compatibility
  3126. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3127. # Dump ENG Register
  3128. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3129. # Dump MISCOUT Register
  3130. DIR,RUN,MISC_WRITE,0xef
  3131. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3132. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3133. CLK_IND, RUN, FREQ_2, 0x8a
  3134. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3135. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3136. CRT,RUN,LATCH_DATA, 0x00
  3137.  
  3138.  
  3139. [800,600,24,64,100]
  3140. # Unlock CRTC
  3141. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3142. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3143. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3144. # Dump CRT Controller Registers
  3145. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  3146. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3147. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  3148. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3149. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3150. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3151. CRT,RUN,MODE_CONTROL,0x02
  3152. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3153. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3154. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3155. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3156. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3157. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3158. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3159. # Lock CRTC Reg 11 for compatibility
  3160. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3161. # Dump ENG Register
  3162. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3163. # Dump MISCOUT Register
  3164. DIR,RUN,MISC_WRITE,0xef
  3165. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3166. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3167. CLK_IND, RUN, FREQ_2, 0x7e
  3168. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3169. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3170. CRT,RUN,LATCH_DATA, 0x00
  3171.  
  3172.  
  3173. [800,600,24,56,90]
  3174. # Unlock CRTC
  3175. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3176. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3177. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3178. # Dump CRT Controller Registers
  3179. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  3180. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3181. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  3182. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3183. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3184. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  3185. CRT,RUN,MODE_CONTROL,0x02
  3186. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3187. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3188. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3189. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3190. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3191. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3192. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3193. # Lock CRTC Reg 11 for compatibility
  3194. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3195. # Dump ENG Register
  3196. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3197. # Dump MISCOUT Register
  3198. DIR,RUN,MISC_WRITE,0xef
  3199. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3200. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3201. CLK_IND, RUN, FREQ_2, 0x70
  3202. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3203. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3204. CRT,RUN,LATCH_DATA, 0x00
  3205.  
  3206.  
  3207. [800,600,24,46,75]
  3208. # Unlock CRTC
  3209. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3210. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3211. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3212. # Dump CRT Controller Registers
  3213. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  3214. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3215. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3216. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3217. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3218. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3219. CRT,RUN,MODE_CONTROL,0x02
  3220. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3221. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3222. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3223. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3224. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3225. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3226. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3227. # Lock CRTC Reg 11 for compatibility
  3228. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3229. # Dump ENG Register
  3230. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3231. # Dump MISCOUT Register
  3232. DIR,RUN,MISC_WRITE,0xef
  3233. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3234. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3235. CLK_IND, RUN, FREQ_2, 0x60
  3236. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3237. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3238. CRT,RUN,LATCH_DATA, 0x00
  3239.  
  3240.  
  3241. [800,600,24,48,72]
  3242. # Unlock CRTC
  3243. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3244. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3245. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3246. # Dump CRT Controller Registers
  3247. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  3248. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  3249. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3250. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  3251. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  3252. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3253. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  3254. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3255. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3256. CRT,RUN,MODE_CONTROL,0x02
  3257. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3258. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3259. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3260. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3261. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3262. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3263. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3264. # Lock CRTC Reg 11 for compatibility
  3265. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3266. # Dump ENG Register
  3267. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3268. # Dump MISCOUT Register
  3269. DIR,RUN,MISC_WRITE,0xef
  3270. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3271. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3272. ##CLK_IND, RUN, FREQ_2, 0x61
  3273. CLK_IND, RUN, FREQ_2, 0x62
  3274. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3275. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3276. CRT,RUN,LATCH_DATA, 0x00
  3277.  
  3278. [800,600,24,37,60]
  3279. # Unlock CRTC
  3280. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3281. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3282. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3283. # Dump CRT Controller Registers
  3284. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  3285. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3286. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3287. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3288. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3289. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3290. CRT,RUN,MODE_CONTROL,0x02
  3291. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3292. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3293. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3294. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3295. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3296. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3297. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3298. # Lock CRTC Reg 11 for compatibility
  3299. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3300. # Dump ENG Register
  3301. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3302. # Dump MISCOUT Register
  3303. DIR,RUN,MISC_WRITE,0xef
  3304. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3305. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3306. CLK_IND, RUN, FREQ_2, 0x4d
  3307. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3308. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3309. CRT,RUN,LATCH_DATA, 0x00
  3310.  
  3311.  
  3312. [800,600,24,35,56]
  3313. # Unlock CRTC
  3314. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3315. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3316. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3317. # Dump CRT Controller Registers
  3318. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  3319. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3320. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3321. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3322. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3323. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3324. CRT,RUN,MODE_CONTROL,0x02
  3325. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3326. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3327. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3328. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3329. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3330. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3331. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3332. # Lock CRTC Reg 11 for compatibility
  3333. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3334. # Dump ENG Register
  3335. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3336. # Dump MISCOUT Register
  3337. DIR,RUN,MISC_WRITE,0xef
  3338. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3339. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3340. CLK_IND, RUN, FREQ_2, 0x45
  3341. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3342. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3343. CRT,RUN,LATCH_DATA, 0x00
  3344.  
  3345.  
  3346.  
  3347. [800,600,16,75,120]
  3348. # Unlock CRTC
  3349. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3350. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3351. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3352. # Dump CRT Controller Registers
  3353. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3354. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3355. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3356. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3357. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3358. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3359. CRT,RUN,MODE_CONTROL,0x02
  3360. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3361. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3362. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3363. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3364. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3365. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3366. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3367. # Lock CRTC Reg 11 for compatibility
  3368. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3369. # Dump ENG Register
  3370. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3371. # Dump MISCOUT Register
  3372. DIR,RUN,MISC_WRITE,0xef
  3373. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3374. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3375. CLK_IND, RUN, FREQ_2, 0x8a
  3376. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3377. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3378. CRT,RUN,LATCH_DATA, 0x00
  3379.  
  3380. [800,600,16,64,100]
  3381. # Unlock CRTC
  3382. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3383. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3384. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3385. # Dump CRT Controller Registers
  3386. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3387. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3388. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3389. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3390. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3391. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3392. CRT,RUN,MODE_CONTROL,0x02
  3393. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3394. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3395. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3396. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3397. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3398. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3399. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3400. # Lock CRTC Reg 11 for compatibility
  3401. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3402. # Dump ENG Register
  3403. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3404. # Dump MISCOUT Register
  3405. DIR,RUN,MISC_WRITE,0xef
  3406. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3407. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3408. CLK_IND, RUN, FREQ_2, 0x7e
  3409. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3410. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3411. CRT,RUN,LATCH_DATA, 0x00
  3412.  
  3413. [800,600,16,56,90]
  3414. # Unlock CRTC
  3415. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3416. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3417. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3418. # Dump CRT Controller Registers
  3419. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3420. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3421. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3422. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3423. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3424. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3425. CRT,RUN,MODE_CONTROL,0x02
  3426. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3427. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3428. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3429. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3430. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3431. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3432. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3433. # Lock CRTC Reg 11 for compatibility
  3434. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3435. # Dump ENG Register
  3436. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3437. # Dump MISCOUT Register
  3438. DIR,RUN,MISC_WRITE,0xef
  3439. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3440. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3441. CLK_IND, RUN, FREQ_2, 0x70
  3442. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3443. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3444. CRT,RUN,LATCH_DATA, 0x00
  3445.  
  3446. [800,600,16,46,75]
  3447. # Unlock CRTC
  3448. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3449. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3450. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3451. # Dump CRT Controller Registers
  3452. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3453. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3454. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3455. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3456. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3457. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3458. CRT,RUN,MODE_CONTROL,0x02
  3459. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3460. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3461. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3462. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3463. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3464. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3465. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3466. # Lock CRTC Reg 11 for compatibility
  3467. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3468. # Dump ENG Register
  3469. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3470. # Dump MISCOUT Register
  3471. DIR,RUN,MISC_WRITE,0xef
  3472. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3473. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3474. CLK_IND, RUN, FREQ_2, 0x60
  3475. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3476. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3477. CRT,RUN,LATCH_DATA, 0x00
  3478.  
  3479. [800,600,16,48,72]
  3480. # Unlock CRTC
  3481. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3482. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3483. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3484. # Dump CRT Controller Registers
  3485. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3486. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3487. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3488. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3489. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3490. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3491. CRT,RUN,MODE_CONTROL,0x02
  3492. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3493. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3494. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3495. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3496. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3497. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3498. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3499. # Lock CRTC Reg 11 for compatibility
  3500. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3501. # Dump ENG Register
  3502. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3503. # Dump MISCOUT Register
  3504. DIR,RUN,MISC_WRITE,0xef
  3505. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3506. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3507. CLK_IND, RUN, FREQ_2, 0x61
  3508. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3509. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3510. CRT,RUN,LATCH_DATA, 0x00
  3511.  
  3512. [800,600,16,35,56]
  3513. # Unlock CRTC
  3514. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3515. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3516. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3517. # Dump CRT Controller Registers
  3518. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3519. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3520. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3521. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3522. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3523. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3524. CRT,RUN,MODE_CONTROL,0x02
  3525. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3526. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3527. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3528. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3529. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3530. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3531. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3532. # Lock CRTC Reg 11 for compatibility
  3533. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3534. # Dump ENG Register
  3535. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3536. # Dump MISCOUT Register
  3537. DIR,RUN,MISC_WRITE,0xef
  3538. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3539. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3540. CLK_IND, RUN, FREQ_2, 0x45
  3541. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3542. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3543. CRT,RUN,LATCH_DATA, 0x00
  3544.  
  3545. [800,600,16,37,60]
  3546. # Unlock CRTC
  3547. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3548. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3549. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3550. # Dump CRT Controller Registers
  3551. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3552. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3553. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3554. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3555. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3556. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3557. CRT,RUN,MODE_CONTROL,0x02
  3558. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3559. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3560. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3561. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3562. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3563. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3564. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3565. # Lock CRTC Reg 11 for compatibility
  3566. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3567. # Dump ENG Register
  3568. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3569. # Dump MISCOUT Register
  3570. DIR,RUN,MISC_WRITE,0xef
  3571. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3572. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3573. CLK_IND, RUN, FREQ_2, 0x4D
  3574. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3575. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3576. CRT,RUN,LATCH_DATA, 0x00
  3577.  
  3578. [800,600,8,75,120]
  3579. # Unlock CRTC
  3580. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3581. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3582. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3583. # Dump CRT Controller Registers
  3584. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3585. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3586. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3587. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3588. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3589. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3590. CRT,RUN,MODE_CONTROL,0x02
  3591. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3592. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3593. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3594. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3595. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3596. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3597. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3598. # Lock CRTC Reg 11 for compatibility
  3599. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3600. # Dump ENG Register
  3601. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3602. # Dump MISCOUT Register
  3603. DIR,RUN,MISC_WRITE,0xef
  3604. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3605. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3606. CLK_IND, RUN, FREQ_2, 0x8a
  3607. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3608. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3609. CRT,RUN,LATCH_DATA, 0x08
  3610.  
  3611. [800,600,8,64,100]
  3612. # Unlock CRTC
  3613. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3614. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3615. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3616. # Dump CRT Controller Registers
  3617. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3618. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3619. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3620. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3621. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3622. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3623. CRT,RUN,MODE_CONTROL,0x02
  3624. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3625. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3626. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3627. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3628. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3629. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3630. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3631. # Lock CRTC Reg 11 for compatibility
  3632. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3633. # Dump ENG Register
  3634. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3635. # Dump MISCOUT Register
  3636. DIR,RUN,MISC_WRITE,0xef
  3637. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3638. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3639. CLK_IND, RUN, FREQ_2, 0x7e
  3640. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3641. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3642. CRT,RUN,LATCH_DATA, 0x08
  3643.  
  3644. [800,600,8,56,90]
  3645. # Unlock CRTC
  3646. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3647. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3648. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3649. # Dump CRT Controller Registers
  3650. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3651. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3652. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3653. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3654. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3655. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3656. CRT,RUN,MODE_CONTROL,0x02
  3657. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3658. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3659. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3660. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3661. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3662. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3663. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3664. # Lock CRTC Reg 11 for compatibility
  3665. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3666. # Dump ENG Register
  3667. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3668. # Dump MISCOUT Register
  3669. DIR,RUN,MISC_WRITE,0xef
  3670. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3671. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3672. CLK_IND, RUN, FREQ_2, 0x70
  3673. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3674. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3675. CRT,RUN,LATCH_DATA, 0x08
  3676.  
  3677. [800,600,8,46,75]
  3678. # Unlock CRTC
  3679. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3680. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3681. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3682. # Dump CRT Controller Registers
  3683. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3684. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3685. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3686. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3687. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3688. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3689. CRT,RUN,MODE_CONTROL,0x02
  3690. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3691. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3692. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3693. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3694. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3695. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3696. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3697. # Lock CRTC Reg 11 for compatibility
  3698. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3699. # Dump ENG Register
  3700. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3701. # Dump MISCOUT Register
  3702. DIR,RUN,MISC_WRITE,0xef
  3703. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3704. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3705. CLK_IND, RUN, FREQ_2, 0x60
  3706. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3707. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3708. CRT,RUN,LATCH_DATA, 0x08
  3709.  
  3710. [800,600,8,48,72]
  3711. # Unlock CRTC
  3712. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3713. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3714. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3715. # Dump CRT Controller Registers
  3716. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3717. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3718. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3719. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3720. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3721. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3722. CRT,RUN,MODE_CONTROL,0x02
  3723. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3724. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3725. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3726. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3727. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3728. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3729. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3730. # Lock CRTC Reg 11 for compatibility
  3731. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3732. # Dump ENG Register
  3733. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3734. # Dump MISCOUT Register
  3735. DIR,RUN,MISC_WRITE,0xef
  3736. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3737. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3738. CLK_IND, RUN, FREQ_2, 0x61
  3739. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3740. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3741. CRT,RUN,LATCH_DATA, 0x08
  3742.  
  3743. [800,600,8,37,60]
  3744. # Unlock CRTC
  3745. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3746. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3747. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3748. # Dump CRT Controller Registers
  3749. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3750. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3751. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3752. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3753. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3754. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3755. CRT,RUN,MODE_CONTROL,0x02
  3756. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3757. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3758. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3759. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3760. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3761. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3762. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3763. # Lock CRTC Reg 11 for compatibility
  3764. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3765. # Dump ENG Register
  3766. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3767. # Dump MISCOUT Register
  3768. DIR,RUN,MISC_WRITE,0xef
  3769. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3770. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3771. CLK_IND, RUN, FREQ_2, 0x4D
  3772. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3773. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3774. CRT,RUN,LATCH_DATA, 0x08
  3775.  
  3776. [800,600,8,35,56]
  3777. # Unlock CRTC
  3778. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3779. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3780. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3781. # Dump CRT Controller Registers
  3782. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3783. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3784. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3785. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3786. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3787. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3788. CRT,RUN,MODE_CONTROL,0x02
  3789. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3790. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3791. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3792. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3793. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3794. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3795. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3796. # Lock CRTC Reg 11 for compatibility
  3797. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3798. # Dump ENG Register
  3799. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3800. # Dump MISCOUT Register
  3801. DIR,RUN,MISC_WRITE,0xef
  3802. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3803. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3804. CLK_IND, RUN, FREQ_2, 0x45
  3805. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3806. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3807. CRT,RUN,LATCH_DATA, 0x08
  3808.  
  3809. [640,480,32,64,120]
  3810. # Unlock CRTC
  3811. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3812. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3813. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3814. # Dump CRT Controller Registers
  3815. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3816. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3817. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3818. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3819. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3820. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3821. CRT,RUN,MODE_CONTROL,0x02
  3822. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3823. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3824. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3825. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3826. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3827. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3828. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3829. # Lock CRTC Reg 11 for compatibility
  3830. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3831. # Dump ENG Register
  3832. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3833. # Dump MISCOUT Register
  3834. DIR,RUN,MISC_WRITE,0xef
  3835. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3836. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3837. CLK_IND, RUN, FREQ_2, 0x67
  3838. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3839. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3840. CRT,RUN,LATCH_DATA, 0x00
  3841.  
  3842. [640,480,32,52,100]
  3843. # Unlock CRTC
  3844. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3845. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3846. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3847. # Dump CRT Controller Registers
  3848. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3849. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3850. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3851. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3852. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3853. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3854. CRT,RUN,MODE_CONTROL,0x02
  3855. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3856. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3857. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3858. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3859. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3860. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3861. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3862. # Lock CRTC Reg 11 for compatibility
  3863. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3864. # Dump ENG Register
  3865. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3866. # Dump MISCOUT Register
  3867. DIR,RUN,MISC_WRITE,0xef
  3868. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3869. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3870. CLK_IND, RUN, FREQ_2, 0x50
  3871. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3872. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3873. CRT,RUN,LATCH_DATA, 0x00
  3874.  
  3875. [640,480,32,48,90]
  3876. # Unlock CRTC
  3877. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3878. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3879. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3880. # Dump CRT Controller Registers
  3881. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3882. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3883. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3884. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3885. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3886. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3887. CRT,RUN,MODE_CONTROL,0x02
  3888. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3889. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3890. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3891. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3892. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3893. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3894. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3895. # Lock CRTC Reg 11 for compatibility
  3896. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3897. # Dump ENG Register
  3898. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3899. # Dump MISCOUT Register
  3900. DIR,RUN,MISC_WRITE,0xef
  3901. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3902. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3903. CLK_IND, RUN, FREQ_2, 0x4d
  3904. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3905. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3906. CRT,RUN,LATCH_DATA, 0x00
  3907.  
  3908. [640,480,32,37,75]
  3909. # Unlock CRTC
  3910. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3911. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3912. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3913. # Dump CRT Controller Registers
  3914. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3915. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3916. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3917. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3918. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3919. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3920. CRT,RUN,MODE_CONTROL,0x02
  3921. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3922. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3923. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3924. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3925. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3926. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3927. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3928. # Lock CRTC Reg 11 for compatibility
  3929. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3930. # Dump ENG Register
  3931. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3932. # Dump MISCOUT Register
  3933. DIR,RUN,MISC_WRITE,0xef
  3934. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3935. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3936. CLK_IND, RUN, FREQ_2, 0x3a
  3937. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3938. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3939. CRT,RUN,LATCH_DATA, 0x00
  3940.  
  3941. [640,480,32,37,72]
  3942. # Unlock CRTC
  3943. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3944. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3945. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3946. # Dump CRT Controller Registers
  3947. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3948. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3949. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3950. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3951. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3952. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3953. CRT,RUN,MODE_CONTROL,0x02
  3954. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3955. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3956. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3957. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3958. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3959. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3960. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3961. # Lock CRTC Reg 11 for compatibility
  3962. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3963. # Dump ENG Register
  3964. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3965. # Dump MISCOUT Register
  3966. DIR,RUN,MISC_WRITE,0xef
  3967. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3968. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3969. CLK_IND, RUN, FREQ_2, 0x3a
  3970. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3971. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3972. CRT,RUN,LATCH_DATA, 0x00
  3973.  
  3974. [640,480,32,31,60]
  3975. # Unlock CRTC
  3976. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3977. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3978. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3979. # Dump CRT Controller Registers
  3980. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3981. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3982. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3983. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3984. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3985. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3986. CRT,RUN,MODE_CONTROL,0x02
  3987. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3988. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3989. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3990. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3991. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3992. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3993. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3994. # Lock CRTC Reg 11 for compatibility
  3995. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3996. # Dump ENG Register
  3997. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3998. # Dump MISCOUT Register
  3999. DIR,RUN,MISC_WRITE,0xef
  4000. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4001. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4002. CLK_IND, RUN, FREQ_2, 0x21
  4003. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4004. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4005. CRT,RUN,LATCH_DATA, 0x00
  4006.  
  4007. [640,480,24,64,120]
  4008. # Unlock CRTC
  4009. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4010. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4011. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4012. # Dump CRT Controller Registers
  4013. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  4014. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4015. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4016. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  4017. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4018. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  4019. CRT,RUN,MODE_CONTROL,0x02
  4020. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4021. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4022. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4023. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4024. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4025. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  4026. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4027. # Lock CRTC Reg 11 for compatibility
  4028. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4029. # Dump ENG Register
  4030. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4031. # Dump MISCOUT Register
  4032. DIR,RUN,MISC_WRITE,0xef
  4033. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4034. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4035. CLK_IND, RUN, FREQ_2, 0x67
  4036. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4037. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4038. CRT,RUN,LATCH_DATA, 0x00
  4039.  
  4040.  
  4041. [640,480,24,52,100]
  4042. # Unlock CRTC
  4043. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4044. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4045. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4046. # Dump CRT Controller Registers
  4047. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  4048. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4049. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4050. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  4051. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4052. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4053. CRT,RUN,MODE_CONTROL,0x02
  4054. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4055. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4056. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4057. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4058. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4059. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4060. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4061. # Lock CRTC Reg 11 for compatibility
  4062. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4063. # Dump ENG Register
  4064. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4065. # Dump MISCOUT Register
  4066. DIR,RUN,MISC_WRITE,0xef
  4067. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4068. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4069. CLK_IND, RUN, FREQ_2, 0x50
  4070. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4071. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4072. CRT,RUN,LATCH_DATA, 0x00
  4073.  
  4074. [640,480,24,48,90]
  4075. # Unlock CRTC
  4076. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4077. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4078. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4079. # Dump CRT Controller Registers
  4080. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  4081. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4082. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4083. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4084. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4085. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4086. CRT,RUN,MODE_CONTROL,0x02
  4087. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4088. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4089. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4090. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4091. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4092. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4093. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4094. # Lock CRTC Reg 11 for compatibility
  4095. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4096. # Dump ENG Register
  4097. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4098. # Dump MISCOUT Register
  4099. DIR,RUN,MISC_WRITE,0xef
  4100. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4101. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4102. CLK_IND, RUN, FREQ_2, 0x4d
  4103. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4104. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4105. CRT,RUN,LATCH_DATA, 0x00
  4106.  
  4107.  
  4108. [640,480,24,37,75]
  4109. # Unlock CRTC
  4110. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4111. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4112. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4113. # Dump CRT Controller Registers
  4114. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  4115. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4116. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4117. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  4118. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4119. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  4120. CRT,RUN,MODE_CONTROL,0x02
  4121. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4122. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4123. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4124. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4125. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4126. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4127. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4128. # Lock CRTC Reg 11 for compatibility
  4129. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4130. # Dump ENG Register
  4131. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4132. # Dump MISCOUT Register
  4133. DIR,RUN,MISC_WRITE,0xef
  4134. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4135. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4136. CLK_IND, RUN, FREQ_2, 0x39
  4137. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4138. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4139. CRT,RUN,LATCH_DATA, 0x00
  4140.  
  4141.  
  4142. [640,480,24,37,72]
  4143. # Unlock CRTC
  4144. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4145. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4146. CRT,RUN,REG_LOCK_1,0x48,0xa0
  4147. # Dump CRT Controller Registers
  4148. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  4149. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4150. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4151. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4152. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4153. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4154. CRT,RUN,MODE_CONTROL,0x02
  4155. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4156. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4157. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4158. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4159. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4160. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4161. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4162. # Lock CRTC Reg 11 for compatibility
  4163. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4164. # Dump ENG Register
  4165. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4166. # Dump MISCOUT Register
  4167. DIR,RUN,MISC_WRITE,0xef
  4168. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4169. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4170. CLK_IND, RUN, FREQ_2, 0x3a
  4171. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4172. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4173. CRT,RUN,LATCH_DATA, 0x00
  4174.  
  4175. [640,480,24,31,60]
  4176. # Unlock CRTC
  4177. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4178. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4179. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4180. # Dump CRT Controller Registers
  4181. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  4182. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4183. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4184. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  4185. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4186. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  4187. CRT,RUN,MODE_CONTROL,0x02
  4188. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4189. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4190. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4191. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4192. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4193. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4194. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4195. # Lock CRTC Reg 11 for compatibility
  4196. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4197. # Dump ENG Register
  4198. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4199. # Dump MISCOUT Register
  4200. DIR,RUN,MISC_WRITE,0xef
  4201. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4202. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4203. CLK_IND, RUN, FREQ_2, 0x21
  4204. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4205. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4206. CRT,RUN,LATCH_DATA, 0x00
  4207.  
  4208. [640,480,16,64,120]
  4209. # Unlock CRTC
  4210. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4211. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4212. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4213. # Dump CRT Controller Registers
  4214. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4215. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4216. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4217. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4218. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4219. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4220. CRT,RUN,MODE_CONTROL,0x02
  4221. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4222. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4223. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4224. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4225. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4226. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4227. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4228. # Lock CRTC Reg 11 for compatibility
  4229. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4230. # Dump ENG Register
  4231. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4232. # Dump MISCOUT Register
  4233. DIR,RUN,MISC_WRITE,0xef
  4234. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4235. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4236. CLK_IND, RUN, FREQ_2, 0x67
  4237. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4238. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4239. CRT,RUN,LATCH_DATA, 0x00
  4240.  
  4241. [640,480,16,52,100]
  4242. # Unlock CRTC
  4243. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4244. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4245. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4246. # Dump CRT Controller Registers
  4247. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4248. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4249. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4250. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4251. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4252. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  4253. CRT,RUN,MODE_CONTROL,0x02
  4254. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4255. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4256. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4257. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4258. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4259. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4260. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4261. # Lock CRTC Reg 11 for compatibility
  4262. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4263. # Dump ENG Register
  4264. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4265. # Dump MISCOUT Register
  4266. DIR,RUN,MISC_WRITE,0xef
  4267. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4268. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4269. CLK_IND, RUN, FREQ_2, 0x50
  4270. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4271. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4272. CRT,RUN,LATCH_DATA, 0x00
  4273.  
  4274. [640,480,16,48,90]
  4275. # Unlock CRTC
  4276. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4277. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4278. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4279. # Dump CRT Controller Registers
  4280. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4281. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4282. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4283. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4284. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4285. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4286. CRT,RUN,MODE_CONTROL,0x02
  4287. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4288. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4289. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4290. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4291. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4292. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4293. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4294. # Lock CRTC Reg 11 for compatibility
  4295. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4296. # Dump ENG Register
  4297. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4298. # Dump MISCOUT Register
  4299. DIR,RUN,MISC_WRITE,0xef
  4300. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4301. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4302. CLK_IND, RUN, FREQ_2, 0x4d
  4303. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4304. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4305. CRT,RUN,LATCH_DATA, 0x00
  4306.  
  4307. [640,480,16,37,75]
  4308. # Unlock CRTC
  4309. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4310. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4311. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4312. # Dump CRT Controller Registers
  4313. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4314. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4315. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4316. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4317. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4318. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4319. CRT,RUN,MODE_CONTROL,0x02
  4320. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4321. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4322. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4323. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4324. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4325. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4326. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4327. # Lock CRTC Reg 11 for compatibility
  4328. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4329. # Dump ENG Register
  4330. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4331. # Dump MISCOUT Register
  4332. DIR,RUN,MISC_WRITE,0xef
  4333. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4334. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4335. CLK_IND, RUN, FREQ_2, 0x3a
  4336. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4337. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4338. CRT,RUN,LATCH_DATA, 0x00
  4339.  
  4340. [640,480,16,37,72]
  4341. # Unlock CRTC
  4342. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4343. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4344. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4345. # Dump CRT Controller Registers
  4346. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4347. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4348. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4349. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4350. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4351. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4352. CRT,RUN,MODE_CONTROL,0x02
  4353. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4354. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4355. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4356. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4357. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4358. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4359. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4360. # Lock CRTC Reg 11 for compatibility
  4361. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4362. # Dump ENG Register
  4363. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4364. # Dump MISCOUT Register
  4365. DIR,RUN,MISC_WRITE,0xef
  4366. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4367. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4368. CLK_IND, RUN, FREQ_2, 0x3a
  4369. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4370. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4371. CRT,RUN,LATCH_DATA, 0x00
  4372.  
  4373. [640,480,16,31,60]
  4374. # Unlock CRTC
  4375. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4376. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4377. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4378. # Dump CRT Controller Registers
  4379. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4380. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4381. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4382. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4383. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4384. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4385. CRT,RUN,MODE_CONTROL,0x02
  4386. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4387. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4388. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4389. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4390. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4391. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4392. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4393. # Lock CRTC Reg 11 for compatibility
  4394. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4395. # Dump ENG Register
  4396. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4397. # Dump MISCOUT Register
  4398. DIR,RUN,MISC_WRITE,0xef
  4399. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4400. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4401. CLK_IND, RUN, FREQ_2, 0x21
  4402. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4403. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4404. CRT,RUN,LATCH_DATA, 0x00
  4405.  
  4406. [640,480,8,64,120]
  4407. # Unlock CRTC
  4408. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4409. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4410. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4411. # Dump CRT Controller Registers
  4412. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4413. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4414. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4415. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4416. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4417. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4418. CRT,RUN,MODE_CONTROL,0x02
  4419. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4420. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4421. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4422. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4423. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4424. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4425. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4426. # Lock CRTC Reg 11 for compatibility
  4427. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4428. # Dump ENG Register
  4429. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4430. # Dump MISCOUT Register
  4431. DIR,RUN,MISC_WRITE,0xef
  4432. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4433. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4434. CLK_IND, RUN, FREQ_2, 0x67
  4435. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4436. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4437. CRT,RUN,LATCH_DATA, 0x08
  4438.  
  4439. [640,480,8,52,100]
  4440. # Unlock CRTC
  4441. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4442. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4443. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4444. # Dump CRT Controller Registers
  4445. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4446. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4447. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4448. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4449. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4450. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4451. CRT,RUN,MODE_CONTROL,0x02
  4452. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4453. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4454. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4455. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4456. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4457. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4458. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4459. # Lock CRTC Reg 11 for compatibility
  4460. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4461. # Dump ENG Register
  4462. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4463. # Dump MISCOUT Register
  4464. DIR,RUN,MISC_WRITE,0xef
  4465. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4466. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4467. CLK_IND, RUN, FREQ_2, 0x50
  4468. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4469. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4470. CRT,RUN,LATCH_DATA, 0x08
  4471.  
  4472. [640,480,8,48,90]
  4473. # Unlock CRTC
  4474. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4475. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4476. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4477. # Dump CRT Controller Registers
  4478. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4479. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4480. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4481. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4482. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4483. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4484. CRT,RUN,MODE_CONTROL,0x02
  4485. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4486. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4487. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4488. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4489. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4490. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4491. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4492. # Lock CRTC Reg 11 for compatibility
  4493. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4494. # Dump ENG Register
  4495. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4496. # Dump MISCOUT Register
  4497. DIR,RUN,MISC_WRITE,0xef
  4498. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4499. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4500. CLK_IND, RUN, FREQ_2, 0x4d
  4501. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4502. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4503. CRT,RUN,LATCH_DATA, 0x08
  4504.  
  4505. [640,480,8,37,75]
  4506. # Unlock CRTC
  4507. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4508. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4509. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4510. # Dump CRT Controller Registers
  4511. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4512. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4513. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4514. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4515. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4516. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4517. CRT,RUN,MODE_CONTROL,0x02
  4518. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4519. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4520. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4521. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4522. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4523. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4524. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4525. # Lock CRTC Reg 11 for compatibility
  4526. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4527. # Dump ENG Register
  4528. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4529. # Dump MISCOUT Register
  4530. DIR,RUN,MISC_WRITE,0xef
  4531. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4532. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4533. CLK_IND, RUN, FREQ_2, 0x3a
  4534. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4535. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4536. CRT,RUN,LATCH_DATA, 0x08
  4537.  
  4538. [640,480,8,37,72]
  4539. # Unlock CRTC
  4540. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4541. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4542. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4543. # Dump CRT Controller Registers
  4544. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4545. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4546. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4547. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4548. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4549. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4550. CRT,RUN,MODE_CONTROL,0x02
  4551. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4552. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4553. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4554. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4555. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4556. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4557. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4558. # Lock CRTC Reg 11 for compatibility
  4559. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4560. # Dump ENG Register
  4561. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4562. # Dump MISCOUT Register
  4563. DIR,RUN,MISC_WRITE,0xef
  4564. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4565. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4566. CLK_IND, RUN, FREQ_2, 0x3a
  4567. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4568. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4569. CRT,RUN,LATCH_DATA, 0x08
  4570.  
  4571. [640,480,8,31,60]
  4572. # Unlock CRTC
  4573. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4574. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4575. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4576. # Dump CRT Controller Registers
  4577. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4578. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4579. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4580. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4581. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4582. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4583. CRT,RUN,MODE_CONTROL,0x02
  4584. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4585. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4586. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4587. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4588. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4589. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4590. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4591. # Lock CRTC Reg 11 for compatibility
  4592. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4593. # Dump ENG Register
  4594. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4595. # Dump MISCOUT Register
  4596. DIR,RUN,MISC_WRITE,0xef
  4597. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4598. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4599. CLK_IND, RUN, FREQ_2, 0x21
  4600. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4601. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4602. CRT,RUN,LATCH_DATA, 0x08
  4603.