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486-50.TXT
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1993-07-21
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45 lines
486-50 SPECS
MODEL NUMBER: MD4-5061
DESCRIPTION: 486DX-50 main board
IDENTIFICATION: "30-000232-01" or "486IB-B-5-0"
SIZE: Baby AT (8.6 x 13 in.)
CHIPSET: SIS
BIOS: AMI
MEMORY: 1/2/4/8/16/32MB SIMM RAM (70ns) (no size mixing)
CACHE: 64KB = eight 8Kx8 SRAMs (25ns)
128KB = four 32Kx8
256KB = eight 32Kx8*
CACHE ALGORITHM: Write-back or write-through direct-mapped
SLOTS: Eight 16-bit
PERFORMANCE: Landmark V1.14 = 227.7, Power Meter V1.7 = 22.3
COMPATIBILITY: IBM PC/AT
BATTERY: Discrete
SUPPORTED PROCESSORS: 486DX-33/50 (33,50MHz osc), 486SX-20/25
SOCKETS: Weitek 4167 math coprocessor
RAM BANK 0 LOCATION: Innermost 4 sockets
MADE IN: Taiwan
J1: External battery connector
JP2: 1-2 = 8042 clock selectable by BIOS; 2-3 = 7.159MHz 8042 clock
JP3: 1-2 = normal; 2-3 (temporary) = CMOS clear
CPU type-----JP5----JP6----JP7
486DX 1-2 1-2 short
486SX 2-3 2-3 open
487SX 1-2 2-3 short
JP8: 1-2 = internal power good signal*; 2-3 = external (from power supply)
Cache size-----JP9----JP10---JP11---JP12---JP13---JP14---JP15
64KB 1-2 2-3 1-2 1-2 1-2 1-2 1-2
128KB 2-3 1-2 1-2 2-3 1-2 2-3 1-2
256KB 2-3 2-3 2-3 2-3 2-3 2-3 2-3
JP16: 1-2 = 486DX-33/50 or 486SX-25; 2-3 = 486SX-20
Color/mono: Short = CGA; open = mono (EGA/VGA: doesn't matter)
Turbo switch: Short = high speed or keyboard control; open = low speed
NOTES:
1) For 50MHz, set advanced chipset setup as follows (pp 3-14 & 3-15):
DRAM speed option = slowest
Cache write cycle option = 3T
Cache read cycle option = 2T
Bus clock frequency select = 1/6 ACLK