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OS/2 Shareware BBS: 8 Other
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OS/2 Help File
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1998-05-27
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7KB
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187 lines
ΓòÉΓòÉΓòÉ 1. ECC Memory Setup ΓòÉΓòÉΓòÉ
The ECC Memory Setup service allows you to modify settings in the ECC
configuration of supported memory subsystems. The particular options that are
available will vary according to the controller on a given system. Some of the
options that might be available are as follows:
o Single Bit Error Scrubbing
o Single Bit Error Counting
o Single Bit Error Count
o Single Bit Error Thresholding
o Single Bit Error Threshold
o Last Single Bit Error Address
o Single Bit Error Reporting
o Single Bit Error Correcting
o Multiple Bit Error Reporting
o Last Correctable Error Address
o Last Uncorrectable Error Address
o Last logged single bit ECC error
o Last logged multiple bit ECC error
o Last logged parity error
ΓòÉΓòÉΓòÉ 2. Memory Properties ΓòÉΓòÉΓòÉ
The memory properties that can be edited by the ECC Memory Setup service are
system specific. The choices that are valid for the system being accessed
appear in the Memory Properties list box. Selecting the property to view or
edit will bring up additional information on the right half of the dialog box.
ΓòÉΓòÉΓòÉ 3. Memory Property Checkbox ΓòÉΓòÉΓòÉ
This checkbox allows a "toggle" type property to be enabled or disabled.
ΓòÉΓòÉΓòÉ 4. Memory Property Entry Field ΓòÉΓòÉΓòÉ
This entry field allows you to enter a number for a numeric property.
ΓòÉΓòÉΓòÉ 5. Memory Property Spin Button ΓòÉΓòÉΓòÉ
This spin button allows you to select a state from a list of choices.
ΓòÉΓòÉΓòÉ 6. Alert Notify Checkbox ΓòÉΓòÉΓòÉ
If this checkbox is checked, any change in the state of this property that was
not initiated by a user will send an alert to this machine. For example, a
user changing the Single Bit Error Count will not trigger this alert, but a
change in the error count stored in the hardware will trigger it.
ΓòÉΓòÉΓòÉ 7. Alert Local Notify Checkbox ΓòÉΓòÉΓòÉ
If this checkbox is checked, any change in the state of this property that was
not initiated by a user will send an alert to the remote machine. For example,
a user changing the Single Bit Error Count will not trigger this alert, but a
change in the error count stored in the hardware will trigger it. This
checkbox will only be visible on a manager machine accessing a remote client.
ΓòÉΓòÉΓòÉ 8. Save ΓòÉΓòÉΓòÉ
This button will save any changes you have made to the system you are accessing
and apply the changes to the memory controller of that system.
ΓòÉΓòÉΓòÉ 9. Reset ΓòÉΓòÉΓòÉ
This button will clear all changes made to the ECC memory properties since the
last save.
ΓòÉΓòÉΓòÉ 10. Exit ΓòÉΓòÉΓòÉ
This button exits the ECC Memory Setup service. If changes have been made and
not saved, a prompt will pop up verifying that the changes should be discarded.
ΓòÉΓòÉΓòÉ 11. Single Bit Error Scrubbing ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable error scrubbing. If it is
enabled, erroneous bits will be corrected in the memory as the errors occur.
This may cause a slight performance penalty on some systems.
ΓòÉΓòÉΓòÉ 12. Single Bit Error Counting ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable error counting. If it is
enabled, the memory controller will keep track of the number of single bit
errors received.
ΓòÉΓòÉΓòÉ 13. Single Bit Error Count ΓòÉΓòÉΓòÉ
If Single Bit Error Counting is enabled, this field will be the current number
of single bit errors received. This field may or may not be editable,
depending on the system.
ΓòÉΓòÉΓòÉ 14. Single Bit Error Thresholding ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable error thresholding. It
requires counting to be enabled. If thresholding is enabled, when the error
count reaches a given threshold, the memory controller will generate an NMI.
ΓòÉΓòÉΓòÉ 15. Single Bit Error Threshold ΓòÉΓòÉΓòÉ
If thresholding is enabled, when the error count reaches this threshold, the
memory controller will generate an NMI.
ΓòÉΓòÉΓòÉ 16. Last Single Bit Error Address ΓòÉΓòÉΓòÉ
This is the address in physical memory of the last detected single bit error.
ΓòÉΓòÉΓòÉ 17. Single Bit Error Reporting ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable single bit error reporting.
If it is enabled, the address of the last single bit error should be viewable
in the Last Correctable Error property.
ΓòÉΓòÉΓòÉ 18. Single Bit Error Correcting ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable single bit error correcting.
If it is enabled, erroneous bits when data is read from a bad area in memory.
ΓòÉΓòÉΓòÉ 19. Multiple Bit Error Reporting ΓòÉΓòÉΓòÉ
This property is a "toggle" to enable or disable multiple bit error reporting.
If it is enabled, the address of the last multiple bit error should be viewable
in the Last Uncorrectable Error property.
ΓòÉΓòÉΓòÉ 20. Last Correctable Error Address ΓòÉΓòÉΓòÉ
This is the address in physical memory of the last detected correctable error.
ΓòÉΓòÉΓòÉ 21. Last Uncorrectable Error Address ΓòÉΓòÉΓòÉ
This is the address in physical memory of the last detected uncorrectable
error.
ΓòÉΓòÉΓòÉ 22. Last logged single bit ECC error ΓòÉΓòÉΓòÉ
If there are any single bit ECC memory errors in the SMM log, the latest one
will be shown. The format is 00xxyyzz, where xx is the bank the error occurred
in, yy is the interleave pair, and zz is the simm number within that pair. SMM
error logging must be enabled in the BIOS for this feature to work.
ΓòÉΓòÉΓòÉ 23. Last logged multiple bit ECC error ΓòÉΓòÉΓòÉ
If there are any multiple bit ECC memory errors in the SMM log, the latest one
will be shown. The format is 00xxyy00, where xx is the bank the error occurred
in and yy is the interleave pair. SMM error logging must be enabled in the
BIOS for this feature to work.
ΓòÉΓòÉΓòÉ 24. Last logged parity error ΓòÉΓòÉΓòÉ
If there are any parity memory errors in the SMM log, the latest one will be
shown. The format is 00xxyy00, where xx is the bank the error occurred in and
yy is the interleave pair. SMM error logging must be enabled in the BIOS for
this feature to work.