Antennas/Antennas_CD-ROM_Walnut_Creek_September_1996.iso/net94/docs/net.asc

Text File | 1996-06-30 | 28KB | 580 lines

CADA
COMPUTER AIDED DESIGN FOR AMATEURS

R. P. HAVILAND, W4MB


    MININEC has been showing many amateurs the value of computer
analysis for determining the worth of an antenna design before it
is turned into hardware. This article is devoted to another
aspect of computer analysis- that of determining the worth of a
circuit before it is even built up as a breadboard.

    Of course, there have been computer programs to help in
design available for a long time. Collections of public domain
programs are available for almost any computer, and include much
helpful material. In the Amateur field, beyond programs for Morse
code generation, logging, and even station operation, there are
programs for Ohms law, design of attenuators, inductances,
filters, timers and so on. Most of these are in the nature of
aids: they help in design, but they don't tell if the overall
design will work, or if it can be improved.

    Here we have a situation with a parallel to that of antenna
analysis. There is an available program specifically designed to
analyze large complex circuits. It is called SPICE, which is an
acronym for Simulation Program with Integrated Circuit Emphasis.
It is especially intended for solid-state circuits, and takes
their strengths and weaknesses into account. Non-linearities,
temperature effects, junction capacitance, leakage  and flicker
noise are some of the items modelled. For example, a complete
MOSFET description may include some 48 parameters, although
perhaps 30 may be neglected for most work.

    SPICE is a two stage model. It first solves for the DC
no-signal condition, to determining the quiescent operating
point. It then solves for the effect of a small AC signal,
varying about the DC point. Small signal distortions can be
calculated, as can the noise present. A separate calculation
shows the large signal distortion, in terms of the additional
frequency components introduced by overload. Some common
circuits, such as modulators, require "tricks" with modeled
components. Others require saving data, then studying it with a
post-processor.

    The point of this discussion is that SPICE is a BIG program,
of great capability. Learning some of the elements of its use is
not difficult, but there are many features. There is even a free
version of a commercial SPICE program just for this. But this
will not handle many problems, so the full version is needed. It
seems that a better starting point would be an easier-to-use
program, one that uses some of the large program techniques,
gives useful answers, and also serves as "spring training". Such
a program is available, and is the subject of the rest of this
article.

ELEMENTS OF NODAL ANALYSIS

    A circuit can be regarded as a collection of points,
connected together by components. Each point is usually called a
node, so the analysis can be called nodal analysis. The entire
assembly of components can also be called a network, so an
alternative name is network analysis. The originator of the
program  described (1) here called it NET80. This was based on an
earlier program (2), and has been modified by others, for example
as NET85 (3). The version here, NET94, includes still further
additions.

    In the circuit or collection of nodes, there is normally one
node pair which is used for signal input, and another pair for
signal output. There should be a node common to many components,
and to one of the input and one of the output nodes. The usual
term for this common node is ground, or occasionally, signal
ground.

    Analysis consists of calculating the voltage at the output,
for a given value of input. One of the limits of this particular
analysis is that it neglects non-linearities, so the exact input
is not important. For convenience, the input is set to 1.0 volt.

    Another limit of this particular analysis is that it is for
AC signals only (see below for a method of DC analysis). For AC,
the important quantities are the magnitude of the output voltage,
and the phase shift. These are referred to the input, the 1.0
volt input being assumed to be at an angle of zero degrees. The
most common problems relate to the way the output varies with
frequency, so the program calculates the output over a range of
frequencies, as specified. Several output data forms are
provided.

DESCRIBING A CIRCUIT BY NODES

    In analysis, each junction of two components is a node, but
in practice at least one or a number of components may be
connected to a node. Each  component is entered into the program
separately. Three types of input data must be specified. One is
the type of component, and the second is its node connections.
The third is one or more quantities as needed to describe the
magnitude of the component size.

    The components which can be used in the current program are
limited to the following, which also shows the number of
component connection nodes involved, and the number of quantities
needed to describe component magnitude.

    COMPONENT            # NODES        # VARIABLES

    Resistor            2            1
    Inductor            2            1
    Capacitor            2            1
    Transistor        3            2
    FET                3            1
    Op-Amp            4            2
    G-G Triode        3            2
    Pentode            3            2
    Transmission line   4            2
    Shorted Stub        2            2
    Open stub         2            2

There are thus three types of elements: first are the simple
ones, R,C,and L. Then there are the active elements, either solid
state or vacuum tube. The last three are really passive elements,
but the presence of resonance means that they must be calculated
as if there were one or more active elements present.

    Note that there are no non-linear elements in the list. This
restriction also means that some component connections cannot be
analyzed. An example is a transistor with both base and collector
connected to a single node, to form a diode.

    It is possible to add routines to the program to extend this
list. See the references for examples showing how this is done.

    Over much of the frequency range, the simple elements can
usually be regarded as pure: that is, a resistor is only a
resistor, and so on. However, circuit specification will
sometimes require emulating a component by two or more of these
basic components. For example, a pair of coupled coils are
replaced by their 3-inductor T-net equivalent, of values L1-M, M,
L2-M. See Fig. 1 for several simple example nets for practice.

    Accurate calculation of the high frequency response will
require addition of more "pure" elements to represent the strays
which can be neglect or low and mid frequencies. Lead inductances
of resistors and capacitors, and resistances representing
inductor loss are examples. Such additions are occasionally
needed even at low frequencies, as for the loss and leakage of an
electrolytic capacitor.

    The active elements also have strays, which must often be
modeled. Examples are the capacitors representing the junction
capacity of transistors, or the inter-electrode capacity of
tubes.  Critical circuits may require modelling of such factors
as transistor leakage currents. In general, modelling of the
active elements requires more care than do the passive ones.

    Note that only one type of transistor is shown, the NPN.
Some circuits use PNP types. If all are this type, just ignore
the difference. If both types are present, it may be possible to
account for the difference by entering BETA as a positive value
for NPN units and as a negative one for PNP ones. This will not
work when there is a common connection for two different type
transistors, as in the complementary-symmetry single-ended
amplifier. While the program is powerful, it will not model all
possible circuits.

    Note also that some component parameters are variables.
Solid state devices are typical, for example, transistor BETA
being a function of frequency. The value entered into the program
must be valid for the frequency specified. In many cases, this
can be done entering an appropriate equivalent circuit, but it is
often easier to set up a model with one component value,
determine output over a small frequency range, then repeat with a
new parameter value and frequency range. (See later for changes
to components).

    The main menu of the program is in two parts. One is for
component selection, just discussed. The second is for actions to
be taken. This includes starting the actual analysis, controlling
output to the printer or to save-files, and re-running the
program. Most errors in input will give a message, then return to
the main menu, but there are errors which stop the program
completely. It is a good idea to save problem data to file before
starting analysis or modification. The current list of actions
is:
    STOP PROGRAM
    ANALYZE NETWORK
    SET PRINTER MODE
    LOAD NETWORK FROM DISK
    SAVE NETWORK TO DISK
    RERUN PROGRAM
    REPEAT CALCULATION
It is not difficult to add routines, since the source code is in
BASIC.


HOW THE PROGRAM SOLVES NETWORKS

    When the program starts, it asks for the number of nodes in
the circuit to be analyzed. (IMPORTANT- there must be a
connection to each node. This may be a dummy connection, such as
a 1 Megohm resistor to ground.) The program then sets up 4 square
arrays designated as P,Q,R and S. Array P stores data for
resistances and some other real quantities, Q is for
capacitances, R for inductances and T for transmission lines.
Entry is by array row and column corresponding to node
connections. Values are entered as quasi-admittances. For
resistance and inductance this is 1/input-value, and for
capacitance, it is the input value. Passive quantities are
entered into the appropriate array 4 times. For example, for a
resistance of 10 ohms connecting nodes 3 and 5, the value 0.1 is
entered into resistance array elements P33 and P55, and the value
-0.1 into the elements P35 and P53. Entries for three and four
terminal elements may produce up to 8 entries: since these
involve transconductances, the entries may not be symmetrical
(P51 is not equal to P15). See the references for details.

    When these arrays are completed, the input and output nodes
are specified, and then the frequency range and step values. Two
new arrays A and B are then created, one for real and the second
for imaginary quantities. These are used twice.  First, a
numerator quantity is defined by masking the common node row and
column and the input row and output column. The remaining
elements of the 4 arrays are multiplied as a scalar by 1 for
resistances, (j* omega) for capacitances, 1/(j*omega) for
inductances or j times a trig function for transmission lines,
and the results separated as real and imaginary parts in the A
and B arrays. The complex determinant of these is saved. A
denominator is then calculated by the same process, except that
the masking is for common row and column and for input row and
column. Complex division of the two determinants then gives the
output/input ratio. Since the input is unity at an angle of zero,
the division gives the output magnitude and phase shift.

    This process is faster than the more common one of setting
up the full Z impedance array and calculating its Y admittance
array reciprocal. Only two determinants are calculated, each for
a smaller array, instead of the inverse values of each element of
the original array. With a fast computer and typical problems,
output speed is limited by printing speed.

    Actually, there is no need to be concerned with the process
details- they are automatically handled when the component or
program action desired is selected, from the lists above, the two
parts of the main menu of the program.

THE PROCESS OF ANALYSIS

    The best place to start analysis is with a simplified
version of the circuit diagram. Leave out non-essentials, such as
switching, metering, power supplies, cooling fans, power supply
supplies and so on. Remember to connect all power supply leads to
the common ground.

    It is necessary either to omit components or processes which
depend on non-linearities, or to replace these with a linear
approximation. Omissions includes oscillators, modulators,
limiters and such. Modelling for systems with these present is
done by analyzing performance up to the non-linear element, then
separately modelling the circuit after the element, up to the
next non-linearity, or to the final output. For example, a
receiver can be analyzed as an RF section, an IF section and an
audio section. In this example, mixer and detector loss are
calculated manually, as is the overall gain. An oscillator is
analyzed by opening its feedback loop and calculating the gain
between the two nodes. If it is less than unity at 180 degrees,
the circuit will not oscillate, and if it is much greater, there
may be instability. The frequency will be the frequency of
maximum gain, but it is necessary to consider such items as
change in transistor capacitance with signal level.

    The next preparation step is to number the nodes. Customary
practice is to start at the input and move towards the output. A
requirement of  this program is that the common node must have
the highest number, but there is no other numbering limitation.
When this numbering is complete, move to the analysis program
itself.

    The program starts by showing the approximate number of
nodes possible with available memory. This amount depends on the
computer, and whether the BASIC or compiled form of the program
is used. With several Mbytes of memory, several hundred nodes are
allowed. Note, however, that the program speed will decrease as
about the square of the number of nodes, so it may be better to
divide the schematic into sections for separate and faster
analysis. Some operating systems allow setting the amount of
memory made available to the program.

    Before starting component description input to the program,
it is well to use the menu "Action to Take" item, "Set Printer
Mode", then the sub item, "Component List ON". As each component
is entered, its serial number, type, node connection and value
are sent to the printer, as well as being entered into the
appropriate elements of the 4 arrays. This provides a permanent
log of the schematic, and is especially useful in checking for
input errors.

    It is a good idea to run a trial analysis with a small
number of frequencies, say 10 covering the range of interest.
This will show if there are serious entry errors. If there are no
problems, set up the desired printer and disk output, and proceed
with the full analysis. Good practice is to print the numerical
values first, then call for a printer graph.

    In evaluating the results at this stage, the first four
columns of numerical output are the important ones. The ones
marked REAL and IMAG are sometimes useful, but are really for a
later procedure. First look at the results with a view of
confirming or denying the expected performance. An amplifier
should show gain, a tuned circuit resonance, and so on. If
results are markedly different from design expectations, look for
the reason. It may be an entry error, such as a skipped digit or
a wrong node. It may be misreading of a component value, or of
component performance data. Or it may be that the circuit cannot
perform as expected. Thought is required when program results and
general expectations don't agree.

    When they do, look at the detail results. Look for stray
frequency responses, which may show as amplitude change, or as a
magnitude or sign change in the phase column. These are a sign of
stray resonances. Look for extremely high gains, a sign of
potential instability. And watch for rising response at harmonic
frequencies. The model does not give information about harmonic
or other non-linear distortion, but high response at an overtone
frequency is a signal that trouble may exist if the circuit
voltages or currents go into a non-linear regime.

    If critical, power supply regulators and filtering can also
be modelled. Supply impedance can be modelled by introducing a
bus node. This is good practice if there is any reason to suspect
that coupling of circuits through the power supply common mode
impedance may exist. An appreciable amount of signal voltage at
the power supply bus node is a warning of potential instability
due to common mode coupling through the power supply impedance.

    The major point of this discussion is that art enters into
this type of analysis. It consist of having the experience to
know when a factor can be neglected, plus the curiosity to ask
about possible changes when there is some anomaly in the analysis
results. It is a good idea to practice with designs of known
performance.

CIRCUIT IMPEDANCE CALCULATION

    Because of the calculation technique used, node impedance
data is not directly available. With this program, a separate
calculation is required.

    The easy way to set this up is to introduce another node,
connected to the gate of a FET. The source is connected to common
ground, and the drain to the desired node. The FET
transconductance is set to -1 mho, which gives a drain node
current of one ampere when the gate is used as the 1 volt input
node. The output node voltage is thus read directly as the node
impedance, Z11 when the first node is being checked. The last two
columns of the screen data table give the real and imaginary
components of this impedance. The impedance table can also be
printed out.

    The suggested technique is to always include an additional
node in circuits, labeling this as Node 1. It should be connected
to common ground by a convenient resistance, say 1000 ohms. The
regular input then becomes Node 2. After regular analysis is
completed ignoring this node, add the FET and connect the drain
to input node 2. Rerun of the analysis with node 1 as input and
node 2 as output now gives the input impedance at node 2.

    Other nodes can be used as output, to calculate the mutual
impedance from the drain-connected node. For example, with the
drain connected to node 3, with node 1 as input and node 5 as
output, the calculation gives the mutual impedance Z35. Z53 is
identical, since analysis is limited to linear circuits.
Similarly, other nodes than 2 can be used as the FET connection,
to get the impedance at that node.

    It should be noted that this method of calculation of
impedance really involves creating a constant current generator.
Occasionally this is a useful component in an analysis. The
magnitude of the constant current is set by the transconductance
entered for the FET. The magnitude of the current in amperes is
equal to the magnitude of the FET transconductance in mhos.

CORRECTING ERRORS - INTRODUCING CHANGES

    Since all analysis is linear, any component can be "removed"
from the circuit by entering its negative. For example, if a 560
ohm resistor connects nodes 3 and 6, it can be removed by
entering a -560 ohm resistor for the same nodes. Another positive
value can now be entered. ( A transistor requires negative BETA
and negative current). This makes input error correction
possible. It is much less time consuming than complete reentry of
a circuit with one value changed.

    The same steps allow study of the effect of changes of a
component value. This is important in "optimizing" a circuit.

    The same process is useful in complete node impedance
analysis. The input node is first checked, then the FET
connection is removed. Connection can now be made to another node
to determine its impedance, and continued until all nodes have
been checked.

DC CONDITIONS

    It will be remembered that, ideally, all inductors are short
circuits at DC, and all capacitors are infinite impedances.
Transmission lines are simple low resistance connections. These
facts allow preparation of another circuit diagram for DC
analysis. The ends of inductors and transmission lines become
common with another node. Capacitors are simply omitted, but
watch the requirement that there is at least one connection to
each node. In critical circuits, resistance of inductors and
capacitor leakage may replace the ideal component. Any convenient
frequency can be used, since there is no reactive component.

    Power supply points must be freed from the common node, so
they can be used for input. If only one point is used for power
input, the point may be left floating, since it is the only
input. If there are two or more power supplies, each unused one
should be grounded through a small resistance. This represents
the regulation of the power supply.

    The voltage at a node when using this technique is a per-
unit voltage, the node voltage for one volt of power supply
voltage. Multiply by the actual power supply voltage. If there is
more than one supply, the node voltage is the arithmetic sum of
the voltages calculated this way for the separate supply points.
Check the calculated no-signal operating point against component
curves and data to see if the input parameters agree with those
used in analysis.

    If transistors are present, it may be necessary to make
several tries to determine the DC bias point. This is due to the
program assumption that the base resistance is a function of the
base current, an input parameter. If bias conditions give a
different bias current, the assumed input value must be changed,
and the bias calculation repeated. Repeat until there is
negligible change in bias.

THE PROGRAMS ON THE DISK

    The disk with this program includes both source BASIC code
(ASCII format), and the same code in executable form. The source
code is for those who want to try their own extensions to the
program. In addition, the code is provided in IBM-PC and Amiga
format: despite its lesser popularity, the author considers the
Amiga to be the best as a low-cost personal workstation.

    Also included are several sample nets, callable from the
program by entering a zero at the request for number of nodes.
Fig.2 shows the node connections of the first set, the simple
problems. As always, the spelling of the program name and the
path to the file must be correct, or an error results. A second
attempt can be made if an input error occurs.

    Fig. 3 shows the Component Connection file made when
entering the circuit of Fig. 2b for analysis. These files become
more complex when active elements are entered, to record the
component parameters. This file is important, since it is very
difficult to determine the component connections and parameters
from the array files. This is evident in Fig. 4, which is a
printout of the file which describes the circuit of Fig. 2b. See
the NET94 program for file structure information.

    Figs. 5, 6 and 7 show the I/O table, the I/O graph and the
impedance table for the circuit of Fig. 2b. These show the
information provided by this program. The files shown in this
figure can be used with many word-processor and spread-sheet
programs, or they may be printed directly, as by the TYPE
command.

    As a final example for study, a 1000 watt linear amplifier
designed and constructed by the author is used. It uses 3 type
813 tubes in grounded grid, and was described fully in reference
(4). The hand-drawn simplified circuit for analysis is shown in
Fig. 8. Here switched or variable elements have been replaced by
a fixed component, values for the 15 meter band being used. The
input node is #1, the output #5  and the common node is #6. The
plate-cathode capacity appears between nodes 3 and 4. The input
capacity is absorbed in the capacitor between nodes 3 and common,
and output capacity is between node 4 and common. The small
inductance between nodes 4 and 5 represents the plate lead
inductance, important at 30 MHz.

    Note that this amplifier uses a fixed step-up low-pass
filter at the input, instead of the more common switched low-Q
tuned circuit. A few components of the original are not modelled,
such as the inductance of the filament choke, the plate feed
choke, or the safety choke shunting the output capacitor. If
conditions for another band are analyzed, the components 4-5, 4-6
and 5-6 would change. Note also that the omitted components may
be important, as inducers of parasitic oscillations.

    The linear should show gain at the design frequency of 21
MHz, and should drop off on either side as frequency is changed.
The curve should be close to the textbook resonance curves for a
circuit Q of 12.

    This circuit shows some of the practical analysis problems
which may be encountered. None of the available specifications
give grounded-grid operating conditions for the tube type used.
For this analysis, the screen mu-factor is used as the G-G gain.
The plate resistance is assumed to be one-tenth of the pentode
resistance, with three tubes in parallel. The plate to cathode
and output capacity are shown in node diagram.

    The circuit also illustrates another matter, that of input
accuracy. In the tuned circuit, only 2 significant figures were
used in input. This limits output accuracy. The point of
resonance is not exactly as designed. Also, the load presented to
the tube is lower than needed for proper performance. The
measured power gain of the amplifier is just over 10 DB, so the
calculated gain should be slightly higher, since inductor loss is
neglected. Varying component values to get the best operating
point is a good practice exercise. Another practice item is to
calculate the input and output impedances, as well as that
presented as load to the tubes.

THE JOIN PROGRAM

    It is convenient to be able to treat small networks as
components, joining them together to form a larger network.
Examples of the small networks would be a lo-pass TVI filter, an
IF amplifier, an audio stage, and so on.

    The structure of the NET program is not fully suited to
this, because of the array structure and the requirement that the
highest numbered node be the signal ground. However, with a few
work-arounds, two networks can be combined. This is the purpose
of the JOINNET program.

     Fig. 9 shows a very simple junction problem, the cascading
of two voltage dividers. The first half, nodes 1-3 are in the
disk file DIV.NET. The second half, nodes 4-6 is not provided:
instead, DIV is called again, the intention being to change the 2
ohm resistor 5-6 by paralleling another 2 ohms across the same
nodes. The other operation needed is to join the two halves. As
shown, this can be by a very small resistance, to simulate a wire
connection. Alternately, additional components can be introduced.
However, to get proper input conditions, the common nodes of the
first and second halves must always have a very low impedance
between them, a small resistor or inductor or a large capacitor.

    The joining procedure is not difficult. JOINNET is started,
and the name and path of the two source nets entered. The name
and path of the joined net is then entered. The program reads the
number of nodes of the source nets, warning if there are un-
connected nodes which will require later connection. The program
then reads lines from the first source net, padding these with
null components as required by the size of the second net, and
entering the result to the new net. The second source net is then
read, padded and saved. Finally, the name and reference date of
the new net is saved. The process can then be repeated using the
new net as one of the sources.

    When complete, the new net is entered into NET94. Jumpers or
new components can be entered, as required to complete the final
net schematic. Components can be removed and replaced, or shunt
components introduced to get desired values. Analysis can then
proceed.

    A weakness of this method is that an unnecessary node is
created at each joining. One result is that complex nets are
slower to execute than would occur if the net is created as a
unit. The size of the component representing jumpers must be
watched, since these can be feedback-producing mutual impedances.

FINAL COMMENTS

This program NET94 doesn't have the full power of SPICE analysis,
but it does a very good job of analysis in the linear range. It's
also very easy to use. Additionally, it is a very good tool for
understanding how circuits work, and especially, understanding
which are the critical components.

    The program won't design circuits for you. But it sure helps
perfect a design.