ftp.barnyard.co.uk/2015.02.ftp.barnyard.co.uk.tar/ftp.barnyard.co.uk/cpm/walnut-creek-CDROM/MBUG/MBUG085.ARC/MCT26-35

Text File | 1979-12-31 | 19KB | 428 lines

Lessonsáá  2╢á- 3╡

26«áá  Thσáinde°áregister≤               E°á- usσáoµáinde°áregister≤
27«áá  Thσáalternativσáse⌠áoµáregister≤  E°á- usinτ alternativσ se⌠
28«á   Input/Outpu⌠ instruction≤         E° - I/╧ instruction≤
29«á   Blocδ instruction≤ - introductioε
30«á   Blocδ tranfe≥ instruction≤        E° - blocδ transfe≥
31«á   Blocδ searcΦ instruction≤         E°á- blocδásearcΦ
32«á   Blocδ I/╧áinstruction≤
33«á   Processo≥ácontro∞ instruction≤á   E°á- contro∞áinstruction≤
34«á   Interrupt≤
35«    Finalσ


INTRODUCTIO╬

Thσá fina∞á se⌠á oµá lesson≤á introduce≤á morσá specialiseΣá register≤áá anΣ ì
instruction≤á anΣ look≤ a⌠ thσ wa∙ thσ Z8░ caε talδ witΦ thσ outsidσá world« ì
Thσá las⌠á lesson≤á dea∞ witΦ instruction≤ tha⌠ allo≈ thσ outsidσá worlΣá t∩ ì
interrup⌠ thσ processor.


INDEX REGISTERS

Wσ no≈ introducσ tw∩ ne≈ registers¼ thσ inde° register≤ I╪ anΣ IY« Thesσ tw∩ ì
register≤á arσ identica∞ iε ever∙ way«á Wha⌠ applie≤ t∩ onσ applie≤  t∩á thσ ì
other«á The∙ caε takσ thσ placσ oµ thσ H╠ registe≥ iε mos⌠ instructions«á I⌠ ì
i≤ simple≥ t∩ lis⌠ thσ instruction≤ tha⌠ caε bσ performeΣ b∙ thσ H╠ registe≥ ì
bu⌠ no⌠ inde° registers:-

                         AD├  HL,dΣ
                         SB├  HL,dΣ
                    anΣá E╪   DE,H╠

arσá thσ onl∙ exceptions«á The∙ canno⌠ bσ exchangeΣ fo≥ H╠ iµ tha⌠á registe≥ ì
pai≥ i≤ onl∙ implieΣ iε thσ instruction¼á i.e«á RRD«á Thσ grea⌠ advantagσ oµ ì
thσá inde° register≤ howeve≥ i≤ tha⌠ indirec⌠ addressinτ i≤ no⌠ simpl∙á (HL⌐ ì
bu⌠ (IX+d)«á Thσ indirec⌠   addres≤ i≤ calculateΣ a≤ thσ suφ oµ thσ content≤ ì
oµá thσ IX/I┘ registe≥ anΣ thσ offse⌠ Σ specifieΣ iε thσ instruction«á I⌠ i≤ ì
easie≥ t∩ usσ thσ inde° register≤ t∩ interrogatσ table≤ thaε usinτá HL«á Thσ ì
offse⌠á caεá definσ thσ columε iε thσ tablσ anΣ IX/I┘ registe≥ poin⌠ t∩á thσ ì
beginninτá  oµ thσ line«á ┴ subroutinσ coulΣ manipulatσ thσ datß withiεá thσ ì
line¼á usinτá ßá constan⌠á IX/I┘á pointer«á Subsequen⌠á line≤á caεá theεá bσ ì
manipulateΣá simpl∙á b∙á usinτ thσ samσá subroutinσá andchanginτá thσá IX/I┘ ì
registe≥ t∩ poin⌠ t∩ ß differen⌠ line«á Thσ onl∙ instructioε fo≥ whicΦ  (HL⌐ ì
canno⌠á bσ substituteΣ b∙ (IX+d⌐ o≥ (IY+d⌐ i≤ J╨ (HL)«á J╨ (IX⌐ anΣ J╨á (IY⌐ ì
arσá availablσ however«á Thσ summar∙ list≤ al∞ instruction≤ availablσá usinτ ì
thσ I╪ register« Thi≤ lis⌠ caε bσ repeateΣ fo≥ thσ I┘ register.

Summar∙ - inde° register≤
L─ r,(IX+d⌐                        XO╥ (IX+d⌐
L─ IX,nε                           SB├ A,(IX+d⌐
L─áSP,I╪                           C╨á (IX+d⌐
L─ (IX+d),≥                        AD─ IX,dΣ
L─ IX,(nn⌐                         IN├áI╪
L─ (IX+d),ε                        DE├ I╪
L─ (nn),I╪                         SL┴ (IX+d⌐
E╪ (SP),I╪                         SR┴ (IX+d⌐
AD─ A,(IX+d⌐                       SR╠á(IX+d⌐
IN├ (IX+d⌐                         RL├ (IX+d⌐
AN─ (IX+d⌐                         R╠  (IX+d⌐
AD├ A,(IX+d⌐                       RR├ (IX+d⌐
DE├ (IX+d⌐                         R╥  (IX+d⌐
O╥  (IX+d⌐                         SE╘ ╬,(IX+d⌐èSU┬á(IX+d⌐                         RE╙ N,(IX+d⌐
JP  (IX)                           BI╘ N,(IX+d⌐

WitΦ aε identica∞ se⌠ fo≥ IY


EXAMPL┼ O╞ US┼ O╞áINDE╪ REGISTE╥

Thσá examplσá use≤á thσá I╪ registe≥ a≤ ß pointe≥ t∩ ßá tablσá oµá tw∩á bytσ ì
numbers« EacΦ numbe≥ i≤ t∩ bσ divideΣ b∙ 2.

      L─ B,╢
      L─áIX,ITEM▒
LOO╨  SR╠ (IX+1⌐
      R╥ (IX+0⌐
      IN├ I╪
      IN├ I╪
      DJN┌
LOO╨  RE╘
ITEM▒ DEF╫ 56░
      DEF╫ 1╢
      DEF╫á963┤
      DEF╫ 18╖
      DEF╫ 88┤
      DEF╫ 593╖


TH┼ ALTERNATIV┼áSE╘áO╞ REGISTER╙

Thσá Z8░ ha≤ withiε thσ chi≡ aε alternativσ se⌠ oµ thσ primar∙ register≤ AF¼ ì
BC¼á D┼ anΣ HL«á Thesσ arσ normall∙ designateΣ a≤  AF'¼á  BC'¼á DEº anΣ HL'« ì
AlthougΦ n∩ operation≤ caε bσ performeΣ oε thesσ registers¼ the∙ caε bσ useΣ ì
a≤ ß fas⌠ methoΣ oµ storage« Therσ arσ onl∙   tw∩ instruction≤ involvinτ thσ ì
alternativσ registers.

          E╪ AF,AFº exchange≤ thσácontent≤áoµ A╞ anΣ AFº
          EX╪       exchange≤ BC, D┼áanΣáHL witΦ  BC'¼ DEº anΣ HLº resp.


EXAMPL┼ USIN╟ TH┼ ALTERNATIV┼ SE╘
ì
Thσáexamplσ load≤ al∞ registers¼áthen swop≤ theφ witΦ thσáalternativσì
set. HavinτáreloadeΣáthσáregister≤ ßáfurther swo≡áreturn≤áthσáorigina∞ ì
numbers.

      L─ A,3░
      L─ BC,102┤
      L─ DE,800░
      L─ HL,6400░
      EX╪
      E╪ AF,AFº
      L─ A,6░
      L─áBC,128░
      L─ DE,20░
      L─ HL,3210░
LOO╨  EX╪
      E╪ AF,AFº
      DJN┌
LOO╨  RE╘


INPU╘ AN─ OUTPU╘ INSTRUCTION╙

S∩á fa≥á wσ havσ manipulateΣ datß withiε thσ processo≥á anΣá it≤á associateΣ ìèmemory«á Iµá ß memor∙ locatioε i≤ useΣ  directl∙ b∙ ß externa∞á device¼á thσ ì
devicσ i≤ termeΣ memor∙ addres≤ mapped« Thσ Z8░ als∩ support≤ 25╢ outpu⌠ anΣ ì
25╢ inpu⌠ ports¼á o≥ ╕ bi⌠ informatioε sources¼á externa∞ t∩ memory«á Wσ caε ì
inpu⌠ datß directl∙ int∩ thσ accumulato≥ witΦ I╬ A,(n⌐ wherσ ε i≤ thσ numbe≥ ì
oµá thσ inpu⌠ por⌠ betweeε ░ anΣ 255«á Similarl∙ wσ caε outpu⌠ datß froφ thσ ì
Accumulato≥á t∩á  por⌠á ε usinτ thσ instructioεá OU╘á (n),A«á N∩á flag≤á arσ ì
affecteΣ b∙ thesσ instructions« Wσ caε als∩ inpu⌠ datß t∩ an∙ ╕ bi⌠ registe≥ ì
usinτá thσá ┬á anΣ ├ registers«á Thσ instructioεá I╬á r,(C)¼á transmit≤á thσ ì
content≤á oµá thσ ┬ registe≥ t∩ thσ por⌠ whosσ numbe≥ i≤ iε thσ ├á register« ì
Thσ por⌠ ma∙ o≥  ma∙ no⌠ ac⌠ upoε thi≤ information«á Thσ returneΣ datßá froφ ì
thσ por⌠ i≤ loadeΣ int∩ registe≥ r«á I╬ r¼á (C⌐ affec⌠ thσ Zero¼á Sign¼á anΣ ì
Parit∙ flags«á Thσ instructioε I╬ F¼á (C⌐ i≤ thσ onl∙ instructioε tha⌠ deal≤ ì
witΦá thσá Flaτá registe≥ separately«á Onl∙ thσ flag≤ arσ affecteΣá b∙á thi≤  ì
instructioε anΣ n∩ datß i≤ transferreΣ int∩ thσ processor«á OU╘ (C)¼á ≥ i≤ ß ì
simila≥á instructioεá t∩ I╬ r,(C)¼á bu⌠ thσ content≤ oµ thσá registe≥á ≥á i≤ ì
loadeΣ int∩ por⌠ (C).

Summar∙ - simplσ input/outpu⌠
I╬ A,(n⌐    wherσ ε i≤ thσánumbe≥áoµ thσáinpu⌠ por⌠ (0-255⌐
I╬ r,(C⌐
I╬ F,(n⌐
OU╘ (n),┴
OU╘ (C),r


EXAMPLE╙ O╞ INPUT/OUTPU╘ INSTRUCTION╙

Oεá thσá Microbeσá anΣ othe≥ Z8░ computers¼á al∞ usefu∞á I/╧á addresse≤á arσ ì
allocateΣá t∩á drivσá variou≤á periphera∞á devices¼á sucΦá a≤á thσá Paralle∞ ì
Input/Outpu⌠á chi≡ ¿ PI╧ ⌐ o≥ CR╘ Controlle≥ chi≡ etc«á Thσ drivinτ oµ thesσ ì
chip≤ i≤ outsidσ thσ scopσ oµ thi≤ TUTOR«


BLOC╦ INSTRUCTION╙

Therσ arσ fou≥ group≤ oµ fou≥ type≤ oµ instruction≤ tha⌠ perforφá operation≤ ì
oεá block≤ oµ memory«á Sincσ thesσ instruction≤ havσ similarities¼á the∙ arσ ì
introduceΣ together«á Al∞ blocδ instruction≤ usσ register(s⌐ a≤ ß pointer(s⌐ ì
t∩á scaεá thougΦá ßá blockoµ memor∙ anΣ anothe≥á a≤á ßá counter«á Al∞á blocδ ì
instruction≤á havσ simila≥ mnemonics«á ╔ indicate≤ tha⌠ thσá pointer(s⌐á arσ ì
Incremented¼á ─á tha⌠á thσá  pointer(s⌐á arσ Decremented¼á anΣá ╥á tha⌠á thσ ì
instructioε i≤ t∩ bσ repeateΣ unti∞ thσ counte≥ i≤ zero« Thσ tota∞ lis⌠ is:-

     Transfer≤á L─ .....LDI,LDIR,LDD,LDD╥
     Comparσá   C╨á.....CPI,CPIR,CPD,CPD╥
     Inpu⌠á     I╬ .....INI,INIR,IND,IND╥
     Outpu⌠     OUT/OT..OUTI,OTDR,OUTD,OTD╥

Thσ ╒ iε OU╘ i≤ádroppeΣát∩ kee≡ the mnemoniπ t∩ ß maximuφ oµá┤áletters.


BLOC╦ TRANSFE╥áINSTRUCTION╙

Blocδá transfe≥ instruction≤ transfe≥ thσ content≤ oµ aε areß oµá memor∙á t∩ ì
anothe≥á area«á Tw∩á pointer≤á arσ used«á Thσ H╠ registe≥ hold≤á thσá sourcσ ì
addres≤ anΣ thσ D┼ registe≥ thσ destinatioε address«á Thσ sizσ oµ thσá blocδ ì
t∩ bσ transferreΣ i≤ helΣ iε thσ B├ register.

LD╔ transfer≤ (HL⌐ t∩ (DE)¼á increment≤ botΦ pointer≤ anΣ decrement≤ BC«á Iµ ì
BC=░á thσ P/╓ flaτ i≤ ░ (i.e«á equivalen⌠ t∩ parit∙ beinτ odΣ )«á Iµ B├ doe≤ ì
no⌠ equa∞ ░ thσ P/╓ flaτ i≤ ▒ (parit∙ even)« LD╔ thereforσ perform≤ onl∙ onσ ì
ste≡á oµ thσ transfe≥ oµ thσ block¼á allowinτ intermediatσ operation≤ t∩á bσ ì
performeΣ beforσ thσ instructioε i≤ repeated.
èLDI╥ i≤ simila≥ t∩ LDI¼ transferrinτ datß froφ (HL⌐ t∩ (DE⌐ anΣ incrementinτ ì
thσ pointers¼ bu⌠ thi≤ instructioε automaticall∙ repeat≤ thσ operatioε unti∞ ì
BC=░ anΣ thσ  wholσ  blocδ  istransferred.

LD─ i≤ simila≥ t∩ LD╔ excep⌠ tha⌠ thσ pointer≤ arσ Decremented«á Thu≤ H╠ anΣ ì
D┼á star⌠ a⌠ thσ to≡ oµ thσ respectivσ block≤ oµ memory«á LDD╥á Repeat≤á LD─ ì
unti∞ BC=░ a≤ iε thσ LDI╥ instruction«á BotΦ pair≤ oµ instruction≤ (LDI╥ anΣ ì
LDDR⌐ arσ required.
ì
Takσá thσá examplσ oµ aε LDI╥ instructioε witΦ thσ register≤á initiall∙á se⌠ ì
to:-
ì
          H╠á╜ 100░    D┼ ╜ 150░   anΣ   B├ ╜ 1000«

Thσá instructioεá shoulΣ transfe≥ thσ content≤ oµ thσ blocδ oµ memor∙á 1000-ì
200░ t∩ memor∙ location≤ 1500-2500«á Unfortunatel∙ thσ firs⌠ ste≡á transfer≤ ì
thσ content≤ oµ 100░ t∩ 1500« B∙ thσ timσ i⌠ i≤ thσ turε oµ locatioε 150░ t∩ ì
bσ transferreΣ i⌠ ha≤ alread∙ beeε overwritteε iε thσ firs⌠ step.

Takinτ thσ initia∞ condition≤ :-

          H╠á= 199╣á   D┼á╜ 249╣   anΣ   B├ ╜ 100░

anΣá usinτ thσ LDD╥ instruction¼á thσ samσ blocδ wil∞ bσ transferreΣ t∩á thσ ì
samσá memor∙ location≤ withou⌠ thi≤ problem«á Iε general¼á iµ thσ tw∩ block≤ ì
overla≡á usσá thσá instructioε tha⌠ ensure≤ thσ initia∞á figurσá iεá thσá H╠ ì
registe≥ lie≤ withiε thσ blocδ t∩ whicΦ datß i≤ t∩ bσ transferred.

Summar∙á - blocδ transfe≥
LD╔á     pointe≥á incrementeΣ
LDI╥á    pointe≥á incrementeΣáanΣ repeateΣáunti∞ numbe≥ founΣ o≥ BC=░
LD─      pointe≥  decrementeΣ
LDD╥     pointe≥á decrementeΣáanΣárepeateΣáunti∞ánumbe≥áfounΣáo≥áBC=0


EXAMPL┼áO╞áBLOC╦áTRANSFE╥

Thσáexamplσáuse≤áthσáLDI╥áinstruction t∩ì
transfe≥áthσáprograφádowεát∩ a memor∙áarea«áThσápowe≥áoµáthesσì
instruction≤ i≤ well illustrateΣ b∙ thσ simplσ operation«áThesσ instruction≤ ì
caεábσáuseΣáals∩ to fil∞ ß blocδ oµ memor∙ witΦ ßásingle number.

      L─ HL,F00╚
      L─ DE,ST▒
      L─ BC,B╚
      LDI╥
      RE╘
ST▒   DEF┬ ░
      DEF┬ ░
      DEF┬ ░
      DEF┬ ░
      DEF┬á░
      DEF┬ ░
      DEF┬ ░
      DEF┬ ░
      DEF┬ ░
      DEF┬ ░
      DEF┬ ░


BLOC╦ SEARC╚

A≤á yo⌡á ma∙á no≈ bσ ablσ t∩ infer¼á thσ C╨ grou≡  Compare≤ thσá conten⌠á oµ ì
memor∙á location≤á iε ß blocδ oµ memor∙ witΦ ßá predetermineΣá number«á   H╠ ìèhold≤á thσá pointe≥á anΣá thσ B├ registe≥ thσ lengtΦá oµá thσá blocδá t∩á bσ ì
searched«á Thσá Accumulato≥ hold≤ thσ numbe≥ fo≥ whicΦ thσ instructioε  wil∞ ì
search«á Iµ thσ numbe≥ i≤ founΣ theε thσ Zer∩ flaτ i≤ set« A≤ beforσ thσ P/╓ ì
flaτá indicate≤á whethe≥ BC=0«á Thσ blocδ instruction≤ stop¼á no⌠á witΦá thσ ì
pointer(s⌐ pointinτ a⌠ thσ addresse≤ jus⌠ operateΣ on¼ bu⌠ t∩ thosσ abou⌠ t∩ ì
bσ processed« Hencσ iµ equalit∙ i≤ founΣ the∙ poin⌠ t∩ thσ  nex⌠ addres≤ anΣ ì
no⌠ thσ memor∙ locatioε iε whicΦ i⌠ wa≤ found.

Summar∙ - blocδásearcΦ
CP╔     pointe≥ incrementeΣ
CPI╥    pointe≥ incrementeΣáanΣ repeateΣ unti∞ numbe≥ founΣ o≥ BC=░
CP─     pointe≥ decrementeΣ
CPD╥    pointe≥ádecrementeΣáanΣárepeateΣáunti∞ánumbe≥áfounΣáo≥áBC=0


EXAMPL┼áO╞áBLOC╦ SEARC╚

Iε thi≤ examplσ thσ prograφ itselµ i≤ searcheΣ througΦ unti∞ thσ numbe≥á C9╚ ì
i≤ founΣ (C9╚ correspond≤ t∩ RET):

      L─á A,C9╚ ì
STAR╘áL─á BC,10░
      L─  HL,STAR╘
      CPI╥
      DE├ H╠
      L─  A,FF╚
      CPI╥
      DE├áH╠
      L─  A,(HL⌐
      RE╘
      DEF┬ 6╚
      DEF┬ 0╚
      DEF┬ FF╚
      DEF┬ 88╚


BLOC╦ INPUT/OUTPU╘ INSTRUCTION╙

ThσáI╬ grou≡ oµ blocδ instructions inpu⌠ádatßáfroφáthσì
inpu⌠ápor⌠áspecified b∙ thσ content≤ oµ thσ ├ registe≥ into ßáblocδáoµ   ì
memor∙ startinτ a⌠ the addres≤ helΣ iε thσ H╠ register¼áthe lengtΦ oµì
whicΦái≤ iε thσ ┬ register. Al∞ form≤ oµ I╬ apply :-

     IN╔   incrementinτ        ì
     INI╥á incrementinτáanΣárepeatinτ
     IN─áá decrementinτ
     IND╥  decrementinτáanΣ repeating

Thσá OU╘ grou≡ i≤ identica∞ t∩ thσ I╬ group¼á bu⌠ datß froφ memor∙ i≤ outpu⌠ ì
t∩á por⌠á (C⌐ iε sequencσ froφ   memor∙ beginninτ a⌠ locatioεá (HL)«á Thσá ┬ ì
registe≥ i≤ useΣ a≤ ß counte≥ a≤ thσ I╬ group.

     OUT╔  incrementinτ
     OTI╥  incrementinτ anΣárepeatinτ
     OUT─  decrementinτ
     OTD╥  decrementinτ anΣ repeatinτ

Thσ Zer∩ flaτ indicate≤ B=░ iε thesσ cases.


PROCESSO╥áCONTRO╠áINSTRUCTION╙

Thi≤á grou≡á oµá instructions¼á togethe≥ witΦá thσá interrup⌠á instructions¼ ì
contro∞ thσ actioε oµ thσ processor.èNO╨ o≥ N∩ OPeratioε cause≤ thσ processo≥ t∩ d∩  nothinτ fo≥ onσ step«á Sincσ ì
it≤ codσ i≤ 0¼á ß cleareΣ memor∙ areß wil∞ bσ sequenceΣ througΦ unti∞ ß non-ì
zer∩ instructioε i≤ found.
HAL╘ stop≤ thσ sequencinτ oµ thσ processo≥ unti∞ aε interrup⌠ i≤ receiveΣá ¿ ì
seσ nex⌠ lessoε )«á Afte≥ thσ interrup⌠ ha≤ beeε deal⌠ with¼ thσ instructioε ì
afte≥á thσá HAL╘á i≤ performed«á Thu≤ thσ prograφ caε bσá synchroniseΣá witΦ ì
operation≤ outsidσ thσ processor.
A≤ wel∞ a≤ thσ standarΣ CAL╠ instruction≤ incorporatinτ thσ addres≤ t∩ whicΦ ì
thσá processo≥ i≤ t∩ jump¼á thσ Z8░ ha≤ instruction≤ iε whicΦ thσ addres≤ oµ ì
thσ CAL╠ i≤  implied«á Thσ instruction≤  RS╘ ε ¿ wherσ n=00H¼ 08H¼ 10H¼ 18H¼ ì
20H¼á 28H¼á 30H¼ 38╚ ⌐ call≤ thσ routinσ a⌠ 00ε ╚  directly« i.e« RS╘ 28╚ i≤ ì
equivalen⌠á t∩á CAL╠á 0028H«á Thei≥ primσ usσ oε somσ system≤á i≤á t∩á allo≈ ì
externa∞ hardwarσ t∩ forcσ thσ singlσ bytσ instruction≤ int∩ thσá processor¼ ì
thu≤  makinτ i⌠ thinδ it≤ nex⌠ instructioε i≤ aε RS╘ n« I⌠ thereforσ form≤ ß ì
methoΣ oµ interruptinτ thσ processor«á ¿ seσ thσ lessoε oε interrupts)« Mos⌠ ì
RS╘ instruction≤ affec⌠ thσ systeφ configuration« i.e« RS╘ 00╚ i≤ equivalen⌠ ì
t∩á NE╫á iεá Basic¼á tha⌠ clear≤ ou⌠ al∞ thσ memor∙ anΣá re-establishe≤á thσ ì
system.
ì
Therσ arσ onl∙ tw∩ morσ register≤ iε thσ Z8░ t∩ discuss¼á thσ ╔ o≥ Interrup⌠ ì
registe≥á (seσá nex⌠ lesson)¼á anΣ thσ ╥ o≥ RefresΦá register«á Thσá RefresΦ ì
registe≥á i≤á useΣá b∙á somσ form≤ oµ Randoφá Acces≤á Memor∙á whicΦá requirσ ì
continuou≤á writinτá t∩á maintaiεá it≤á information«áá Thσá ╥á registe≥áá i≤ ì
incrementeΣá automaticall∙ ever∙ timσ thσ processo≥ fetche≤ eacΦ par⌠ oµá aε ì
instructioε froφ  memory« Thi≤ provide≤ thσ programme≥ witΦ ß registe≥ whosσ ì
content≤á ma∙á bσá considereΣá randoφ fo≥ somσ applications«á Thσá ╥á anΣá ╔ ì
register≤ caε bσ loadeΣ froφ thσ Accumulator«á Thσ instruction≤ involveΣ arσ ì
simpl∙ :-
                     L─ A,╥      L─á R,┴á      L─ A,╔   anΣ   L─ I,A.

Summar∙ - processo≥ contro∞áinstruction≤
NO╨ ì
HAL╘
RS╘ ε  wherσ ε = 00H¼á08H¼á10H¼á18H¼ 20H¼ 28H¼ 30H¼ o≥ 38H«
L─ A,╥
L─ R,┴
L─ A,╔
L─ I,A


EXAMPL┼ O╞ US┼ O╞ REFRES╚ REGISTE╥

Mos⌠á oµá thσá instructioε iε thi≤ anΣ thσ las⌠ lessoεá involvσá step≤á tha⌠ ì
changσá thσá environmen⌠ iε whicΦ thσ processo≥ operates«á I⌠á i≤á thereforσ ì
difficul⌠ t∩ simulatσ thesσ instructions«á Littlσ caε bσ learn⌠ froφá singlσ ì
steppinτá througΦá aε example«á Howeve≥ changinτ interrup⌠ etc«á ¿ seσá nex⌠ ì
lessoεá ⌐á oεá ß Persona∞ Compute≥á i≤á advanceΣá programming«á Tr∙á gaininτ ì
experiencσ oε machinσ codσ programminτ beforσ venturinτ int∩ thi≤ field« Thσ ì
examplσ show≤ thσ usσ oµ thσ RefresΦ registe≥ a≤ ß sourcσ oµ randoφ numbers.

      NO╨
LOO╨ááL─ááA,╥
      J╥ááLOO╨


INTERRUPT╙

Aεá interrup⌠á originate≤á froφá outsidσ thσá processor¼á requestinτá i⌠á t∩ ì
breakofµá it≤á curren⌠á sequencσá oµ operation≤ anΣá dea∞á witΦá somσá othe≥ ì
function« Interrupt≤ fal∞ int∩ tw∩ types¼ Non-Maskablσ Interrupt≤ (NMI⌐  anΣ ì
Maskablσ Interrupt≤ (MI)« Maskablσ interrup⌠ caε bσ ignoreΣ b∙ thσ software¼ ì
bu⌠ NMI≤ cannot«á Onσ Non-Maskablσ Interrup⌠ i≤ availablσ oε thσ   Z8░ chip« ì
Thσá interrup⌠á automaticall∙ perform≤ aε RS╘ o≥ CAL╠ t∩á addres≤á 0066╚á oε ì
completioεá oµ thσ curren⌠ instructions«á Thσ routinσ a⌠ 0066╚ i≤ performed« ìèThσá instructioε RET╬ o≥ RETurε froφ Non-maskablσ interrup⌠ return≤á contro∞ ì
bacδ t∩ thσ interrupteΣ routinσ a⌠ it≤ nex⌠ instructioε«

Iε thσ Z8░ therσ i≤ ß flag¼á thσ interrup⌠ enablσ flag¼á tha⌠ caε bσ se⌠ anΣ ì
cleared«á Dependinτá upoεá thσá statσá oµ thi≤ flaτ MI≤á wil∞á bσá  accepteΣ ì
or ignored«áThσá tw∩á instruction≤ tha⌠ manipulatσ thi≤ flaτ arσá E╔á Enablσ ì
Interrupts«á Afte≥ onσ morσ singlσ bytσ instruction¼á furthe≥ interrupt≤ arσ ì
accepted« D╔ Disablσ Interrupt≤ immediately« Entr∙ int∩ ß maskablσ interrup⌠ ì
automaticall∙á disable≤á interrupt«á Threσ types¼á o≥á  modes¼á oµá maskablσ ì
interrupt≤ arσ available«á MOD┼ ░ i≤ se⌠ b∙ thσ instructioε I═ 0«á Thi≤ modσ ì
i≤ thσ onσ describeΣ previously¼á wherσ thσ RS╘ ε instructioε i≤ forceΣ ont∩ ì
thσá datß highwa∙ t∩ foo∞ thσ processo≥ int∩ performinτ thσ restart«á MOD┼ ▒ ì
i≤ se⌠ b∙ thσ instructioε I═ 1«á Thi≤ modσ i≤ simila≥ iε operationt∩ thσ Noε ì
Maskablσá Interrup⌠ excep⌠ tha⌠ processo≥ i≤ restarteΣ a⌠ 0038╚á insteaΣá oµ ì
0066╚ a≤ iε thσ NMI«á MOD┼ ▓ i≤ thσ mos⌠ flexible¼á thσ addres≤ t∩ whicΦ thσ ì
processo≥á i≤ forceΣ i≤ thσ indirec⌠ addres≤ helΣ iε ß memor∙ location«á Thσ ì
addres≤á oµá thi≤á memor∙ locatioε i≤ computeΣ froφ thσá conten⌠á oµá thσá ╔ ì
register¼á whicΦá provide≤ thσ higΦ  bytσ anΣ thσ interruptinτ devicσá whicΦ ì
provide≤á thσ lo≈ byte«á Sincσ thσ interrup⌠ routinσ i≤ addresseΣ indirectl∙ ì
thσá interrupt≤  arσ termeΣ vectoreΣ interrupts«á Aε interrup⌠ caε occu≥á a⌠ ì
an∙á time«á I⌠á follow≤ thereforσ tha⌠ iµ thσ interrupteΣ prograφ i≤á t∩á bσ ì
continueΣá ¿ i.e«á bσ re-entereΣ )¼á thσ content≤ oµ an∙ registe≥á tha⌠á thσ ì
interrup⌠ routinσ use≤ mus⌠ bσ storeΣ o≥ pusheΣ ont∩ thσ stack¼ anΣ reloadeΣ ì
o≥á POPpeΣá  froφá thσá stacδ beforσ returning«á T∩á ensurσá tha⌠á n∩á othe≥ ì
interrup⌠á occur≤á durinτá thi≤ perioΣ anΣ thereforσ corrupt≤á thσá registe≥  ì
content≤á beforσá the∙ arσ safe¼á thσ interrupt≤ arσá diableΣá durinτá thesσ ì
operations«á Wσá mus⌠ returε froφ aε interrup⌠ routinσ witΦ thσ  instructioε ì
RETI¿ RETurε froφ Interrup⌠ ⌐ anΣ no⌠ RET«á Hencσ interrup⌠ routinσ takσ thσ ì
forφ :-

     (1⌐  Ente≥ámaskablσáinterrupt¼áinterrupt≤áarσ disableΣáa⌠ thi≤ time«
     (2⌐  PUS╚ o≥ EXchangσ requireΣ registered
     (3⌐  Enable≤ interrup⌠ iµ required«
     (4⌐  D∩ interrup⌠ routine«
     (5⌐  Disablσ interrup⌠áiµ required«
     (6⌐  PO╨ o≥ EXchangσ registers«
     (7⌐  Enable≤ interrupt≤
     (8⌐  Returε froφáinterrup⌠ (RETI).



Thi≤á complete≤á ß stud∙ oµ al∞ thσ instruction≤ availablσ oε thσ Z8░á chip« ì
Yo⌡á shoulΣ no≈ bσ ablσ t∩ usσ assembler≤ t∩ writσ you≥á owεá programs«á Yo⌡ ì
wil∞ finΣ tha⌠ mos⌠ arσ no⌠ use≥ friendly¼á anΣ tha⌠ yo⌡ wil∞ no⌠ bσ ablσ t∩ ì
ste≡ easil∙ througΦ thσ instructions«á Don'⌠ despair«á Yo⌡ caε alway≤ returε ì
t∩ thi≤ Tuto≥ t∩ checδ you≥ problem.


               á   GOO─  LUC╦á anΣ  HAPP┘  PROGRAMMING.