ftp.barnyard.co.uk/2015.02.ftp.barnyard.co.uk.tar/ftp.barnyard.co.uk/cpm/walnut-creek-CDROM/KAYPRO/KAYINFO.LBR/RS-232.DOC

Text File | 2000-06-30 | 11KB | 253 lines

                       RS-232C INTERFACING


     RS-232├á i≤ thσ mos⌠ recen⌠ versioε oµ thσ EI┴á (Electronic≤ ì
Industr∙áá Association⌐á standarΣá fo≥á lo≈á speeΣá seria∞áá datß ì
communication«á  I⌠á define≤á ß numbe≥ oµá parameter≤á concerninτ ì
voltagσ levels¼ loadinτ characteristic≤ anΣ timinτ relationships«  ì
Typica∞á practicσ require≤ mountinτ femalσ connector≤ (DB-25S⌐ oε ì
thσá chassi≤ oµ thσ communication≤ equipment¼á anΣ malσá (DB-25P⌐ ì
connector≤ oε thσ cablσ connectinτ tw∩ sucΦ devices.

     Therσá arσ tw∩ maiε classe≤ oµ RS-232├á devices¼á DT┼á (Datß ì
Termina∞á Equipment⌐á anΣá DC┼ (Datßá Communication≤á Equipment)«  ì
Terminal≤ arσ typica∞ DTE's¼ anΣ DCE'≤ ma∙ bσ printer≤ o≥ modems« ì
Typically¼á onσ onl∙ interface≤ ß DT┼ t∩ ß DCE¼ a≤ opposeΣ t∩ onσ ì
DT┼ t∩ anothe≥ DTE¼ o≥ onσ DC┼ t∩ anothe≥ DCE«  Therσ arσ way≤ oµ ì
interfacinτ tw∩ likσ device≤ b∙ buildinτ ß non-standarΣ cable«  Iµ ì
onσ oµ thσ device≤ involveΣ i≤ ß modem¼á thσ 'hand-shakingºá line≤ ì
mus⌠ bσ supported«  Thesσ lines ma∙ bσ useΣ t∩ allo≈ thσ receivinτ ì
devicσá t∩á causσá thσá transmittinτ devicσ t∩á pausσá whilσá thσ ì
receivinτ devicσ catche≤ up.

     RS-232├ i≤ intendeΣ fo≥ relativel∙ shor⌠ (5░ fee⌠ o≥á less)¼ ì
relativel∙á lo≈á speΣ (19,20░ bits/seconΣ o≥ les≤ (BAUD)⌐á seria∞ ì
communication«á  BotΦá asynchronou≤ anΣ synchronou≤ seria∞á encodinτ ì
arσ supported¼á anΣ Digita∞ signal≤ arσ useΣ a≤ opposeΣ t∩á Analoτ ì
signals«á  RS-232├á wil∞ suppor⌠ simplex¼á half-duplex¼á o≥ full-duplexì
channels.

     ┴á Simple° channe∞ mean≤ tha⌠ communicatioε i≤ onσá way«á  Aε ì
examplσá woulΣá bσá ß receivσá onl∙á Printer«á  Iεá ßá half-duple° ì
channel¼á datßá ma∙ trave∞ iε eithe≥ direction¼á bu⌠ a⌠ an∙á giveε ì
timσ datß wil∞ onl∙ bσ travellinτ iε onσ direction«  Thσ linσ mus⌠ ì
bσá turneΣ arounΣ beforσ datß caε trave∞ iε thσ othe≥á direction«  ì
Iεá ßá full-duple°á channel¼á datß ma∙ trave∞ iεá botΦá direction≤ ì
simultaneously.

     Therσ arσ twent∙ fivσ circuit≤ whicΦ makσ u≡ thσá interface«  ì
Iε thσ simples⌠ case¼á aε interfacσ ma∙ bσ implementeΣ witΦ a≤ fe≈ ì
a≤á tw∩á circuits«á  ┴ circui⌠ i≤ defineΣ t∩ bσ ß continuou≤á wirσ ì
froφ onσ devicσ t∩ another.

             DEFINITION OF THE MOST COMMON CIRCUITS

 1.   CG    Chassis Ground
      This circuit is Frame Ground and insures that the two
      devices are at the same potential, to prevent electrical
      shock to the operator.  This circuit is optional and is
      not used as the reference for any other circuit.



è 2.   TD    Transmit Data
      This circuit is the path whereby serial data is sent from
      the DTE to DCE.  This circuit must be present if data is
      to travel in that direction.

 3.   RD    Receive Data
      This circuit is the path whereby serial data is sent from
      the DCE to DTE.  This circuit must be present if data is
      to travel in that direction.

 4.   RTS   Request To Send
      This circuit is the signal that indicates that the DTE
      wishes to send data to the DCE.  Note that the DTE must
      always be ready to accept data.  Once the DTE has data
      to send it will set RTS to ON (logic 0), and wait for an
      on condition on CTS from the DCE.  After sending the
      data the DTE will set RTS to OFF (logic 1).

 5.   CTS   Clear To Send
      This circuit is the signal that indicates that the DCE
      is ready to accept data from the DTE.  In normal
      operation it will be in the OFF state.  When the DTE
      asserts RTS, the DCE will do whatever is necessary to
      allow the data to be sent.  At this time the DCE would
      set CTS to the ON state, which would allow the DTE to
      send the data.  Note that the DTE must have an incoming
      CTS before it can transmit.

 6.   DSR   Data Set Ready
      This circuit informs the DTE that the DCE is alive and
      well.  It is normally set to the ON state by the DCE
      on power-up and left there.  The DTE must have an
      incoming DSR in order to function normally.

 7.   SG    Signal Ground
      This circuit is the neutral to which all other voltages
      are referenced.  It must be present at all times.  (It
      is the common line for all DC voltages.)

 8.   DCD   Data Carrier Detect
      This circuit is the signal whereby the DCE informs the
      DTE that it has an incoming carrier.  It may be used by
      the DTE to determine if the channel is idle, so that
      the DTE can request it with RTS.  Note that some DTE's
      must have DCD before they will operate.

15.   TC    Transmit Clock
      This circuit provides the clock for the transmitter
      section of a synchronous DTE.  It may or may not be
      running at the same rate as the receiver clock, and
      must be present on synchronous interfaces.

17.   RC    Receiver Clock
      This circuit provides the clock for the receiver
      section of a synchronous DTE.  It may or may not be
      running at the same rate as the transmitter clock,è      and must be present on synchronous interfaces.  Note
      that both RC and TC are sourced by the DCE.

20.   DTR   Data Terminal Ready
      This circuit provides the signal that informs the DCE
      that the DTE is alive and well.  It is normally set to
      the ON state by the DTE at power-up and left there.
      Note that a typical DCE must have an incoming DTR before
      it will function normally.

     Thσá followinτá tablσá list≤ al∞á thσá informatioεá fo≥á thσ ì
variou≤ circuit≤ whicΦ makσ u≡ thσ RS-232├ interface.

PIN    NAME    EIA  CCITT    DTE    DCE      FUNCTION
 1    CG    AA    101    ==    ==    Chassis Ground
 2    TD    BA    103    >>        Transmit Data
 3    RD    BB    104        <<    Receive Data
 4    RTS    CA    105    >>        Request To Send
 5    CTS    CB    106        <<    Clear To Send
 6    DSR    CC    107        <<    Data Set Ready
 7    SG    AB    102    ==    ==    Signal Ground
 8    DCD    CF    109        <<    Data Carrier Detect
 9*                    <<    Pos Test Voltage
10*                    <<    Neg Test Voltage
11                        Not Used (usually)
12+    SCDC    SCF    122        <<    Secondary DCD
13+    SCTS    SCB    121        <<    Secondary CTS
14+    STD    SBA    118    >>        Secondary TD
15#    TC    DB    114        <<    Transmit Clock
16+    SRD    SBB    119        <<    Secondary RD
17#    RC    DD    115        <<    Receive Clock
18                        Not used (usually)
19+    SRTS    SCA    120    >>        Secondary RTS
20    DTR    CD    108.2    >>        Data Terminal Ready
21*    SQ    CG    110        <<    Signal Quality
22    RI    CE    125        <<    Ring Indicator
23*        CH    111    >>        Data Rate Selector
        CI    112        <<    Data Rate Selector
24*    XTC    DA    113    >>        Ext. TC
25*                >>        Busy


*  Denotes rarely used
+  Denotes only if secondary channel implemented
#  Denotes only on synchronous interfaces
>> Denotes from DTE to DCE
<< Denotes from DCE to DTE
== Denotes Ground line
CCIT╘á ╜á Internationa∞á TelegrapΦá anΣá Telephonσáá Consultativσ ì
Committee


                  TYPES OF DATA COMMUNICATIONS

     Therσá arσá tw∩á way≤ oµ sendinτ datßá serially«á  The∙á arσ ìèAsynchronou≤á anΣá Synchronous«áá  Asynchronou≤á seria∞áá involve≤ ì
sendinτá informatioεá witΦ precisσ timinτ betweeε bit≤ oµ ßá giveε ì
character¼ bu⌠ witΦ arbitraril∙ lonτ interval≤ betweeε characters«  ì
Iε orde≥ t∩ allo≈ thi≤ variablσ lengtΦ interval¼ certaiε overheaΣ ì
informatioε i≤ requireΣ oε eacΦ character«á  Normally¼á durinτá aε ì
inter-characte≥á ga≡á thσ linσ i≤ a⌠ ß logiπ ▒ state«á  Wheεá thσ ì
characte≥ starts¼ ß star⌠ bi⌠ (logiπ 0⌐ is alway≤ first«  Oncσ thσ ì
star⌠á bi⌠á ha≤á occurreΣá thσá othe≥á datßá bit≤á follow¼áá leas⌠ ì
significan⌠á bi⌠á first«á  Therσá arσ normall∙ ╖ o≥á ╕á datßá bit≤ ì
followeΣ b∙ ß parit∙ bit«  Iµ runninτ witΦ "eveε parity"¼ thi≤ bi⌠ ì
wil∞á bσá se⌠á o≥ rese⌠ t∩ makσ aε evσn numbe≥ oµá oµá datßá bits«  ì
Followinτ thσ parit∙ bi⌠ (iµ used⌐ arσ ▒ o≥ ▓ "sto≡ bits"«  Thesσ ì
sto≡ bit≤ arσ alway≤ ß logiπ ▒ anΣ simpl∙ insurσ tha⌠ thσ linσ i≤ ì
idleá fo≥ onσ o≥ tw∩ bi⌠ time(s⌐ whilσ thσ hardwarσ re-cycle≤á fo≥ ì
thσáá nex⌠áá star⌠áá bi⌠.  ┴áá UAR╘áá (Universa∞ááá Asynchronou≤ ì
Receiver/Transmitter⌐á caε bσ useΣ t∩ conver⌠ paralle∞ t∩ o≥á froφ ì
Asynchronou≤ seria∞ data.

     Synchronou≤ seria∞ involve≤ sendinτ character≤ no⌠ onl∙ witΦ ì
precisσá timinτ betweeε bit≤ oµ ß giveε character¼á bu⌠ a⌠ regula≥ ì
intervals«á  Datßá i≤á normall∙ seεt iε largσ block≤ witΦá n∩á ga≡ ì
betweeεá characters«á  N∩ overheaΣ i≤ requireΣ oε eaπhá character¼ ì
althougΦá parit∙á i≤á stil∞ sometime≤á used«á  Therσá i≤á certaiε ì
informatioεá requireΣá a⌠á thσá star⌠á anΣá enΣá oµá eacΦáá block« ì
Synchronou≤á datß transmission≤ a≥e normall∙ morσ intelligen⌠ thaε ì
asynchronous¼á anΣá ma∙ reques⌠ re-transmissioε oµ block≤á receiveΣ ì
witΦ errors.

                   ELECTRICAL CHARACTERISTICS

     Thσ character≤ transmitteΣ b∙ aε RS-23▓ devicσ arσ sen⌠á ou⌠ ì
t∩á thσ I/╧ por⌠ ß thσ bauΣ ratσ selecteΣ b∙ interna∞ switche≤ o≥ ì
software«á  Thσ characte≥ i≤ made u≡ oµ ╖ o≥ ╕ bit≤ a≤ defineΣá b∙ ì
thσ appropriatσ codσ chart«  Fo≥ ASCI╔ characte≥ thσ capita∞ ┴ i≤ ì
sen⌠á a≤á 4▒á hex«á  Thσ binar∙ codσ i≤ 010░ 000▒á witΦá ▒á beinτ ì
the leas⌠á significan⌠á bit¼á anΣ thσ lef⌠ mos⌠ ░ beinτá thσá mos⌠ ì
significan⌠á bit«á  Thσ followinτ diagraφ i≤ wha⌠ i≤ seeε a⌠á thσ ì
outpu⌠ port«  Bi⌠ flo≈ i≤ froφ lef⌠ t∩ right.

  ----    --------------------    ----  stop
   S    1   0   0   0   0   0   1   0   bits
      ----                    ----    --------


Logic 1 is low as shown.
S Denotes start bit





                 NON-STANDARD WIRING CONNECTIONS

     Therσá arσ severa∞ way≤ oµ hookinτ tw∩ non-standarΣá RS-232├ ì
device≤ together¼ bu⌠ thσ followinτ threσ arσ thσ mos⌠ common«  Iµ ìèonl∙á onσ wa∙ communicatioε i≤ requireΣ ß minimuφ oµ tw∩ wire≤á i≤ ì
al∞á tha⌠á wil∞ bσ required«á  Al∞ handshakinτ condition≤á caεá bσ ì
satisfieΣ b∙ loopinτ bacδ thσ appropriatσ signal≤ oε botΦ end≤ oµ ì
thσá cablσá (seσá Nul∞ Modeφ diagraφ below)«á  Thσá threσá typica∞ ì
connection≤ arσ nul∞ modem¼ n∩ handshake¼ anΣ ful∞ handshake«  Thσ ì
followinτ diagram≤ sho≈ thσ necessar∙ wiring«á  Bσ carefu∞ t∩ notσ ì
tha⌠ thσ manufacture≥ ma∙ wirσ thσ devicσ eithe≥ a≤ ß DT┼ o≥ DCE«  ì
Consul⌠ thσ manua∞ fo≥ fina∞ verificatioε oµ pinouts.


     NULL MODEM         NO HANDSHAKE        FULL HANDSHAKE


     1********1          1********1           1********1
     2--------3          2--------3           2--------3
     3--------2          3--------2           3--------2
     4-|    |-4          7--------7           4--------5
     5-|    |-5          5-|    |-5           5--------4
     7--------7          6-|    |-6           7--------7
     6-|    |-6          8-|    |-8           6------|-8
     8-|    |-8         20-|    |-20                 |-20
    20-|    |-20                              8-|------6
                                             20-|


NOTE: Pin 1 is optional for Chassis Ground between Terminals.


This information furnished for all computer users.  I have spent
many hours to find the above information the hard way.

LARRY KRAEMER
R 2 BOX 190
JACKSON, MO.  63755