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Assembly Source File  |  1995-02-27  |  11KB  |  526 lines
  1.  
  2.                 tabsize    3
  3.  
  4.                 ; ****************
  5.                 ; AS65 opcode test
  6.                 ; ****************
  7.                 ; this file will test all available opcodes for the defined device
  8.                 ;
  9.                 ; =======================================
  10.                 ; pro R_STD            file : "R6500_std.opc"
  11.                 ; pro r6500            file : "R6500.opc"
  12.                 ; pro r65C00        file : "R65C00XX.opc"
  13.                 ; pro r6501            file : "R6500.opc"
  14.                 ; pro r65c01        file : "R65C00XX.opc"
  15.                 ; pro r6502            file : "R6500.opc"
  16.                 ; pro r65c02        file : "R65CXXX.opc"
  17.                 ; pro r65c102        file : "R65CXXX.opc"
  18.                 ; pro r65c112        file : "R65CXXX.opc"
  19.                 ; pro r65c10        file : "R65C00XX.opc"
  20.                 ; pro r6511            file : "R6500.opc"
  21.                 ; =======================================
  22.  
  23.  
  24.                 sernr TLS_B0001    ; Serialnumber
  25.                 warnoff                ; warnings off
  26.                 liston sf            ; assm listing to screen and file
  27.                 seterr fs            ; errors to screen and file
  28.                 setout "RAM:"        ; set output to RAM:
  29.  
  30.  
  31.  
  32. R_STD            equ    1                ; all devices (standart)
  33. R6500            equ    2                ; R6500/* devices
  34. R65CXXX        equ    3                ; R65CXXX devices
  35. R65C00XX        equ    4                ; R65C00/XX devices
  36.  
  37.  
  38.  
  39.  
  40. TST_STDRT    equ    1                ; 1 = show standart opcodes too
  41.                                         ; 0 = only specified by familie
  42.  
  43. PRO             set    R65C00XX        ; device to test
  44.  
  45.  
  46.  
  47.                 ifequ PRO-R_STD    ; default setting (all devices in all families)
  48.                 pro R_STD            ; file : "R6500_std.opc"
  49.                 endif
  50.  
  51.                 ifequ PRO-R6500    ; R6500/* devices
  52.                 pro r6502            ; file : "R6500.opc"
  53.                 ifequ TST_STDRT
  54.                 listoff                ; assm listing off
  55.                 endif
  56.                 endif
  57.  
  58.                 ifequ PRO-R65CXXX    ; R65CXXX devices
  59.                 pro r65C02            ; file : "R65CXXX.opc"
  60.                 ifequ TST_STDRT
  61.                 listoff                ; assm listing off
  62.                 endif
  63.                 endif
  64.  
  65.                 ifequ PRO-R65C00XX    ; R65C00/XX devices
  66.                 pro r65C01            ; file : "R65C00XX.opc"
  67.                 ifequ TST_STDRT
  68.                 listoff                ; assm listing off
  69.                 endif
  70.                 endif
  71.  
  72.  
  73.                 *= $1000            ; set PC
  74.  
  75.                                     ; im    = immediate
  76.                                     ; zp    = zeropage
  77.                                     ; zp,x     = zeropage,x
  78.                                     ; zp,y     = zeropage,y
  79.                                     ; abs   = absolute
  80.                                     ; abs,x = absolute,x
  81.                                     ; abs,y = absolute,y
  82.                                     ; ind,x = indirect,x  (oper,x)
  83.                                     ; ind,y = indirect,y  (oper,y)
  84.                                     ; ind   = indirect
  85.                                     ; rel   = relative
  86.                                     ; accu  = accumulator
  87.                                     ; impl  = implied
  88.  
  89.                 ; ==============                
  90.                 ; R6500 Opcodes:
  91.                 ; ==============
  92.  
  93.                 conprt    "\t-> \"standard opcodes, R6500\"\n"
  94.  
  95.                 ; mnenomic            opcode $        adressing mode
  96.                 adc #$FF                ; 69            im
  97.                 adc 10                ; 65            zp
  98.                 adc 10,x                ; 75            zp,x
  99.                 adc $1000            ; 6d            abs
  100.                 adc $1000,x            ; 7d            abs,x
  101.                 adc $1000,y            ; 79            abs,y
  102.                 adc (10,x)            ; 61            ind,x
  103.                 adc (10),y            ; 71            ind,y
  104.  
  105.                 and #$FF                ; 29            im
  106.                 and 10                ; 25            zp
  107.                 and 10,x                ; 35            zp,x
  108.                 and $1000            ; 2d            abs
  109.                 and $1000,x            ; 3d            abs,x
  110.                 and $1000,y            ; 39            abs,y
  111.                 and (10,x)            ; 21            ind,x
  112.                 and (10),y            ; 31            ind,y
  113.  
  114.                 asl                    ; 0a            accu
  115.                 asl 10                ; 06            zp
  116.                 asl 10,x                ; 16            zp,x
  117.                 asl $1000            ; 0e            abs
  118.                 asl $1000,x            ; 1e            abs,x
  119.  
  120. brch            bcc brch                ; 90            rel
  121.  
  122.                 bcs brch                ; b0            rel
  123.  
  124.                 beq brch                ; f0            rel
  125.  
  126.                 bit 10                ; 24            zp
  127.                 bit $1000            ; 2c            abs
  128.  
  129.                 bmi brch                ; 30            rel
  130.  
  131.                 bne brch                ; d0            rel
  132.  
  133.                 bpl brch                ; 10            rel
  134.  
  135.                 brk                    ; 00            impl
  136.  
  137.                 bvc brch                ; 50            rel
  138.  
  139.                 bvs brch                ; 70            rel
  140.  
  141.                 clc                    ; 18            impl
  142.  
  143.                 cld                    ; d8            impl
  144.  
  145.                 cli                    ; 58            impl
  146.  
  147.                 clv                    ; b8            impl
  148.  
  149.                 cmp #$FF                ; c9            im
  150.                 cmp 10                ; c5            zp
  151.                 cmp 10,x                ; d5            zp,x
  152.                 cmp $1000            ; cd            abs
  153.                 cmp $1000,x            ; dd            abs,x
  154.                 cmp $1000,y            ; d9            abs,y
  155.                 cmp (10,x)            ; c1            ind,x
  156.                 cmp (10),y            ; d1            ind,y
  157.  
  158.                 cpx #$FF                ; e0            im
  159.                 cpx 10                ; e4            zp
  160.                 cpx $1000            ; ec            abs
  161.  
  162.                 cpy #$FF                ; c0            im
  163.                 cpy 10                ; c4            zp
  164.                 cpy $1000            ; cc            abs
  165.  
  166.                 dec 10                ; c6            zp
  167.                 dec 10,x                ; d6            zp,x
  168.                 dec $1000            ; ce            abs
  169.                 dec $1000,x            ; de            abs,x
  170.  
  171.                 dex                    ; ca            impl
  172.  
  173.                 dey                    ; 88            impl
  174.  
  175.                 eor #$FF                ; 49            im
  176.                 eor 10                ; 45            zp
  177.                 eor 10,x                ; 55            zp,x
  178.                 eor $1000            ; 4d            abs
  179.                 eor $1000,x            ; 5d            abs,x
  180.                 eor $1000,y            ; 59            abs,y
  181.                 eor (10,x)            ; 41            ind,x
  182.                 eor (10),y            ; 51            ind,y
  183.  
  184.                 inc 10                ; e6            zp
  185.                 inc 10,x                ; f6            zp,x
  186.                 inc $1000            ; ee            abs
  187.                 inc $1000,x            ; fe            abs,x
  188.  
  189.                 inx                    ; e8            impl
  190.  
  191.                 iny                    ; c8            impl
  192.  
  193.                 jmp $1000            ; 4c 00 10    abs
  194.                 jmp ($1000)            ; 6c 00 10    abs ind
  195.                 jmp $10                ; 4c 10 00    abs (no zeropage)
  196.                 jmp ($10)            ; 6c 10 00    abs ind (no zp)
  197.  
  198.                 jsr $1000            ; 20            abs
  199.                 jsr $10                ; 20 10 00    abs (no zeropage)
  200.  
  201.                 lda #$FF                ; a9            im
  202.                 lda 10                ; a5            zp
  203.                 lda 10,x                ; b5            zp,x
  204.                 lda $1000            ; ad            abs
  205.                 lda $1000,x            ; bd            abs,x
  206.                 lda $1000,y            ; b9            abs,y
  207.                 lda (10,x)            ; a1            ind,x
  208.                 lda (10),y            ; b1            ind,y
  209.  
  210.                 ldx #$FF                ; a2            im
  211.                 ldx 10                ; a6            zp
  212.                 ldx 10,y                ; b6            zp,y
  213.                 ldx $1000            ; ae            abs
  214.                 ldx $1000,y            ; be            abs,y
  215.  
  216.                 ldy #$FF                ; a0            im
  217.                 ldy 10                ; a4            zp
  218.                 ldy 10,x                ; b4            zp,x
  219.                 ldy $1000            ; ac            abs
  220.                 ldy $1000,x            ; bc            abs,x
  221.  
  222.                 lsr a                    ; 4a            accu
  223.                 lsr 10                ; 46            zp
  224.                 lsr 10,x                ; 56            zp,x
  225.                 lsr $1000            ; 4e            abs
  226.                 lsr $1000,x            ; 5e            abs,x
  227.  
  228.                 nop                    ; ea            impl
  229.  
  230.                 ora #$FF                ; 09            im
  231.                 ora 10                ; 05            zp
  232.                 ora 10,x                ; 15            zp,x
  233.                 ora $1000            ; 0d            abs
  234.                 ora $1000,x            ; 1d            abs,x
  235.                 ora $1000,y            ; 19            abs,y
  236.                 ora (10,x)            ; 01            ind,x
  237.                 ora (10),y            ; 11            ind,y
  238.  
  239.                 pha                    ; 48            impl
  240.  
  241.                 php                    ; 08            impl
  242.  
  243.                 pla                    ; 68            impl
  244.  
  245.                 plp                    ; 28            impl
  246.  
  247.                 rol a                    ; 2a            accu
  248.                 rol 10                ; 26            zp
  249.                 rol 10,x                ; 36            zp,x
  250.                 rol $1000            ; 2e            abs
  251.                 rol $1000,x            ; 3e            abs,x
  252.  
  253.                 ror a                    ; 6a            accu
  254.                 ror 10                ; 66            zp
  255.                 ror 10,x                ; 76            zp,x
  256.                 ror $1000            ; 6e            abs
  257.                 ror $1000,x            ; 7e            abs,x
  258.  
  259.                 rti                    ; 40            impl
  260.  
  261.                 rts                    ; 60            impl
  262.  
  263.                 sbc #$FF                ; e9            im
  264.                 sbc 10                ; e5            zp
  265.                 sbc 10,x                ; f5            zp,x
  266.                 sbc $1000            ; ed            abs
  267.                 sbc $1000,x            ; fd            abs,x
  268.                 sbc $1000,y            ; f9            abs,y
  269.                 sbc (10,x)            ; e1            ind,x
  270.                 sbc (10),y            ; f1            ind,y
  271.  
  272.                 sec                    ; 38            impl
  273.  
  274.                 sed                    ; f8            impl
  275.  
  276.                 sei                    ; 78            impl
  277.  
  278.                 sta 10                ; 85            zp
  279.                 sta 10,x                ; 95            zp,x
  280.                 sta $1000            ; 8d            abs
  281.                 sta $1000,x            ; 9d            abs,x
  282.                 sta $1000,y            ; 99            abs,y
  283.                 sta (10,x)            ; 81            ind,x
  284.                 sta (10),y            ; 91            ind,y
  285.  
  286.                 stx 10                ; 86            zp
  287.                 stx 10,y                ; 96            zp,x
  288.                 stx $1000            ; 8e            abs
  289.  
  290.                 sty 10                ; 84            zp
  291.                 sty 10,x                ; 94            zp,x
  292.                 sty $1000            ; 8c            abs
  293.  
  294.                 tax                    ; aa            impl
  295.  
  296.                 tay                    ; a8            impl
  297.  
  298.                 tsx                    ; ba            impl
  299.  
  300.                 txa                    ; 8a            impl
  301.  
  302.                 txs                    ; 9a            impl
  303.  
  304.                 tya                    ; 98            impl
  305.  
  306.  
  307.  
  308.  
  309.                 ifequ PRO-R6500
  310.                 liston                ; assm listing on
  311.  
  312.                 ; ==========================
  313.                 ; added instructions R6500/*
  314.                 ; ==========================
  315.  
  316.                 conprt    "\t-> \"added instructions, R6500/*\"\n"
  317.  
  318.                 ifequ TST_STDRT
  319.                 breakpt
  320.                 endif
  321.  
  322. brch1            bbr 0,$10,brch1    ; 0f            bit
  323.                 bbr 1,$10,brch1    ; 1f            bit
  324.                 bbr 2,$10,brch1    ; 2f            bit
  325.                 bbr 3,$10,brch1    ; 3f            bit
  326.                 bbr 4,$10,brch1    ; 4f            bit
  327.                 bbr 5,$10,brch1    ; 5f            bit
  328.                 bbr 6,$10,brch1    ; 6f            bit
  329.                 bbr 7,$10,brch1    ; 7f            bit
  330.  
  331.                 bbs 0,$10,brch1    ; 8f            bit
  332.                 bbs 1,$10,brch1    ; 9f            bit
  333.                 bbs 2,$10,brch1    ; af            bit
  334.                 bbs 3,$10,brch1    ; bf            bit
  335.                 bbs 4,$10,brch1    ; cf            bit
  336.                 bbs 5,$10,brch1    ; df            bit
  337.                 bbs 6,$10,brch1    ; ef            bit
  338.                 bbs 7,$10,brch1    ; ff            bit
  339.  
  340.                 rmb 0,$10            ; 07            bit
  341.                 rmb 1,$10            ; 17            bit
  342.                 rmb 2,$10            ; 27            bit
  343.                 rmb 3,$10            ; 37            bit
  344.                 rmb 4,$10            ; 47            bit
  345.                 rmb 5,$10            ; 57            bit
  346.                 rmb 6,$10            ; 67            bit
  347.                 rmb 7,$10            ; 77            bit
  348.  
  349.                 smb 0,$10            ; 87            bit
  350.                 smb 1,$10            ; 97            bit
  351.                 smb 2,$10            ; a7            bit
  352.                 smb 3,$10            ; b7            bit
  353.                 smb 4,$10            ; c7            bit
  354.                 smb 5,$10            ; d7            bit
  355.                 smb 6,$10            ; e7            bit
  356.                 smb 7,$10            ; f7            bit
  357.  
  358.                 endif
  359.  
  360.  
  361.  
  362.                 ifequ PRO-R65CXXX
  363.                 liston                ; assm listing on
  364.  
  365.                 ; =======
  366.                 ; R65CXXX
  367.                 ; =======
  368.  
  369.                 conprt    "\t-> \"added instructions, R65CXXX\"\n"
  370.  
  371.                 ifequ TST_STDRT
  372.                 breakpt
  373.                 endif
  374.  
  375.                 adc (10)                ; 72            ind
  376.  
  377.                 and (10)                ; 32            ind
  378.  
  379. brch1            bbr 0,$10,brch1    ; 0f            bit
  380.                 bbr 1,$10,brch1    ; 1f            bit
  381.                 bbr 2,$10,brch1    ; 2f            bit
  382.                 bbr 3,$10,brch1    ; 3f            bit
  383.                 bbr 4,$10,brch1    ; 4f            bit
  384.                 bbr 5,$10,brch1    ; 5f            bit
  385.                 bbr 6,$10,brch1    ; 6f            bit
  386.                 bbr 7,$10,brch1    ; 7f            bit
  387.  
  388.                 bbs 0,$10,brch1    ; 8f            bit
  389.                 bbs 1,$10,brch1    ; 9f            bit
  390.                 bbs 2,$10,brch1    ; af            bit
  391.                 bbs 3,$10,brch1    ; bf            bit
  392.                 bbs 4,$10,brch1    ; cf            bit
  393.                 bbs 5,$10,brch1    ; df            bit
  394.                 bbs 6,$10,brch1    ; ef            bit
  395.                 bbs 7,$10,brch1    ; ff            bit
  396.  
  397. brch2            bra brch2            ; 80            rel
  398.  
  399.                 bit 10,x                ; 34            zp,x
  400.                 bit $1000,x            ; 3c            abs,x
  401.                 bit #10                ; 89            im
  402.  
  403.                 cmp (10)                ; d2            ind
  404.  
  405.                 dec a                    ; 3a            accu
  406.  
  407.                 eor (10)                ; 52            ind
  408.  
  409.                 inc a                    ; 1a            accu
  410.  
  411.                 jmp ($1000,x)        ; 7c 00 10    abs ind,x
  412.                 jmp ($10,x)            ; 7c 10 00    abs ind,x (no zp)
  413.  
  414.                 lda (10)                ; b2            ind
  415.  
  416.                 ora (10)                ; 12            ind
  417.  
  418.                 phx                    ; da            impl
  419.  
  420.                 phy                    ; 5a            impl
  421.  
  422.                 plx                    ; fa            impl
  423.  
  424.                 ply                    ; 7a            impl
  425.  
  426.                 rmb 0,$10            ; 07            bit
  427.                 rmb 1,$10            ; 17            bit
  428.                 rmb 2,$10            ; 27            bit
  429.                 rmb 3,$10            ; 37            bit
  430.                 rmb 4,$10            ; 47            bit
  431.                 rmb 5,$10            ; 57            bit
  432.                 rmb 6,$10            ; 67            bit
  433.                 rmb 7,$10            ; 77            bit
  434.  
  435.                 sbc (10)                ; f2            ind
  436.  
  437.                 smb 0,$10            ; 87            bit
  438.                 smb 1,$10            ; 97            bit
  439.                 smb 2,$10            ; a7            bit
  440.                 smb 3,$10            ; b7            bit
  441.                 smb 4,$10            ; c7            bit
  442.                 smb 5,$10            ; d7            bit
  443.                 smb 6,$10            ; e7            bit
  444.                 smb 7,$10            ; f7            bit
  445.  
  446.                 sta (10)                ; 92            ind
  447.  
  448.                 stz 10                ; 64            zp
  449.                 stz 10,x                ; 74            zp,x
  450.                 stz $1000            ; 9c            abs
  451.                 stz $1000,x            ; 9e            abs,x
  452.  
  453.                 trb 10                ; 14            zp
  454.                 trb $1000            ; 1c            abs
  455.  
  456.                 tsb 10                ; 04            zp
  457.                 tsb $1000            ; 0c            abs
  458.  
  459.                 endif
  460.  
  461.  
  462.  
  463.  
  464.                 ifequ PRO-R65C00XX
  465.                 liston                ; assm listing on
  466.  
  467.                 ; =========
  468.                 ; R65C00/XX
  469.                 ; =========
  470.  
  471.                 conprt    "\t-> \"added instructions, R65C00/XX\"\n"
  472.  
  473.                 ifequ TST_STDRT
  474.                 breakpt
  475.                 endif
  476.  
  477. brch1            bbr 0,$10,brch1    ; 0f            bit
  478.                 bbr 1,$10,brch1    ; 1f            bit
  479.                 bbr 2,$10,brch1    ; 2f            bit
  480.                 bbr 3,$10,brch1    ; 3f            bit
  481.                 bbr 4,$10,brch1    ; 4f            bit
  482.                 bbr 5,$10,brch1    ; 5f            bit
  483.                 bbr 6,$10,brch1    ; 6f            bit
  484.                 bbr 7,$10,brch1    ; 7f            bit
  485.  
  486.                 bbs 0,$10,brch1    ; 8f            bit
  487.                 bbs 1,$10,brch1    ; 9f            bit
  488.                 bbs 2,$10,brch1    ; af            bit
  489.                 bbs 3,$10,brch1    ; bf            bit
  490.                 bbs 4,$10,brch1    ; cf            bit
  491.                 bbs 5,$10,brch1    ; df            bit
  492.                 bbs 6,$10,brch1    ; ef            bit
  493.                 bbs 7,$10,brch1    ; ff            bit
  494.  
  495. brch3            bra brch3            ; 80            rel
  496.  
  497.                 mul                    ; 02            impl
  498.  
  499.                 phx                    ; da            impl
  500.  
  501.                 phy                    ; 5a            impl
  502.  
  503.                 plx                    ; fa            impl
  504.  
  505.                 ply                    ; 7a            impl
  506.  
  507.                 rmb 0,$10            ; 07            bit
  508.                 rmb 1,$10            ; 17            bit
  509.                 rmb 2,$10            ; 27            bit
  510.                 rmb 3,$10            ; 37            bit
  511.                 rmb 4,$10            ; 47            bit
  512.                 rmb 5,$10            ; 57            bit
  513.                 rmb 6,$10            ; 67            bit
  514.                 rmb 7,$10            ; 77            bit
  515.  
  516.                 smb 0,$10            ; 87            bit
  517.                 smb 1,$10            ; 97            bit
  518.                 smb 2,$10            ; a7            bit
  519.                 smb 3,$10            ; b7            bit
  520.                 smb 4,$10            ; c7            bit
  521.                 smb 5,$10            ; d7            bit
  522.                 smb 6,$10            ; e7            bit
  523.                 smb 7,$10            ; f7            bit
  524.  
  525.                 endif
  526.