ocr: THE 8564 VIDEO INTERFACE CHIP (Continued) 1-7,47 DB0-DB7 These are the bidirectional Data Bus signals. They are for communication between the VIC and the processor, and can only be accessed during AEC high. 8 IRQ Interrupt output. Generates a low interrupt signal. 9 LP Light Pen. Edge triggered latch for light pen input. 10 BA Bus Available output. Used to DMA the processor. 11 DMAROST External DMA request input. Pulled high on 315009 the C128. 8564 VIDEO INTERFACE CHIP 12 AEC Address Enable enable on Contral the output. shared bus, Goes low high for for pracessor VIC cycle and VIC or external ...
