ocr: THE MEMORY MANAGEMENT UNIT (Continued) The registers for page one relocation, the Page One Pointer High (P1H) and the Page One Pointer Low (P1L) do for page one essentially what POH and POL do for the zero page. The functions and bit correspondences are exactly the same. P1L is located in the I/O space at $D509 and P1H at $D50A. Note that both register pairs are initialized upon reset to reflect true page zero and true page one ac- cess for the 8502 processor. Note that these registers continue to take effect in Z-80 mode, as well as in 8502 mode, when set to bank one. When set to bank zero, t ...
