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- Authors Notes:-
-
- 1) Instructions timings are accurate to within:
-
- 4 * MCLK
- --------
- i
-
- where
- i is the number of instructions tested
- MCLK is the system clock (125 nS on an 8 MHz machine)
-
- ARM instructions are therfore calculated to within 2 nS +- 2%
- 2) ARM Speed in MIPS is calculated as the average number of each
- instruction Group in a test sample of 1000 instructions
- 3) IOC and VIDC types remain Unknown at present
- 4) Checks are made for all processors known to date. ie. ARM 1,2 and 3
- 5) Interrupts and DMA requests are stopped whilst calculations are
- taking place
- 6) Looped instructions are calculated as one instruction of the specific
- Group + one Group 1 + one group 4 instruction
- 7) Instruction timings are calculated during Video Flyback, and are
- therefore dependant on the Video Flyback period and DRAM refresh
- (large modes with no vertical boarders will affect results)
- 8) Group 1a results on ARM 2's do not take account of the hardware bug
- (instructions take 24 S cycles rather than the maximum of 16)
- 9) Instruction indexes are relative to a perfect ARM 2 running at 8 MHz
- 10) FPU instruction speeds are calculated by either 3, 16 or 80
- instructions depending upon the instruction in question.
- 11) FPU instructions are calculated to within 167 nS, 31 nS or 6 ns +- 2%
- dependent upon the instruction
- 11) FPU indexes include both register values and immediate values in the
- form #1.0
- 12) FPU speed in FLOPS is calculated as the total number of instructions
- divided by the time taken, this does not take account of common
- instructions
- 13) All FPU calculations with the exception of STF and LDF are done in
- extended precision. STF and LDF are packed decimal precision
-
-
-
-
- Modifications to v1.00
- - Group 4 index
- - Looped instruction indexes
-
- Modifications to v2.00
- - FPU indexes
-
- Modifications to v3.00
- - Improved icon updating
-
- Modifications to v3.04
- - Check FPU/FPEmulator present
-
- Modifications to v3.07
- - Improved Group 4 looped instruction index
- - Improved FPU instruction timings
-
- Modifications to v3.09
- - Improved window handling
- - Modified bandwidth calculations for ARM 2 machines
-
-