Otherware/Otherware_1_SB_Development.iso/amiga/info/memhack.zoo/automeg.txt

Text File | 1990-02-08 | 13.5 KB | 225 lines

    How to Make Your PiggyBack RAM Expansion Auto-Configuring

            (c) 1986 by Dave Haynie
                CIS:    76703,2047
                Usenet: {allegra,caip,ihnp4}!cbmvax!daveh


    This article assumes that you have already made an addition of 512K
of RAM piggybacked on the existing video RAM of your Amiga.  An article and
drawings detailing this modification have been available in various places,
as written by Chris Erving.  I've looked over Mr. Erving's instructions, and
they are quite clear and appear to present no problems.  Although such an
addition does double the DC and capacitive loads on most of the video bus,
this is no big deal, since everything on the video bus is driven by at the
very least a standard "F" type gate, and in most cases an "F" type line
driver.  This also does not interfere with Expansion bus loading at all,
since the Expansion bus is electronically isolated from the video bus.  Of
course, the extra 1/2 Amp or so drawn by this extra 512K will affect the
Amiga's power budget, and this must be taken into account when any
Amiga-powered peripherals are added externally.  There are, however, a few
problems associated with Chris Erving's modification, specifically in the
physical location chosen to place this expansion memory.

WHY NOT JUST SETTLE FOR THE MODS I'VE GOT?

    The Erving modification locates the extra memory at $080000, the
start of the second block of RAM address space reserved for chip memory.
The rationale behind this is clear.  The Amiga has several PAL chips
programmed for various tasks.  The main address-decoding PAL only looks at
the three most significant bits of the 68000 address.  This is due to the pin
limitations of the PAL used.  Anyway, this results in a grain limitation of
2 megabyte boundaries thoughout the entire system.  The memory space at
$080000 is fully decoded for RAM operation, so with the addition of only the
A19 address line into an already existing multiplexer and set of decoders,
Chris Erving's modification gives you a functional extra 512K.

    The problem starts when the V1.2 system starts up.  V1.2 of the
Amiga OS has been designed to look for any memory located in the first
2 megabytes of 68000 address space.  Any memory found here is assumed to
be Chip memory.  Even though the current Amiga chipset can only address
512K of chip memory, the OS considers the possibility that a future
version of this chip set might be capable of addressing more.  So the
512K of memory that you get in Chris Erving's setup is in fact detected as
Chip memory, even though its not.  The memory is dangerous when considered
Chip memory, since a program may attempt to place a screen, image, or floppy
disk buffer in it, assuming that the chips have access to it.  When in fact
they don't.  So in order to use the Amiga with this memory added as such, its
necessary to run a program that will de-link the memory from the OS's list
of Chip memory locations, then link it into the OS's list of Fast memory
locations.

    Technically, this memory isn't Fast.  Its on the same physical
memory bus as the normal 512K of Chip memory is.  It shares refresh
with the normal Chip memory.  And if the custom chips demand more than
their half of the bus, as they do in very high resolution modes and in
some blitter modes, this new memory will generate wait states just as
would the built-in 512K.  The reason it must be called Fast memory is
that the Amiga OS only knows of two kinds of memory, Chip and Fast.  You
can easily crash the machine by calling non-Chip memory Chip memory.  So
any memory on the Amiga appears to the OS as Fast memory, even if its
no faster than the Chip memory.

THE CASE FOR AUTO-CONFIGURATION

    Anyway, back to the subject of the expansion RAM.  Most things that
you add-on to the Amiga support what's called "auto-configuration".  What
this means is that the Amiga can figure out what these devices do and assign
them areas of memory to run in, all without user intervention.  There's no
need to run the AddMem program with auto-configuration memory, since the
Amiga detects it while its starting up and links it into the Fast memory
list automatically.  If its not auto-configuring, you've got to do it
manually.  The consequences of this are a little worse than just having to
put the AddMem command in every Startup-Sequence.  First of all, some
programs don't let you write on them, they're got some weird copy protection
schemes.  But more important, during startup, lots of memory areas are
reserved by the Amiga OS.  If you have Fast memory available, these overhead
things are placed in Fast memory, otherwise they end up in Chip memory.  Any
Fast memory add later via AddMem is too late, the system is already set up
in Chip memory, which is always a more limited resource than Fast memory.
What my modifications do for you is make the 512K that you've added via the
Chris Erving piggy-back plan properly auto-configure under 1.2.  This isn't as
bad as it sounds, and only takes 2 common "F" series chips and some wiring on
your WCS daughterboard.  Which I'll get to soon.

    Now, you've probably heard something about 1.2 auto-configuration
circuitry.  Doesn't it require PALs and ROMs and things?  Well, normally.
But there's a hook built into 1.2 for cheap expansion memory that's perfectly
legal.  Previously I've mentioned the main address decoding PAL in the
Amiga, the one that's limited to a 2 megabyte decoding granularity.  Well,
it turns out that a stock Amiga has 2 megabytes, from $C00000 to $DFFFFF,
just for the 68000 memory image of the custom chip registers.  This is
obviously a lot of wasted address space for a few hundred chip registers,
especially considering that the OS only talks to these registers at the
end of this address space.  Under 1.2, RAM may be located starting at $C00000
and continuing up at least to $CFFFFF (1 megabyte).  The OS looks for it
here during system startup and will link anything found here into the
Fast RAM list, just as if it were normal autoconfig memory.

    What my circuit does for you is to fool the address decoding PAL into
thinking that the 68000 generated address range from $C00000-$C7FFFF is
actually in the range from $000000-$07FFFF, while selecting the bank of RAM
you've added with the A23 address line.  Thus, whenever the first 512K
starting at $C00000 is addressed by the 68000, the decoding PALs think that
its internal RAM, and decode RAM just as if it were built-in RAM, which is
what we want so that everything is handled just as it is with the first
512K of RAM.  Otherwise, the decoding PALs go on with business as usual.

    The "fooling" is done by feeding the DPALEN PAL on the daughterboard
a different A23 and A22 whenever we're in the proper range.  My circuit
(if you haven't printed it yet, now's a good time) takes the 68000 generated
A23 and A22 and selectively gates them to the DPALEN PAL.  At almost all
times, two AND gates pass A23 and A22 unmodified.  The rest of the circuit
detects the condition !(A23 * A22 * !A21 * !A20 * !A19), passing this signal
to the other half of each of these AND gates.  Thus, this detected address
range, $C00000-$C7FFFF, forces the output of both gates to 0, thus tricking
the DPALEN PAL into the mapping rules that apply in the lower part of
memory where RAM normally resides.

BUILD THE THING, ALREADY!

    Before you start, you'll need a bit more thin wire and two "F"
series parts, a 74F08 and a 74F10.  The 74F08 is a 14 pin, quad 2-input
AND gate, and the 74F10 is a triple, 3-input NAND gate.  The nice thing
about these F series parts is that each gate has a typical delay of about
2-3 nanoseconds, which really helps to eliminate timing problems.  You'll
of course need tools: screwdriver, needle-nose pliers, an X-Acto knife, and
a good soldering iron are very useful, and a buzz-o-meter or other form
of continuity tester is also a good thing to have with you.

    To start this modification, take your Amiga apart as before, being
sure to remember where everything goes.  Next, you'll be removing the
daughterboard, as before.  Providing you've made the Chris Erving piggyback
mods, you'll have a single wire from your added circuit up to the
daughterboard, connected to A19.  This is the only thing you're going to
change about the original circuit, and the only thing that you change on the
main PCB.  You can cut this off of the daughterboard as you're removing it,
leaving the other end of it connected to its place on the main board.  This
free end should now be connected to 68000 address line A23.  The A23 line
can be found as Pin 1 of what's called U5L or PALEN on the PCB.  This is
actually one of the tall headers for the daughterboard, though on a ROM
based Amiga this socket would contain the main board version of the address
decoding PAL.  Anyway, once this wire is soldered in place (shortening the
wire if at all possible), you've made your last main board connection.

    Now you'll be dealing exclusively with the daughter board.  The
daughter board I speak of is a 4-layer PCB labeled REV 3 on the back, up
at the end with all of the PALs.  This end is where most of the
modifications take place.  The first thing you've got to do is make some
cuts to the daughterboard.  This isn't quite as bad as it sounds, but it
does take some care.  Orient the PCB so that the PALs are all closest to
you (if you can't find the PALs, there are 4 of them, all 20 pin DIPs, and
each is labelled "PAL 16L8A" or something similar).  The DPALEN PAL will be
on your far right at "6N", right next to the "P" tower socket.  The first
two pins of the DPALEN PAL must be isolated from the corresponding pins of
the "P" socket; the easiest way to do this is to cut each pin at its base,
being careful to leave enough metal on each pin to later solder to.  Once
free, bend these up to be parallel with the plane of the PCB.  Next, find the
74F02 chip, called U5M on the PCB.  This chip is up 1 and slightly to the left
of the DPALEN PAL.  Cut pins 10, 11, and 12 away and up from the PCB as
before.  This NOR gate is used as an inverter on the PCB.  I use it in the
address detection circuit, and use a gate of my own to replace its inversion
function in the daughterboard circuit.

    Next thing to do is add the two "F" chips.  The best way I've found
of doing this is to take each chip in turn and bend up every pin except for
pins 7 and 14.  Then I've placed the 74F08 directly piggybacked on the 74F02
at U5M, in the same orientation, and soldered the untouched pins 7 and 14
to those of the 74F02, picking up ground and power, respectively.  Next to
the 'F02 is an 'LS393 at U5L;  I place the 74F10 on top of it very similarly.
Now comes the connection work.  First of all, two of the three gates in the
74F10 package will be used as inverters, so four pins can immediately be
tied up to power.  Connect pins 1, 2, 3, and 4 of the 'F10 to pin 14 of the
'F10.  One of the gates in the 'F08 is unused, I ground these pins.  Connect
pins 4 and 5 of the 'F08 to pin 7 of the 'F08.

    Now let's replace the stolen inverter from the daughterboard
circuit.  Connect pin 13 of the 'F10 to pin 10 of the 'F02 at U5M.  Now
find the chip at U2H, which is kind of in the middle at the far end of
the PCB.  This is an 'F257 chip.  Connect pin 10 of this chip back to the
'F10, at pin 13.  This now replaces the 'F02 gate which we will use soon.

    The original values of A23 and A22 must be brought into the 'F08
chip.  These can be found, intact, on the DAUGEN PAL at L6.  Connect pin 1
of the DAUGEN PAL to pins 1 and 9 of the 'F08, and then pin 2 of the DAUGEN
PAL to pins 2 and 12 of the 'F08.  The A21 signal is available on DAUGEN as
well; connect pin 3 of DAUGEN to pin 5 of the 'F10.  The final input signals
are A20 and A19; connect pin 18 of the DAUGEN PAL to the freed pin 12 of
the 'F02 at U5M, and connect pin 16 of the DAUGEN PAL to the freed pin 11 of
the 'F02.

    Coming out of this circuit are two signals, both of which go to
the freed pins of the DPALEN PAL.  Connect pin 8 of the 'F08 to the freed
pin 1 of the DPALEN PAL, and then connect pin 11 of the 'F08 to the freed
pin 2 of the DPALEN PAL.

    Now all that's left is interconnects.  Connect freed pin 13 of
the 'F02 to pin 11 of the 'F10.  Now connect pin 6 of the 'F10 to pin
10 of the 'F10, and then pin 3 of the 'F08 to pin 9 of the 'F10.  That's
the address detector, which is now wired to the AND gates; connect pin 8
of the 'F10 to pins 13 and 10 of the 'F08.  That's all there is.

    Make sure that all your wiring is correct; a visual inspection will
suffice, but if you have a buzz-o-meter, checking it that way is generally
more accurate.  The only pin that shouldn't be connected is pin 6 of the
'F08, which doesn't go anywhere, as that part of the 'F08 isn't being used
anywhere.  Once everything's done here, you should be able to replace the
daughterboard (be careful, its not as easy as it looks), then power up.
If you boot with 1.1, you'll have to AddMem starting at $C00000.  If you
boot with 1.2, your WorkBench screen should come up indicating
900000-something bytes free.


            Dave Haynie
    Home:        [phone]
    Work:        [phone] ext. 9816

** This article and the accompanying schematic drawing may be freely posted **
** on computer BBS systems, in Freely Redistributable software collections, **
** or given away for free (plus nominal copying charge).  Please ask me     **
** before you publish it in any sort of publication (I'll probably have no  **
** problem with it anyway), and please keep this distributed as a whole.    **