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mc68230clk.a
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1991-01-28
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8KB
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334 lines
nam clock
ttl Motorola MC68230 Clock Module with RTC72421 for ct68020 IORAM
* -----------------------------------------------------------------
* Edition History
* # Date Comments By
* -- -------- ------------------------------------------------ ---
* 06 86/11/18 upgraded to version 2.0 SMS
* <<<---- OS-9/68000 V2.0 Release ---->>>
* 07 87/03/23 Changed module attr to Supervisor State process wwb
* <<<---- OS-9/68000 V2.1 Release ---->>>
* 08 91/01/17 Changed to mc68230-PIT ggz
*
Edition equ 8 current edition number
Typ_Lang set (Systm<<8)+Objct System Object module
Rev equ 1
Attr_Rev set ((ReEnt+SupStat)<<8)+Rev Attributes and Revision
psect Clock,Typ_Lang,Attr_Rev,Edition,0,ClkEnt
use .../defs/oskdefs.d
use .../defs/systype.d
opt l
ttl definitions
pag
* -----------------------------------------------------------------
* definitions for the motorola mc68230 PIT
* -----------------------------------------------------------------
PITmult equ 2
TCR equ $10*PITmult
TIVR equ $11*PITmult
TCPR equ $12*PITmult
TCPRH equ $13*PITmult
TCPRM equ $14*PITmult
TCPRL equ $15*PITmult
TCNTR equ $16*PITmult
TCNTRH equ $17*PITmult
TCNTRM equ $18*PITmult
TCNTRL equ $19*PITmult
TSR equ $1a*PITmult
* -----------------------------------------------------------------
* equates for RTC 72421 used on ct68020
* defines mnemonics for register-offsets
* -----------------------------------------------------------------
rtcbase equ $1000 * base offset to PIT
rtcmult equ 2 * rtc-multiplicator for offsets
* equates for 'time' counters
S1 equ 0*rtcmult+rtcbase * seconds low (0-9)
S10 equ 1*rtcmult+rtcbase * seconds high (0-5)
MI1 equ 2*rtcmult+rtcbase * minutes low (0-9)
MI10 equ 3*rtcmult+rtcbase * minutes high (0-5)
H1 equ 4*rtcmult+rtcbase * hours low (0-9)
H10 equ 5*rtcmult+rtcbase * hours high
* equates for 'date' counters
DA1 equ 6*rtcmult+rtcbase * day low (0-9)
DA10 equ 7*rtcmult+rtcbase * day high (0-3)
MO1 equ 8*rtcmult+rtcbase * month low (0-9)
MO10 equ 9*rtcmult+rtcbase * month high (0-1)
Y1 equ 10*rtcmult+rtcbase * year low (0-9)
Y10 equ 11*rtcmult+rtcbase * year high
* equate for 'day of week' counter
W equ 12*rtcmult+rtcbase * day of week (0-6)
* equate for 'reset' counter ( in 'write' access )
CRESD equ 13*rtcmult+rtcbase *
CRESE equ 14*rtcmult+rtcbase *
CRESF equ 15*rtcmult+rtcbase *
* initialize for 10 ms intervals
* PIT address and counter value
*
tck1 equ (80000/32)-1 * number mpu cycles per tick
TicksSec equ 100 number of ticks per second
*ClkVect set 30 clock vector number (level 6 autovector)
*ClkPrior set 1 high polling table priority
PITtmode equ $a0 * vectored interrupt, periodic timer
ttl Clock Initialization
pag
* -----------------------------------------------------------------
* Subroutine ClkEntry
* Clock initialization entry point. If the month specified
* in the caller's register is zero, the system time and date
* is set from the clock/calendar chip. Otherwise, the chip is
* updated from caller's data.
* Passed: (a4)=current process descriptor
* (a5)=caller's registers ptr
* R$d0.l(a5)=Time (00hhmmss)
* R$d1.l(a5)=Date (yyyymmdd)
* (a6)=system global ptr
* (D_date information has already been set)
* Returns: cc=carry set, d1.w=error code if error
ClkEnt:
movea.l #ClkPort,a3 get the timer address
tst.w D_TckSec(a6) is clock already running?
bne.s ClkEnt10 skip clock init if so
move.w #TicksSec,D_TckSec(a6) set systems tick rate
move.b #TicksSec,D_Tick(a6) set tick = ticks/sec
moveq.l #ClkVect,d0 get vector number
moveq.l #ClkPrior,d1 get priority
lea ClkSrv(pc),a0 get address of service routine
OS9 F$IRQ put clock on polling table
bcs ClkEnt99 abort if error
* moveq.l #30,d0 * auto-vector level 6
* moveq.l #99,d1 * low priority for save
* lea ClkSrva(pc),a0 get address of service routine
* OS9 F$IRQ put clock on polling table
* bcs ClkEnt99 abort if error
move.b #ClkVect,TIVR(a3) * set vector number
lea TCPR(a3),a0
move.l #tck1,d1
movep.l d1,(a0)
move.b #PITtmode,TCR(a3) * set timer mode
ClkEnt10:
movem.l R$d0(a5),d0-d1 get time/date
tst.l d0 * if zero = then set from RTC
bne ClkEnt20 else get value and set the RTC
* d6.l =Time (00hhmmss)
* d7.l =Date (yyyymmdd)
bsr rtcgetdate
bsr rtcgettime
move.l d6,d0
move.l d7,d1
bra.s ClkEnt80
ClkEnt20: movem.l d0-d1,-(a7) save time/date
move.l d0,d6
move.l d1,d7 * saving
bsr rtcinit
bsr rtcputdate
bsr rtcputtime
movem.l (a7)+,d0-d1 restore time/date
ClkEnt80
move.l d1,D_Year(a6) set system gregorian date
OS9 F$Julian convert to julian date
move.l d1,D_Julian(a6) set julian date
neg.l d0
add.l #24*60*60,d0 convert to seconds until midnight
move.l d0,D_Second(a6) set julian time
addq.l #2,d1 adjust julian date for 0=Sunday to 6=Saturday
divu #7*256,d1 find day of week
* start of ed.8
clr.w d1 clear the quotient
swap d1 get the remainder
divu #7,d1 do the modulo now
clr.w d1 clear the quotient
swap d1 get the remainder
* end ed.8
addq.l #1,d1 adjust for clock chip
* move.b d1,Day(a3) set clock chip day of week
*
* now run
bset.b #0,TCR(a3) enable timer to operate
*
ClkEnt99 rts
ttl mc68230 timer interrupt service routine
pag
* -----------------------------------------------------------------
* Clock interrupt service routine
* Passed: (a2)=global static pointer
* (a3)=port address
* (a6)=system global data pointer
ClkSrv:
btst.b #0,TSR(a3) * causing IRQ?
* beq.s NotClk
move.b #1,TSR(a3) * clear interrupt
movea.l D_Clock(a6),a0 * jump to system clock routine
jmp (a0)
rts
NotClk ori #Carry,ccr return carry set
rts
ClkSrva:
btst.b #0,TSR(a3) * causing IRQ?
beq.s NotClk
move.b #-1,TSR(a3) * clear interrupt
movea.l D_Clock(a6),a0 * jump to system clock routine
jmp (a0)
rts
* -----------------------------------------------------------------
ttl RTC72421 routinen
pag
* -------------------------------------------------------------------------
* d6.l =Time (00hhmmss)
* d7.l =Date (yyyymmdd)
* now make date
rtcgetdate
move.w #1900,d7 * years are based 1900
move.b Y1(a3),d0
andi.l #$f,d0
move.b Y10(a3),d1
andi.l #$f,d1
mulu #10,d1
add.l d1,d0
add.w d0,d7
lsl.l #8,d7
move.b MO1(a3),d0
andi.l #$f,d0
move.b MO10(a3),d1
andi.l #$f,d1
mulu #10,d1
add.l d1,d0
add.w d0,d7
lsl.l #8,d7
move.b DA1(a3),d0
andi.l #$f,d0
move.b DA10(a3),d1
andi.l #$f,d1
mulu #10,d1
add.l d1,d0
add.w d0,d7
rts
* this was date
* -------------------------------------------------------------------------
rtcgettime
moveq #0,d6 * sweep reg
move.b H1(a3),d0
andi.l #$f,d0
move.b H10(a3),d1
andi.l #$3,d1 * nur 2 bit 10-er Std
mulu #10,d1
add.l d1,d0
add.w d0,d6
lsl.l #8,d6
move.b MI1(a3),d0
andi.l #$f,d0
move.b MI10(a3),d1
andi.l #$f,d1
mulu #10,d1
add.l d1,d0
add.w d0,d6
lsl.l #8,d6
move.b S1(a3),d0
andi.l #$f,d0
move.b S10(a3),d1
andi.l #$f,d1
mulu #10,d1
add.l d1,d0
add.w d0,d6
rts
* this was time
* -------------- rtc init ----------------------------------
*
rtcinit
* move.b #$c,CRESE(a3)
* move.b #4,CRESF(a3)
rts
* -------------------------------------------------------------------------
* d6.l =Time (00hhmmss)
* d7.l =Date (yyyymmdd)
rtcputtime
move.l d6,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,S10(a3)
swap d0
move.b d0,S1(a3)
lsr.l #8,d6
move.l d6,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,MI10(a3)
swap d0
move.b d0,MI1(a3)
lsr.l #8,d6
move.l d6,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,H10(a3)
swap d0
move.b d0,H1(a3)
rts
* -------------------------------------------------------------------------
* d6.l =Time (00hhmmss)
* d7.l =Date (yyyymmdd)
rtcputdate
move.l d7,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,DA10(a3)
swap d0
move.b d0,DA1(a3)
lsr.l #8,d7
move.l d7,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,MO10(a3)
swap d0
move.b d0,MO1(a3)
lsr.l #8,d7
move.l d7,d0
sub #1900,d0
andi.l #$ff,d0
divu.w #10,d0
move.b d0,Y10(a3)
swap d0
move.b d0,Y1(a3)
rts
* -----------------------------------------------------------------
ends