0461   r/w Extended NMI status/control register

                 bit 7 = 1  NMI pending from fail-safe timer (read only)
        bit 6 = 1  NMI pending from bus timeout NMI status (read
only)
        bit 5 = 1  NMI pending (read only)
        bit 4      reserved
        bit 3 = 1  bus timeout NMI enable (read/write)
        bit 2 = 1  fail-safe NMI enable (read/write)
        bit 1 = 1  NMI I/O port enable (read/write)
        bit 0      RSTDRV. bus reset (read/write)
              = 0  normal bus reset operation
              = 1  reset bus asserted

0462   w   Software NMI register. writing to this register causes an NMI
       if NMI's are enabled
        bit 7 = 1  generates an NMI

0464   r   bus master status latch register (slots 1-8). identifies the
       last bus master that had control of the bus
        bit 7 = 0  slot 8 had control last
        bit 6 = 0  slot 7 had control last
        bit 5 = 0  slot 6 had control last
        bit 4 = 0  slot 5 had control last
        bit 3 = 0  slot 4 had control last
        bit 2 = 0  slot 3 had control last
        bit 1 = 0  slot 2 had control last
        bit 0 = 0  slot 1 had control last

0465   r   bus master status latch register (slots 9-16)
        bit 7 = 0  slot 16 had control last
        bit 6 = 0  slot 15 had control last
        bit 5 = 0  slot 14 had control last
        bit 4 = 0  slot 13 had control last
        bit 3 = 0  slot 12 had control last
        bit 2 = 0  slot 11 had control last
        bit 1 = 0  slot 10 had control last
        bit 0 = 0  slot 9  had control last