ocr: TED REGISTER DESCRIPTION Internal Timers, Register 3 through 5 Ted Byte into 2, contains 8 inhibits bit three registers. 16 counting bit To until decrementing the initiate high a new Byte interval is court loaded. timers, value, each The loading timers partitioned the low decrement at a 894 KHZ rate for NTSC television systems, 884 KHZ for PAL systems. for Each writing counter to the generates timers an should interrupt be: upon decrementing to 0. The sequence Disable all interrupts Write low Byte Write high Byte Enable desired interrupts not Care occur should be between taken writing that lon ...
