ocr: 5.4 SIGNAL DESCRIPTION CLOCK ( FHI 0 ) - This is the dual speed system clock and is a standard TTL level input. ADDORESS RUS ( AO - A15) - TTL outrut. Carable of drivins 2 TTL load at 130 ef. DATA BUS ( Do - D7) - Bi-directional bus for transferrins data to and from the device and the Peripherals. The outputs are tri-state buffers capable of driving 2 standard TTL loads and 130pf. RESET - This ineut is used to reset or start the Uprocessor fron a Power dowri condition. During the tine that this line is held loui writing to or from the UProcessor 15 inhibited. Wher a Positive edse is detected o ...
