ocr: 2. SYSTEM ARCHITECTURE The Ted systed emrloys a shared bus concept which allows the video Processor and the microprocessor to access the same memory and I/0 devices on alternate halves of the systen clock. Bus access control is senerated by the 7360. To increase aicroprocessor throushput; wher this interleaving is not needed, the systen clock doubles in freauency and the microProccessor is allowed full time on the bus. This occurs when no video information is beins fetched by the 7360 (horizontal or vertical retracer blank screen), There is an exception to this; and that is when the 7360 IMA's ...
