ocr: MPS NMOS 6525 B. Lower priority interrupt received during activei interrupt When seiecting Mode 1,alli interrupt inpuls and 1E3, IE4 1.1 11 received and laiched. must be stable belore writing MCI bil to" "1." Ifthis can nott be 2.A1 is set and IAG activated low. ensured, the inlemupl latches PRC4PRCO shouid be 3. Processor reads AIR lo determine 11 is active. cleared by writing Oto PAC: alter MC-1 andt beloreunmask- 4.AIR pushed onto slack and IL1 cleared. ing the interupt atches. Similarly, il CA and cB are lo be SAIR cieared and IRO resel high. usedas data transfer handshake: nes,no PRAreacs ...
