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Text File  |  1993-04-21  |  776 b   |  26 lines
  1. /*
  2.  *    Ports and interrupts for the 68705u3 processor
  3.  */
  4.  
  5. /*    Port Data registers */
  6.  
  7. volatile static unsigned char    PADR @ 0x00;
  8. volatile static unsigned char    PBDR @ 0x01;
  9. volatile static unsigned char    PCDR @ 0x02;
  10. volatile static unsigned char    PDDR @ 0x03;
  11.  
  12. /*    Port Data Direction registers */
  13. /*    NOTE! These are write only */
  14.  
  15. static unsigned char        PADDR @ 0x04;
  16. static unsigned char        PBDDR @ 0x05;
  17. static unsigned char        PCDDR @ 0x06;
  18.  
  19. /*    Timer control registers */
  20.  
  21. static volatile unsigned char    TDR  @ 0x08;    /* Timer data register */
  22. static volatile unsigned char    TCR  @ 0x09;    /* timer control register */
  23.  
  24. static volatile unsigned char    MISC @ 0x0A;    /* int2 request/mask */
  25. static volatile unsigned char    PCR  @ 0x0B;    /* program control register */
  26.