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- ; eighty.asm
- ;---------------------------------------------
- ; Set 80 column RGB mode (Recover from forty)
- ;---------------------------------------------
-
- star = $0b00
- .wor star
- * = star
-
- colums = $00ee
- int0e = $170e
- chrout = $ffd2
- plot = $fff0
- primm = $ff7d
-
- jmp forty
- dw Date
-
- forty ldx #25 ; set pixels to double width
- jsr readrg
- and #%11101111
- sta vdc2
- ldy #0
- for0 lda vdctab,y
- iny
- ldx vdctab,y
- bmi for1
- iny
- jsr writrg
- jmp for0
-
- for1 sec
- jsr plot
- txa
- pha
- tya
- pha
- lda #79
- sta colums
- lda #19
- jsr chrout
- lda #19
- jsr chrout
- pla
- tay
- pla
- tax
- clc
- jsr plot
- ; lda #147
- ; jsr chrout
- ; lda #79
- ; sta colums
- ; jsr primm
- ; .asc 19,19,147,0
- jmp int0e
-
- ;-------------------------------------
- ;Table of VDC value,register to change
- ;-------------------------------------
- ; These are the power up values
-
- vdctab .byt 126, 0 ; total screen width in chars
- .byt 80, 1 ; 40 displayable chars per row
- .byt 102, 2
- .byt $47, 25
- .byt $78, 22 ; character horizontal size control
- .byt 0, 27 ; Address increment per row
- .byt 102, 2 ; horizontal sync
- vdc2 .byt 0, 25 ; mode control
- .byt $ff,$ff
-
- ;----------------------------------
- ; Subroutine: read VDC register .x
- ;----------------------------------
-
- readrg stx $d600
- rd bit $d600
- bpl rd
- lda $d601
- rts
-
- ;----------------------------------
- ; Subroutine: write VDC register .x
- ;----------------------------------
-
- writrg stx $d600
- wr bit $d600
- bpl wr
- sta $d601
- rts
-
- .end
-