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- title 'IORAM Drivers'
- ;----------------------------------------------------------------
- ; This module reads and writes to the mass memory board connected
- ; to a General Purpose port on CORE BOARD as sectors of 128 bytes.
- ;
- ; On entry,
- ;
- ; CUR$DMA = address to transfer to or from
- ; CUR$SEC = sector number to do I/O upon
- ;
- ; Written by Richard Holmes 24-05-86
- ; Last update by Richard Holmes 23-11-86
- ;----------------------------------------------------------------
- ;
- maclib z80
- maclib core ; Load true/false equates
- ;
- ;
- public in$ioram,rd$ioram,wr$ioram ; Entry points
- extrn cur$dma,cur$sec ; External variables
-
- ;
- ;
- me$msk equ 1000$0000b ; Master enable, 1 = board alive
- wr$msk equ 0100$0000b ; 1 = read
- hadlch equ 0010$0000b ; High address latch bit
- cslch equ 0001$0000b ; Chip select latch bit
- bs3 equ 0000$1000b ; Board select bit 3
- ;
- gp$base equ 04ch ; GP I/O port address base
- ;
- dat$prt equ gp$base ; Data port address
- adr$prt equ gp$base + 1 ; Low and latched address port
- cnt$prt equ gp$base + 2 ; Control port for the I/O Ram card
- mod$prt equ gp$base + 3 ; Mode port for the 8255
- ;
- rd$mod equ 090h ; 8255 mode to read the i/o ram board
- wr$mod equ 080h ; 8255 mode to write to i/o ram board
- ;
- ;--------------------------------
- ; Initialize the IORAM board
- ;--------------------------------
- ;
- in$ioram:
- mvi a,rd$mod
- out mod$prt ; Select read mode
- ; Clear the control port
- xra a
- out cnt$prt ; Send to the i/o ram control port
- ret
- ;
- ;----------------------------------------------------------------
- ; Read One Sector from the IO RAM board
- ;
- ; On entry,
- ;
- ; CUR$SEC = sector number to be read.
- ; CUR$DMA = system memory address to read into
- ;
- ; On exit
- ; All registers except A preserved
- ; Memory at DMA loaded from the IO memory board
- ;
- ;----------------------------------------------------------------
- ;
- rd$ioram:
- push h
- push b
- push d
- ; Select read mode.
- mvi a,rd$mod
- out mod$prt ; Read mode. A=in, B=C=outs
- ;
- ; Calculate and latch the chip select bits.
- ; For RAMS: chip to use is sector / 64
- ; ROMS: chip to use is sector / 256
- ;
- lhld cur$sec
- mov a,l
- ral ; gets top bit
- mov e,a ; Save to a temp
- mov a,h
- ral
- mov d,a
- ;
- mov a,e
- ral ; gets top bit
- mov a,d
- ral
- ani 0001$1111b ; Mask off control bits
- out adr$prt ; Send to address port
- ; Now latch in by raising high address momentarily
- mvi a,me$msk or cslch or bs3 ; Select the board
- out cnt$prt ; Latches
- mvi a,me$msk or bs3 ; Low again to finish latching
- out cnt$prt ; done
- ;
- ; Calculate the real address.
- ; Address = sector number * 128 = HL shl 7 bits
- ;
- mov a,h
- rar
- mov a,l
- rar
- mov d,a
- mov a,l
- rar
- mvi a,0
- rar ; Loads carry/top bit
- mov e,a ; DE = read address
- ; NOW, latch the high address
- mov a,d ; High address
- ani 0001$1111b ; Allow only 0..1FFFh address space
- ;
- out adr$prt ; Load the address onto the port
- mvi a,me$msk or hadlch or bs3 ; master enable and high addr
- out cnt$prt ; Latches
- mvi a,me$msk or bs3 ; Low again to finish latching
- out cnt$prt ; done
- ;
- ; OK, ready for data I/O
- ; Get ready for the data read.
- ;
- lhld cur$dma ; Data transfer address
- mvi b,128 ; Bits to transfer
- mvi c,dat$prt ; C = data port to read data from
- rd$loop:
- mov a,e ; Get address
- out adr$prt ; Send to low address port
- inr e ; -> next address and allow to settle
- ini ; Read port(C) into m(HL)
- jnz rd$loop ; Read next byte from port
- ; Disable board
- xra a
- out cnt$prt ; Deselects all boards in the system
- ;
- ; Restore registers and exit
- ;
- pop d
- pop b
- pop h
- ret
- ;
- ;
- ;----------------------------------------------------------------
- ; Write One Sector to the IO RAM board
- ;
- ; On entry,
- ;
- ; CUR$SEC = sector number to be write.
- ; CUR$DMA = system memory address to write from
- ;
- ; On exit
- ; All registers except A preserved
- ; Memory at DMA sent to the IO memory board
- ;
- ;----------------------------------------------------------------
- ;
- wr$ioram:
- push h
- push b
- push d
- ; Select read mode.
- mvi a,wr$mod
- out mod$prt ; Read mode. A=in, B=C=outs
- ;
- ; Calculate and latch the chip select bits.
- ; For RAMS: chip to use is sector / 64
- ; ROMS: chip to use is sector / 256
- ;
- lhld cur$sec
- mov a,l
- ral ; gets top bit
- mov e,a ; Save to a temp
- mov a,h
- ral
- mov d,a
- ;
- mov a,e
- ral ; gets top bit
- mov a,d
- ral
- ani 0001$1111b ; Mask off control bits
- out adr$prt ; Send to address port
- ; Now latch in by raising high address momentarily
- mvi a,me$msk or cslch or bs3 ; master enable and chip sel
- out cnt$prt ; Latches
- mvi a,me$msk or bs3 ; Low again to finish latching
- out cnt$prt ; done
- ;
- ; Calculate the real address.
- ; Address = sector number * 128 = HL shl 7 bits
- ;
- mov a,h
- rar
- mov a,l
- rar
- mov d,a
- mov a,l
- rar
- mvi a,0
- rar ; Loads carry/top bit
- mov e,a ; DE = read address
- ; NOW, latch the high address
- mov a,d
- ani 0001$1111b ; Allows only 0.1fffh address space
- ;
- out adr$prt ; Load the address onto the port
- mvi a,me$msk or hadlch or bs3 ; master enable and high addr
- out cnt$prt ; Latches
- mvi a,me$msk or bs3 ; Low again to finish latching.
- out cnt$prt ; done
- ;
- ; OK, ready for data I/O
- ; Get ready for the data read.
- ;
- lhld cur$dma ; Data transfer address
- mvi b,128 ; Bits to transfer
- mvi c,dat$prt ; C = data port to read data from
- ; Setup the low address then enable writes
- mov a,e
- out adr$prt
- mvi a,me$msk or wr$msk or bs3 ; Allow writing
- out cnt$prt ; done
-
- wr$loop:
- mov a,e ; Get address
- out adr$prt ; Send to low address port
- inr e ; -> next address and allow to settle
- ;
- outi ; Read port(C) into m(HL)
- jnz wr$loop ; Read next byte from port
- ; Disable board
- xra a
- out cnt$prt ; Deselects all boards in the system
- ;
- ; Restore registers and exit
- ;
- pop d
- pop b
- pop h
- ret
- ;
- ; ====++++====
- ;
- end
- ;