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Between Heaven & Hell 2
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rccl164
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1987-03-02
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2KB
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42 lines
/*
* RTC Version 2.0 Author : Vincent Hayward
* MAC 2.0 School of Electrical Engineering
* Purdue University
* Dir : h
* File : fifoio.h
* Remarks : Describes hardware address setting, bit definitions
* and software buffer structure.
* Usage : Included both in the lsi11 code and the vax interface code
*
* change : added DRC_ADDR (struct drcdevice *) 0165020
* 30 Oct 84 BUCK
*/
#ifdef PUMA
#define DRC_ADDR (struct drcdevice *) 0165000
#endif
#ifdef STAN
#define DRC_ADDR (struct drcdevice *) 0165020
#endif
#define DRC_INT 0001 /* Interrupt other cpu */
#define DRC_IEA 0100 /* INTER Enable */
#define FIFO_EMPTY 0200 /* REQ A line from user dev */
#define FIFOBUFS 63 /* hardware fifo capacity (minus wc) */
#define ID 0125252 /* lsi->vax test data */
#define OD 052525 /* vax->lsi test data */
#define NTEST 15 /* number of tests */
struct drcdevice { /* fifo interface */
short drccsr; /* control register */
short drcbuf; /* data register */
};
struct fifobuf { /* software buffer */
short wc; /* first word wc */
short data[FIFOBUFS]; /* rest data */
};