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Hráč 1997 February
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HRACI
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IS.RAR
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VGACARD.ID
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1996-01-25
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220 lines
;Identification file for Video Card detection, part of INTROSCOPE
;by Jan Gucik (c) 8, May, 1995
;Version 1.00 Beta Known: 138 Cards
;-----------------------------------
;PLEASE, SEND ME INFORMATION ABOUT RESULTS ON YOUR VIDEO CARD
;E-mail : jan.gucik@vslib.cz
;Command list
;------------
;OI(a,b,c):IndexPortOutB(a,b,c) II(a,b):Variable[Next]:=IndexPortInB(a,b)
;OP(a,b) :PortOutB(a,b) IP(a) :Variable[Next]:=PortInB(a)
;TM(a,b,c):Boolean:=TestIndexMask(a,b,c) TI(a,b):Boolean:=TestIndex(a,b)
;NM(a,b,c):Boolean:=Neg(TestIndexMask(a,b,c)) NI(a,b):Boolean:=Neg(TestIndex(a,b))
;TR(a,b) :Boolean:=TestRegister(a,b) NR(a,b):Boolean:=Neg(TestRegister(a,b))
;CP(a,b,c):ClearIndexPort(a,b,c) MP(a,b,c,d):ModifyIndexPort(a,b,c,d)
;SP(a,b,c):SetIndexPort(a,b,c) GB(a,b,s):Boolean:=GetBIOS(a,b,string)
;MB(a,b) :Variable[Next]:=Mem[a:b] MW(a,b):Variable[Next]:=MemW[a:b]
;
;#N[M] :if Variable[N]=M then True #N{M} :if Variable[N]<>M then True
;#N<K,L> :if Variable[N] in K..L then True
;
;#N(LOG,M):Variable[Next]:=Variable[N] LOG M
; LOG={AND,OR,XOR,NOT,SHR,SHL,PLS,MIN}
;
;VI(a) :Regs.AX:=a;INTR($10,Regs)
;OR(nX,a) :Regs.nX:=a; IR(nX):Variable[Next]:=Regs.nX
;OR(nL,a) :Regs.nL:=a; IR(nL):Variable[Next]:=Regs.nL
;
;ID(a) :ID number;
;
[VALUES]
;And now list of cards
;---------------------
[CIRRUS]
;Cirrus Cards 54xx, Tested CL-GD5420 r1,CL-GD5420,CL-GD5422,CL-GD5428
Cirrus CL-GD5402=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4[136];!
Cirrus CL-GD5402 r1=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4[137];!
Cirrus CL-GD5420=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4[138];!
Cirrus CL-GD5420 r1=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4[139];!
Cirrus CL-GD5422=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4<140,143>;!
Cirrus CL-GD5426=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4<144,147>;!
Cirrus CL-GD5424=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4<148,151>;!
Cirrus CL-GD5428=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4<152,155>;!
Cirrus CL-GD5434=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4[168];!
Cirrus CL-GD543x=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);#4<164,167>;!
Cirrus CL-GD54??=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);TI(974,9);!;ID(#4);
Cirrus CL-GD6205=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);NI(974,9);TI(964,25);#4(SHR,6);#5[0];!
Cirrus CL-GD6235=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);NI(974,9);TI(964,25);#4(SHR,6);#5[1];!
Cirrus CL-GD6215=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);NI(974,9);TI(964,25);#4(SHR,6);#5[2];!
Cirrus CL-GD6225=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);NI(974,9);TI(964,25);#4(SHR,6);#5[3];!
Cirrus AVGA (5402)=II(964,6);OI(964,6,0);II(964,6);#2[15];OI(964,6,18);II(964,6);#3[18];TM(964,30,63);II(980,39);NI(974,9);TI(964,25);!
;Cirrus Cards 64xx, Tested CL-GD6420
Cirrus CL-GD6440=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);#5[4];!
Cirrus CL-GD6412=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);#5[5];!
Cirrus CL-GD5410=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);#5[6];!
Cirrus CL-GD6420=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);#5[7];!
Cirrus CL-GD6410=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);#5[8];!
Cirrus CL-GD64??=II(974,10);OI(974,10,206);II(974,10);#2[0];OI(974,10,236);II(974,10);#3[1];II(974,170);#4(SHR,4);ID(#5);!
;Cirrus 5/600, Tested 510/520
Cirrus 510/520=II(964,6);II(CRT,12);OP(CR1,0);II(CRT,31);#3(SHR,4);#3(SHL,4);#4(OR,#5);OI(964,6,#6);IP(965);#7[0];OP(965,#3);IP(965);#8[1];#3[236];!;OI(CRT,12,#1);OI(964,6,#2);
Cirrus 610/620=II(964,6);II(CRT,12);OP(CR1,0);II(CRT,31);#3(SHR,4);#3(SHL,4);#4(OR,#5);OI(964,6,#6);IP(965);#7[0];OP(965,#3);IP(965);#8[1];#3[202];!;OI(CRT,12,#1);OI(964,6,#2);
Cirrus Video7 OEM=II(964,6);II(CRT,12);OP(CR1,0);II(CRT,31);#3(SHR,4);#3(SHL,4);#4(OR,#5);OI(964,6,#6);IP(965);#7[0];OP(965,#3);IP(965);#8[1];#3[234];!;OI(CRT,12,#1);OI(964,6,#2);
Cirrus 5/600 ????=II(964,6);II(CRT,12);OP(CR1,0);II(CRT,31);#3(SHR,4);#3(SHL,4);#4(OR,#5);OI(964,6,#6);IP(965);#7[0];OP(965,#3);IP(965);#8[1];OI(CRT,12,#1);OI(964,6,#2);ID(#3);
[TRIDENT]
;Trident Cards, Tested:TR8900C,TR9000,TR8900CL/D,TR9000i
Trident TR8800BR=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[1];!
Trident TR8800CS=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[2];!
Trident TR8900=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[3];!
Trident TR8900C=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[4];!
Trident TR8900C=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[19];!
Trident TR9000=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[35];!
Trident TR8900CL/D=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[51];!
Trident TR9000i=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[67];!
Trident TR8900CXr=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[83];!
Trident LCD9100B=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[99];!
Trident LX8200=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[131];!
Trident TVGA9200CXi=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[147];!
Trident LCD9320=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[163];!
Trident GUI9420=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[115];!
Trident GUI9420=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];#2(XOR,2);OP(965,#5);#1[243];!
Trident Unknown=OI(964,11,0);IP(965);II(964,14);OP(965,0);IP(965);#3(AND,15);OP(965,#2);#4[2];!;#2(XOR,2);OP(965,#5);ID(#1);
[OAK]
;OAK Cards, Tested 037C,077,087
OAK 087=TM(990,13,56);TM(990,35,31);II(990,0);#1(AND,2);#2[0];!
OAK 083=TM(990,13,56);TM(990,35,31);II(990,0);#1(AND,2);#2{0};!
OAK 067=TM(990,13,56);NM(990,35,31);IP(990);#1(SHR,5);#2[2];!
OAK 077=TM(990,13,56);NM(990,35,31);IP(990);#1(SHR,5);#2[5];!
OAK 057=TM(990,13,56);NM(990,35,31);IP(990);#1(SHR,5);#2[7];!
OAK 037C=TM(990,13,56);NM(990,35,31);IP(990);#1(SHR,5);#2[0];!
[COMPAQ]
;COMPAQ, Not yet tested
COMPAQ IVGS=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[3];!;OI(974,15,#1);
COMPAQ AVGS=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[5];!;OI(974,15,#1);
COMPAQ QVision 1024=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[6];!;OI(974,15,#1);
COMPAQ QVision 1080=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[14];II(974,86);#4(AND,4);#5{0};!;OI(974,15,#1);
COMPAQ QVision 1024=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[14];!;OI(974,15,#1);
COMPAQ AVPort=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);#3[16];!;OI(974,15,#1);
COMPAQ Unknown=II(974,15);OI(974,15,0);NI(974,69);OI(974,15,5);TI(974,69);II(974,12);#2(SHR,3);ID(#3);!;OI(974,15,#1);
[TSENG]
;Tseng Cards, Tested ET3000,ET4000W32,ET4000W32i,
Tseng ET3000=OP(959,3);OP(984,160);TR(973,63);NM(CRT,51,15);!
Tseng ET4000=OP(959,3);OP(984,160);TR(973,63);TM(CRT,51,15);NR(973,51);!
Tseng ET4000W32=OP(959,3);OP(984,160);TR(973,63);TM(CRT,51,15);TR(973,51);II(8570,236);#1(SHR,4);#2[0];!
Tseng ET4000W32i=OP(959,3);OP(984,160);TR(973,63);TM(CRT,51,15);TR(973,51);II(8570,236);#1(SHR,4);#2[3];!
Tseng ET4000W32p=OP(959,3);OP(984,160);TR(973,63);TM(CRT,51,15);TR(973,51);II(8570,236);#1(SHR,4);#2[2];!
[S3]
;Cards with chip S3, Tested 86c924,86c864,86c805,732
S3 86c911=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[129];!
S3 86c924/911A=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[130];!
S3 86c928 C=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[144];!
S3 86c928 D=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[145];!
S3 86c928 E=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1<148,149>;!
S3 86c801/5 A/B=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[160];!
S3 86c801/5 C=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1<162,165>;!
S3 86c801/5 D=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[165];!
S3 86c805=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[166];!
S3 86c928 PCI=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[176];!
S3 Vision 86c864=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[193];!
S3 Vision 86c864=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[192];!
S3-Trio 732=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);II(CRT,48);#1[225];!
S3 Unknown=OI(CRT,56,0);NM(CRT,53,15);OI(CRT,56,72);TM(CRT,53,15);!;II(CRT,48);ID(#1);
[YAMAHA]
;Yamaha Cards, Not yet tested
YAMAHA 6388=TM(980,124,124);!
[PRIMUS]
;Primus Cards, Not yet tested
PRIMUS P2000=TM(974,61,63);TR(982,31);TR(983,31);!
[HUALON]
;Hualon Cards, Not yet tested
Hualon HM86304=TR(964,231);TR(964,238);!
[AVANCE LOGIC]
;Avance Logic, Tested ALG 2301
Avance Logic AL 2101=II(980,26);CP(980,26,16);NI(980,25);SP(980,26,16);TI(980,25);TM(980,26,63);!;OI(980,26,#1);
Avance Logic ALG 2301=II(980,26);CP(980,26,16);NI(980,25);SP(980,26,16);TI(980,207);TM(980,26,63);!;OI(980,26,#1);
[REALTEK]
;Realtek Cards, Not yet tested
Realtek RT3103=TM(CRT,31,63);TR(982,15);TR(983,15);II(CRT,26);#1(SHR,6);#2[0];!
Realtek RT3105=TM(CRT,31,63);TR(982,15);TR(983,15);II(CRT,26);#1(SHR,6);#2[1];!
Realtek RT3106=TM(CRT,31,63);TR(982,15);TR(983,15);II(CRT,26);#1(SHR,6);#2[2];!
Realtek Unknown=TM(CRT,31,63);TR(982,15);TR(983,15);II(CRT,26);#1(SHR,6);ID(#2);!
[AHEAD]
;Ahead Cards, Tested Ahead B
Ahead A=II($3CE,15);OI($3CE,15,0);NM($3CE,12,$FB);OI($3CE,15,$20);TM($3CE,12,$FB);II($3CE,15);#2(AND,15);#3[0];!;OI($3CE,15,#1)
Ahead B=II($3CE,15);OI($3CE,15,0);NM($3CE,12,$FB);OI($3CE,15,$20);TM($3CE,12,$FB);II($3CE,15);#2(AND,15);#3[1];!;OI($3CE,15,#1)
Ahead Unknown=II($3CE,15);OI($3CE,15,0);NM($3CE,12,$FB);OI($3CE,15,$20);TM($3CE,12,$FB);II($3CE,15);#2(AND,15);ID(#3);!;OI($3CE,15,#1)
[CH&T]
;Chips&Technologies, Not yet tested
Chip&Tech 82c451=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[0];!
Chip&Tech 82c452=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[1];!
Chip&Tech 82c455=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[2];!
Chip&Tech 82c453=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[3];!
Chip&Tech 82c450=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[4];!
Chip&Tech 82c456=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[5];!
Chip&Tech 82c457=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[6];!
Chip&Tech F65520=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[7];!
Chip&Tech F65530=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[8];!
Chip&Tech F65510=VI(24320);IR(AL);#1[95];IR(BL);#2(SHR,4);#3[9];!
Chip&Tech Unknown=VI(24320);IR(AL);#1[95];!;IR(BL);#2(SHR,4);ID(#3);
[VIDEO7]
;Video 7, Not yet tested
VEGA_VGA=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5<32768,65535>;!
HT208 version 1-3=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5<28672,28927>;!
HT208 rev A=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5<28992,29007>;!
HT208 rev B=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(29009);!
HT208 rev CD=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(29010);!
HT216 rev BC=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(30560);!
HT216 rev D=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(30563);!
HT216 rev E=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(30564);!
HT216 rev F=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);#5(30565);!
HT216 Unknown=VI(28416);IR(BX);#1[28423];VI(28423);II(964,143);#2(SHL,8);II(964,142);#3(PLS,#4);ID(#5);!
[NCR]
;NCR, Not yet tested
NCR 77C22=TM(964,5,5);OI(964,5,0);NI(964,16);OI(964,5,1);TI(964,16);II(964,8);#1(SHR,4);#2[0];
NCR 77C21=TM(964,5,5);OI(964,5,0);NI(964,16);OI(964,5,1);TI(964,16);II(964,8);#1(SHR,4);#2[1];
NCR 77C22E=TM(964,5,5);OI(964,5,0);NI(964,16);OI(964,5,1);TI(964,16);II(964,8);#1(SHR,4);#2[2];
NCR 77C22E+=TM(964,5,5);OI(964,5,0);NI(964,16);OI(964,5,1);TI(964,16);II(964,8);#1(SHR,4);#2<8,15>;
NCR Unknown=TM(964,5,5);OI(964,5,0);NI(964,16);OI(964,5,1);TI(964,16);II(964,8);#1(SHR,4);ID(#2);
[UMC]
;UMC, Not yet tested
UMC=IP(959);OP(959,3);NI(964,6);OP(959,172);TI(964,6);!;OP(959,#1);
[MXIC]
;MXIC Chip, Not yet tested
MXIC MX86010=II(964,167);OI(964,167,0);NI(964,197);OI(964,167,135);TI(964,197);II(964,38);#2(AND,1);#3[0];!;OI(964,167,#1);
MXIC MX86000=II(964,167);OI(964,167,0);NI(964,197);OI(964,167,135);TI(964,197);!;OI(964,167,#1);
[PARADISE/WD]
;Paradise and Western Digital, Tested PVGA1A,WD90c00,WD90c31,WD90c24
Paradise PVGA1A=II(974,15);SP(974,15,23);NM(974,9,127);MP(974,15,23,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);NI(CRT,43);!;OI(980,41,#2);OI(974,15,#1);
WD90c00=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);NM(964,7,240);!;OI(980,41,#2);OI(974,15,#1);
WD90c22=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);NI(964,16);TM(CRT,49,104);!;OI(980,41,#2);OI(974,15,#1);
WD90c20A=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);NI(964,16);NM(CRT,49,104);TM(CRT,49,144);!;OI(980,41,#2);OI(974,15,#1);
WD90c20=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);NI(964,16);NM(CRT,49,104);NM(CRT,49,144);!;OI(980,41,#2);OI(974,15,#1);
WD90c24=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);#6[12852];!;OI(980,41,#2);OI(974,15,#1);
WD90c26=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);#6[12854];!;OI(980,41,#2);OI(974,15,#1);
WD90c30=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);#6[13104];!;OI(980,41,#2);OI(974,15,#1);
WD90c31=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);#6[13105];!;OI(980,41,#2);OI(974,15,#1);
WD90c33=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);#6[13107];!;OI(980,41,#2);OI(974,15,#1);
WD Unknown=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);TM(964,20,15);II(CRT,54);#3(SHL,8);II(CRT,55);#4(PLS,#5);ID(#6);!;OI(980,41,#2);OI(974,15,#1);
WD90c10=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);NM(964,20,15);NM(964,16,4);!;OI(980,41,#2);OI(974,15,#1);
WD90c11=II(974,15);SP(974,15,23);NM(974,9,127);OI(974,15,5);TM(974,9,127);II(CRT,41);MP(CRT,41,143,133);TI(CRT,43);OI(964,6,72);TM(964,7,240);TI(964,16);NM(964,20,15);TM(964,16,4);!;OI(980,41,#2);OI(974,15,#1);
[ATI]
;Not yet tested
ATI 18800=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$31];!
ATI 18800-1=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$32];!
ATI 18800-2=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$33];!
ATI 18800-4 Wonder+=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$34];!
ATI 18800-5 Wonder XL=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$35];!
ATI 68800 (Mach32)=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$61];!
ATI 68800 (Mach32)=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);#1[$62];!
ATI Unknown=GB($31,9,761295520);GB($40,2,31);MB($C000,$43);ID(#1);!
[GENOA]
;Not yet tested
Genoa 5100/5200=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);#6[$33];!
Genoa 5300/5400=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);#6[$55];!
Genoa 6100=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);#6[$22];!
Genoa 6200/6300=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);#6[$0];!
Genoa 6400/6600=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);#6[$11];!
Genoa Unknown=MW($C000,$37);MB($C000,#1);#2[$77];#1(PLS,2);MW($C000,#3);#4[$6699];#1[PLS,1];MB($C000,#5);ID(#6);!
[WEITEK]
;Not yet tested
Weitek=II($3C4,$11);OP($3C5,#1);OP($3C5,#1);IP($3C5);#2(OR,$20);OP($3C5,#3);NI($3C4,$12);II($3C4,$11);OP($3C5,#1);OP($3C5,#1);IP($3C5);#5(AND,$DF);TI($3C4,$12);TR($3CD,$FF);!;OI($3C4,$11,#1);