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- Path: comma.rhein.de!serpens!not-for-mail
- From: mlelstv@serpens.rhein.de (Michael van Elst)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: CHIP RAM speed test resul
- Date: 21 Mar 1996 21:55:28 +0100
- Organization: dis-
- Message-ID: <4isfo0$pfe@serpens.rhein.de>
- References: <64_5494@tna.nullnet.fi> <xR2rDMD0alz7@point86.people-s.people.de> <38233078@kone.fipnet.fi> <1549.6652T1430T1450@mbox.vol.it>
- NNTP-Posting-Host: serpens.rhein.de
-
- bizzetti@mbox.vol.it (Fabio Bizzetti) writes:
-
- >It would be much more wise to have dual port chipram, to write directly
- >(also bytes if needed) into chipram with no wait-states.
-
- There is no dual port RAM with no waitstates. If neither side
- is slowed down this is because the RAM had to be double speed.
- But if it is double speed you don't need a dual port RAM but
- just multiplex the bus (just like current chip ram).
-
- Regards,
- --
- Michael van Elst
-
- Internet: mlelstv@serpens.rhein.de
- "A potential Snark may lurk in every tree."
-