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- Path: felix.teclink.net!usenet
- From: rad@teclink.net (rad)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: Free Cycles
- Date: 21 Feb 1996 04:59:39 GMT
- Organization: TECLink Internet Services: info@TECLink.Net
- Message-ID: <1139.6624T1309T1361@teclink.net>
- References: <1996Feb15.170809.6386@imada.ou.dk>
- NNTP-Posting-Host: tc2_23.teclink.net
- X-Newsreader: THOR 2.22 (Amiga;TCP/IP) *UNREGISTERED*
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-
- Bjorn Reese <breese@imada.ou.dk> wrote:
- >tim bscke (azure@people-x.people.de) wrote:
- >> move.l (fast)+,(chip)+ ;18 cylces
- >> clr.l (chip)+ ;24(!!!) cycles
- >[...]
- >> Why ?? This seems to be really strange to me.. esp. the clr.l..
-
- >If my memory haven't betrayed me, clr reads the destination before
- >clearing it. So a clr makes two chip accesses. This behaviour is
- >also the reason why you should never use clr to clear a write-only
- >register.
-
- You are correct for the 68000. This is a good reason to stick with the 68010+
- (if not the 68020+) where the clr instruction doesn't have this drawback.
- Considering that the 68000's are only used in unaccelerated 500s, 600s and
- 2000s I don't think that's really problem.
-
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- - Richard Deken E-Mail: (personal) rad@teclink.net -
- - VLSI design engineer (AuE business) rad@aue.com -
- - Advanced Microelectronics PGP public key available -
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