home *** CD-ROM | disk | FTP | other *** search
- Path: comma.rhein.de!serpens!not-for-mail
- From: mlelstv@serpens.rhein.de (Michael van Elst)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: >>>>>>> The Future: Amiga goes PC (...aeh: "PowerMsPenti...?) <<<<<
- Date: 6 Jan 1996 16:32:19 +0100
- Organization: dis-
- Message-ID: <4cm4m3$1vs@serpens.rhein.de>
- References: <judas.0gku@tomtec.abg.sub.org> <30cb6ee7@lls.se> <judas.0gnh@tomtec.abg.sub.org> <38231725@kone.fipnet.fi> <judas.0gsz@tomtec.abg.sub.org> <38231776@kone.fipnet.fi> <judas.0gzs@tomtec.abg.sub.org> <742.6572T120T813@plea.se> <4cb7bm$84t@serpens.rhein.de> <judas.0h57@tomtec.abg.sub.org>
- NNTP-Posting-Host: serpens.rhein.de
-
- judas@tomtec.abg.sub.org (Th.Huber) writes:
-
- >The idea isn`t that bad at all. If you would attach a buffer which
- >caches writes to chipram, just like the second-level writebackcaches
- >found on PCs, this would be a gain in speed, when doing many writes
- >to chip.
-
- Sort of. A deep buffer would rule out reading from chip memory at
- the same time (because the chip bus is busy with writing). The A3000
- actually has a one word deep buffer to chip memory so that it is
- possible to do one bus access (to fast RAM) while the chip bus
- is busy writing the last word.
-
- But if you are going into hardware hacks I suggest to use 2-3 buffers
- and allow for double-CAS accesses for the CPU. This doubles bandwidth
- to chip memory. Such a system isn't that simple to build though
- and it would require lots of changes to the motherboard.
-
- On the other hand the blitter would become even slower compared to the CPU.
-
- Regards,
- --
- Michael van Elst
-
- Internet: mlelstv@serpens.rhein.de
- "A potential Snark may lurk in every tree."
-