OS/2 Shareware BBS: Science/Science.zip/PSPICEP2.ZIP/PARTS.HLP

Text File | 1990-01-23 | 35KB | 904 lines

$Revision:   1.1  $
$Author:   pwt  $
$Date:   12 Jun 1989  8:16:00  $

"Parts" on-line help file
Release 4.00, November 1988
(C) Copyright 1986, 1987, 1988 MicroSim Corporation
DMOD 1
Upper list (data sheet values):

    If1    forward current @ Vj1
    Vj1    forward voltage across junction for If1
    If2    forward current @ Vj2
    Vj2    forward voltage across junction for If2
    If3    forward current @ Vj3
    Vj3    forward voltage across junction for If3

Lower list (model parameters):

    IS    saturation current
    RS    series resistance
    IKF    high-injection "knee" current
    N    emission coefficient
    XTI    IS temperature coefficient
    EG    activation energy

This screen estimates the parameters IS and RS from two voltage & current
values.  The first pair (If1,Vj1) should be given at a low current value,
the second pair (If2,Vj2) should be given at a moderate current value (e.g.
where the increase in current quits being exponential), and the final pair
(If3,Vj3) should be given at a high current value (where the increase in
current is clearly resistive).  If you only have one data point, enter it as
all three value pairs: only IS will be estimated, using the current values for
RS and IKF.  Likewise, if you only have two data points, enter one as the
first value pair and enter the other as the remaining two value pairs: only
IS and RS will be estimated, using the current value for IKF.

It is possible to enter value pairs that will cause a negative value for RS, in
which case you will get an error message.  This means that the value pairs are
not realistic and you should change one of them.  Or, just set the value of RS
to a non-negative value.

The last three parameters, N, XTI, and EG, may be changed.  We have set
them to be normal values for silicon diodes.  For Schottky-barrier diodes these
may be changed to XTI = 2 and EG = 0.69, which will give better modeling over
temperature.
DMOD 2
Upper list (data sheet values):

    Cj1    junction capacitance @ Vj1
    Vj1    reverse voltage across diode (junction) for Cj1
    Cj2    junction capacitance @ Vj2
    Vj2    reverse voltage across diode (junction) for Cj2

Lower list (model parameters):

    CJO    zero-bias junction capacitance
    M    junction grading coefficient
    VJ    p-n potential
    FC    coefficient for onset of forward-bias depletion capacitance

This screen estimates the parameters CJO and M from a capacitance values given
at non-zero reverse biases (a zero value for Vj1 will work).  Enter the data
point with a lower reverse voltage for (Cj1,Vj1) and the other data point into
(Cj2,Vj2).  If you only have one data point, enter it as both value pairs: only
CJO will be estimated, using the current value for M.

The values for VJ and FC have been set to be normal for silicon diodes, but may
be changed.  VJ is taken into account when estimating CJO and M, so set its
value before completing the upper list (VJ has only slight effect).  The value
of FC is relatively unimportant as forward capacitance is dominated by
diffusion capacitance (and modeled by transit time).

The data sheets for most switching and power diodes have little detail about
reverse bias capacitance, because it is not too important.  Varicap diodes
usually have better, more complete information.  Be aware that the packages
diodes come in add some fixed amount of capacitance that is not included in
the device model, but may be included by the user with a small capacitor
across the diode.  Having determined the package capacitance, subtract that
from the total capacitance to model the diode junction.
DMOD 3
Upper list (data sheet values):

    Ir    reverse (leakage) current @ Vr
    Vr    reverse voltage for Ir

Lower list (model parameters):

    ISR    recombination current saturation value
    NR    recombination current emission coefficient

This screen derives the generation-recombination current values for the device
which, with the capacitance modeling (previous screen), provides the primary
leakage mechanism of the diode junction.  Enter the value pair.

Reverse current leakage is increased by imperfections in manufacturing which
are not modeled.  Beakdown also increases reverse current, but this is modeled
in the next screen.
DMOD 4
Upper list (data sheet values):

    Vz    nominal Zener voltage @ Iz
    Iz    nominal Zener current for Vz
    Zz    Zener impedance (resistance) @ Vz,Iz

Lower list (model parameters):

    BV    reverse breakdown voltage (a positive value)
    IBV    reverse breakdown current (a positive value)

This screen estimates the parameters BV and IBV for reverse breakdown
operation, which is how voltage regulator (Zener or avalanche) diodes work.
Enter the values for Vz, Iz, and Zz.

BV and IBV will nearly equal Vz and Iz.  As the breakdown effect is modeled
by an exponential function, the value of BV and IBV will adjust so that device
impedance, Zz (ratio of the change in voltage to the change in current) is
correct at Vz,Iz.
DMOD 5
Upper list (data sheet values):

    Trr    reverse recovery time
    Ifwd    forward current (before switching)
    Irev    initial reverse current
    Rl    load resistance (total load of test fixture)

Lower list (model parameters):

    TT    transit time

This screen estimates the parameter TT from switching time.  Enter values for
the upper list.  Be sure to include the test fixture resistance and pulse
generator resistance in Rl.

The screen does a transient simulation of the diode switching.  Some of the
parameters from earlier screens that have dynamic effects, for example CJO,
are included in the simulation.  You may need to adjust the X-axis to see the
entire waveform.
QMOD 1
Upper list (data sheet values):

    Vbe    base-emitter voltage @ Ib (device in saturation)
    Vce    collector-emitter voltage (device in saturation)
    Ib    base current for Vbe and Vce
    Ib%    fraction of Ib (not a data sheet value)

Lower list (model parameters):

    IS    saturation current
    XTI    temperature coefficient for IS
    EG    activation energy

This screen estimates the parameter IS from the saturation characteristics of
the transistor.  IS is a semiconductor junction parameter and should not be
confused with the collector current in saturation.  The data sheet will have
values or curves for Vbe and Vce in a "forced beta" (where the ratio Ic/Ib is
much lower than the normal current gain) or "saturated" condition.  Enter
values of Vbe and Vce for the same Ib.

The value of %Ib is a "fudge" value, and is not critical.  It factors how much
of the base current will be shunted through the ideal diode of the Gummel-Poon
transistor model.  We have set it to a "normal" amount.

Obtaining an accurate value for IS is not critical, since other parameters will
be set relative to IS and only the ratio between values will be important.  It
is necessary, though, to not have a wildly inaccurate value.  The last two
parameters, XTI, and EG, may be changed.  We have set them to be normal values
for silicon transistors.

The display graphs for this screen are not too useful.  However, they do let
you know something is happening.
QMOD 2
Upper list (data sheet values):

    hoe    small-signal open-circuit output admittance @ Vce,Ic
    Vce    collector-emitter voltage for hoe
    Ic    collector current for hoe

Lower list (model parameters):

    VAF    forward Early voltage

This screen estimates the parameter VAF, which sets the output conductance of
the transistor in a common emitter configuration.  Enter the values for hoe,
Vce, and Ic.  If there is a choice, use an operating point with relatively low
collector current.

The parameter VAF controls one aspect of base-width modulation in the Gummel-
Poon transistor model.  This manifests itself as output conductance.  Typical
values are 50-to-100 volts for normal transistors, and 1-to-10 volts for super-
beta transistors.
QMOD 3
Upper list (data sheet values):

    hFE1    forward DC beta @ Ic1
    Ic1    collector current for hFE1 (low value)
    hFE2    forward DC beta @ Ic2
    Ic2    collector current for hFE2 (medium value)
    hFE3    forward DC beta @ Ic3
    Ic3    collector current for hFE3 (@ maximum beta)
    Vce    collector-emitter voltage for above values

Lower list (model parameters):

    BF    ideal maximum forward beta
    NE    non-ideal base-emitter diode emission coefficient
    ISE    non-ideal base-emitter diode saturation current
    IKF    forward beta roll-off "knee" current
    XTB    forward beta temperature coefficient

This screen estimates parameters for the celebrated Gummel-Poon bipolar
transistor model.  Three beta & current value pairs are required, and a
collector voltage.  The first pair (hFE1, Ic1) should be for low current
operation.  The second pair (hFE2,Ic2) should be for medium current but where
the DC beta is still increasing with collector current.  The third pair
(hFE3,Ic3) should be for the current with maximum DC beta.  For best results
use hFE1 < hFE2 < hFE3 and Ic1 << Ic2 << Ic3.  Enter the value pairs.  The
value Vce adjusts the beta data for base-width modulation effects.

Sometimes it will be impossible match all of the value pairs, because the third
value for hFE is too high relative to slope between the first two values.  The
beta curve will fall below the value specified for hFE3.  Assuming hFE3 is
correct, try increasing hFE2 some, or decreasing hFE1 some.

Transistor data sheets usually show minimum beta values, and have a maximum
value for only one collector current value.  One way to obtain an average value
is to use the current level that specifies both minimum and maximum beta, and
use a value somewhat below the average of the minimum and maximum.  Then ratio
the other minimum values by the same amount.  Or, just use the curves (if
available) from the data sheet.

The value for XTB has been set to be normal for bipolar transistors, but may be
changed.  Add another temperature curve to see how XTB changes beta vs.
temperature.
QMOD 4
Upper list (data sheet values):

    Vce    collector-emitter voltage @ Ic
    Ic    collector current for Vce
    Ic/Ib    "forced beta" ratio

Lower list (model parameters):

    BR    ideal maximum reverse beta
    NC    non-ideal base-collector diode emission coefficient
    ISC    non-ideal base-collector diode saturation current
    IKR    reverse beta roll-off "knee" current
    RC    series collector resistance

This screen estimates more parameters for the Gummel-Poon transistor model.
Actually, only BR is estimated from one saturation voltage.  Enter values for
Vce and Ic.  Also, check/enter the value for the "forced beta" ratio of
collector to base current.

The reverse Gummel-Poon parameters correspond to the forward parameters, except
they are for reverse operation (emitter swapped with the collector).  It would
be more accurate to obtain these the way as the forward parameters, but reverse
operation is rarely published data.  Fortunately, it does not effect operation
when the transistor is saturated, that is when the base-collector junction is
forward biased.

All parameters other than BR have been set to ideal values, so they do not
affect transistor operation.  You may change them, of course.  For instance,
you could use the same values as for the forward parameters.  Increasing ISC
will lift the low-current end of the curve.  Increasing RC will lift the high-
current end of the curve.  Enter new values in the lower list, then repeat one
of the values in the upper list to re-estimate BR.
QMOD 5
Upper list (data sheet values):

    Cobo1    open circuit output capacitance @ Vcb1
    Vcb1    reverse voltage collector-base junction for Cobo1
    Cobo2    open circuit output capacitance @ Vcb2
    Vcb2    reverse voltage collector-base junction for Cobo2

Lower list (model parameters):

    CJC    zero-bias collector-base junction capacitance
    MJC    collector-base junction grading coefficient
    VJC    collector-base junction potential
    FC    coefficient for onset of forward-bias depletion capacitance

This screen estimates the parameters CJC and MJC from a capacitance values
given at non-zero reverse biases (a zero value for Vcb1 will work).  Enter the
data point with a lower reverse voltage for (Cobo1,Vcb1) and the other data
point into (Cobo2,Vcb2).  If you only have one data point, enter it as both
value pairs: only CJC will be estimated, using the current value for MJC.

The values for VJC and FC have been set to be normal for silicon transistors,
but may be changed.  VJC is taken into account when estimating CJC and MJC, so
set its value before completing the upper list (VJC has only slight effect).
The value of FC is relatively unimportant as forward capacitance is dominated
by diffusion capacitance (and modeled by transit time).

Be aware that the packages transistor come in add some fixed amount of
capacitance that is not included in the device model, but may be included by
the user with a small capacitor across the junction.  Having determined the
package capacitance, subtract that from the total capacitance to model the
junction.
QMOD 6
Upper list (data sheet values):

    Cibo1    open circuit input capacitance @ Veb1
    Veb1    reverse voltage emitter-base junction for Cibo1
    Cibo2    open circuit input capacitance @ Veb2
    Veb2    reverse voltage emitter-base junction for Cibo2

Lower list (model parameters):

    CJE    zero-bias emitter-base junction capacitance
    MJE    emitter-base junction grading coefficient
    VJE    emitter-base junction potential

This screen estimates the parameters CJE and MJE from a capacitance values
given at non-zero reverse biases (a zero value for Veb1 will work).  Enter the
data point with a lower reverse voltage for (Cibo1,Veb1) and the other data
point into (Cibo2,Veb2).  If you only have one data point, enter it as both
value pairs: only CJE will be estimated, using the current value for MJE.

The values for VJE has been set to be normal for silicon transistors, but may
be changed.  VJE is taken into account when estimating CJE and MJE, so set its
value before completing the upper list (VJE has only slight effect).

Be aware that the packages transistor come in add some fixed amount of
capacitance that is not included in the device model, but may be included by
the user with a small capacitor across the junction.  Having determined the
package capacitance, subtract that from the total capacitance to model the
junction.
QMOD 7
Upper list (data sheet values):

    ts    storage time (not "shelf life")
    Ic    collector current for ts
    Ic/Ib    "forced beta" ratio

Lower list (model parameters):

    TR    reverse transit time

This screen estimates the parameter TR, which controls the delay until the
transistor leaves saturation when switching off.  Enter the values for ts, Ic
and check/enter a value for the "forced beta" ratio when the transistor was on
and saturated.

The storage time curve is controlled by the forward and reverse beta
characteristics of the transistor.  The parameter TR acts like a multiplying
factor, without changing the character of the curve.  Use the storage time for
the collector current range you are interested in.
QMOD 8
Upper list (data sheet values):

    fT    frequency at which small-signal forward current transfer ratio
        extrapolates to unity
    Ic    collector current for fT
    Vce    collector-emitter voltage for fT

Lower list (model parameters):

    TF    forward transit time
    ITF    current for TF dependency on Ic
    VTF    voltage for TF dependency on Vce
    XTF    coefficient for TF dependency on Vce

This screen estimates the parameter TF, which, along with collector-base
capacitance, limits high-frequency gain.  Enter values for fT, Ic, and Vce.

The value of TF also controls rise/fall times in switching circuits, which is
another way to measure transistor speed, though we haven't thought of a
rule-of-thumb conversion between rise/fall time and high-frequency cutoff.

All parameters other than TF have been set to ideal values, so they do not
affect transistor operation.  You may change them, of course.  They are
designed to reduce high-frequency gain with increasing current.  We suggest
the following values:

    ITF    10mA to 1A
    VTF    5V to 50V
    XTF    2

Enter the values you want to try, then re-enter one value in the upper list,
for example VCE, to re-estimate TR and get a new graph.  Also, it is sometimes
helpful to set-up traces for a few values of Vce (use "Trace" command) for
adjusting VTF.
JMOD 1
Upper list (data sheet values):

    gFS    forward transconductance @ Id
    Id    drain current for gFS

Lower list (model parameters):

    BETA    transconductance coefficient
    BETATCE    temperature coefficient for BETA
    RD    drain resistance
    RS    source resistance

This screen estimates the parameter BETA, which sets the change in drain
current vs. gate-source voltage.  BETATCE is set manually, using traces at
other temperatures to judge the effect (the default setting is a nominal value
chosen from inspecting many data sheets).  RD and RS are set manually, if
desired (these are usually negligible).
JMOD 2
Upper list (data sheet values):

    gOS    output conductance @ Id
    Id    drain current for gOS

Lower list (model parameters):

    LAMBDA    channel-length modulation

This screen estimates the parameter LAMBDA, which sets the slope of the drain
current vs. drain-source voltage in saturation.
JMOD 3
Upper list (data sheet values):

    Id    drain current @ Vgs
    Vgs    gate-source voltage for Id
    Vds    drain-source voltage for Id

Lower list (model parameters):

    VTO    threshold voltage
    VTOTC    temperature coefficient for VTO

This screen estimates the parameter VTO, which is the threshold ("pinchoff")
voltage.  VTOTC is set manually, using traces at other temperatures to judge
the effect (the default setting is a nominal value chosen from inspecting many
data sheets).

Note: the SPICE "standard" is for VTO to be a negative value for a depletion
transistor, regardless of device type (NJF or PJF).
JMOD 4
Upper list (data sheet values):

    Crss1    reverse transfer capacitance @ Vgs1
    Vgs1    gate-source voltage for Crss1
    Crss2    reverse transfer capacitance @ Vgs2
    Vgs2    gate-source voltage for Crss2
    Vds    drain-source voltage for Crss1 and Crss2

Lower list (model parameters):

    CGD    zero-bias gate-drain capacitance
    M    junction grading factor
    PB    built-in potential
    FC    forward-bias coefficient

This screen estimates the parameters CGD and M.  The value for Crss1 should be
greater than Crss2 (if they are equal, and Vgs1 and Vgs2 are equal, then only
CGD will be estimated using the current value of M).  The reverse transfer, or
"Miller", capacitance is modeled well by just CGD and M.  The value PB may be
set manually, and changes the curvature of the capacitance curve slightly.

The parameter FC applies to forward-biased junctions and is included for
completeness.
JMOD 5
Upper list (data sheet values):

    Ciss    input capacitance @ Vgs
    Vgs    gate-source voltage for Ciss
    Vds    drain-source voltage for Ciss

Lower list (model parameters):

    CGS    zero-bias gate-drain capacitance

This screen estimates the parameter CGS, which is derived from Ciss - Crss.
Accordingly, this screen depends on the previous screen.
JMOD 6
Upper list (data sheet values):

    Igss    gate leakage current @ Vdg
    Vdg    drain-gate voltage for Igss

Lower list (model parameters):

    IS    junction saturation current
    ISR    recombination current saturation value
    N    junction emission coefficient
    NR    recombination current emission coefficient
    XTI    IS temperature coefficient

This screen derives the generation-recombination current values for the device
which, with the capacitance modeling (previous screens), provides the primary
leakage mechanism of the device's junction.  Enter the value pair.

Passive reverse current leakage is increased by imperfections in manufacturing
and breakdown, which are not modeled.
JMOD 7
Upper list (data sheet values):

    Ig1    gate leakage current @ Vdg1
    Vdg1    drain-gate voltage for Ig1
    Ig2    gate leakage current @ Vdg2
    Vdg2    drain-gate voltage for Ig2
    Id    drain current

Lower list (model parameters):

    ALPHA    impact ionization coefficient
    VK    ionization "knee" voltage

This screen estimates active gate current, when the JFET is on, which may be
much larger than when the JFET is cutoff.  Two data points are required, the
first (Ig1,Vdg1) at a lower value for Vdg where the gate current is becoming
exponential.  The other (Ig2,Vdg2) is for a higher value of Vdg.  Id specifies
the drain current at which the two data points are taken.

Impact ionization by drain-current carriers generate carriers in the gate
space-charge region, which get swept out through the gate.  This causes gate
current which is an exponential function of drain voltage, and proportional
to drain current.

Note that the lowest values of active leakage current are generally less than
the passive leakage values (previous screen); this is because the passive
values are measured with source and drain shorted together, which usually
doubles the junction area and thus the current.  Active leakage current occurs
in the drain-gate junction, only, so the lowest levels represent passive
leakage for that junction.
JMOD 8
Upper list (data sheet values):

    en    equivalent input noise voltage (in volts/root-hertz) @ Freq
    Freq    frequency for en
    Ids    drain current for en

Lower list (model parameters):

    KF    flicker noise coefficient
    AF    flicker noise exponent

This screen estimates the parameter KF, to set the correct amount of flicker
noise.  AF may be set manually, but is normally close to 1.  The broadband
noise of a JFET is "shot" noise, and is set by the conductance of the channel.
PWRMOS 1
Upper list (data sheet values):

    gFS1    forward transconductance @ Id1
    Id1    drain current for gFS1 (low value)
    gFS2    forward transconductance @ Id2
    Id2    drain current for gFS2 (high value)

Lower list (model parameters):

    RS    source ohmic resistance
    KP    transconductance
    W    channel width
    L    channel length

This screen estimates the basic geometry of the power MOSFET, its conductance
parameter, and high-current effects of series resistance in the device.  Enter
the two points for gFS, making sure gFS1 is taken at a low current and gFS2 is
at a high current.

Many general assumptions are made about the device structure (such as oxide
thickness), but the model will remain accurate in spite these assumptions.
The transconductance would ideally increase proportional to the square-root
of the drain current, but is limited by the effects of RS.
PWRMOS 2
Upper list (data sheet values):

    Id    drain current @ Vgs
    Vgs    gate-source voltage for Id

Lower list (model parameters):

    VTO    zero-bias threshold voltage

This screen estimates the device threshold voltage.  Enter a the values for
drain current and gate-source voltage.

The actual value of VTO is not so important as obtaining a good value of drain
current vs. Vgs as the device will be used.  For library use, use a drain
current about one-half the maximum continuous rating.
PWRMOS 3
Upper list (data sheet values):

    Rds    static drain-source on-state resistance @ Vgs,Id
    Vgs    gate-source voltage for Rds
    Id    drain current for Rds

Lower list (model parameters):

    RD    ohmic drain resistance

This screen estimates the "on-resistance" of the device.  Enter the values for
the upper list.

The MOS model has three contributions to the "on-resistance": the channel
resistance of the device, and an ohmic resistance in series with each the
source and the drain.  This screen adjusts RD so the total resistance is
correct.  However, RD cannot become negative.
PWRMOS 4
Upper list (data sheet values):

    Idss    zero gate voltage drain current @ Vds
    Vds    drain-source voltage for Idss

Lower list (model parameters):

    RDS    drain-source shunt resistance
        (PSpice extension of U.C.Berkeley SPICE MOS model)

This screen estimates the drain-source leakage of the device.  This leakage is
due primarily to surface effects, and is modeled by a shunt drain-source
resistance.  Enter the values for the upper list.
PWRMOS 5
Upper list (data sheet values):

    Ciss    input capacitance @ Vds
    Coss    output capacitance @ Vds
    Crss    reverse transfer capacitance @ Vds
    Vds    drain-source voltage for Ciss, Coss, and Crss

Lower list (model parameters):

    CBD    zero-bias bulk-drain junction capacitance
    PB    bulk junction potential
    MJ    bulk junction grading coefficient
    FC    bulk junction forward-bias capacitance coefficient

This screen estimates the output capacitance of the device.  Enter the values
for the upper list.

The output capacitance is usually not critical, being small enough when
compared with the load currents that are controlled by the device.
PWRMOS 6
Upper list (data sheet values):

    Qg    total gate charge to switch load, Id, using supply, Vdd
    Qgs    gate-source charge to start switching
    Vdd    supply voltage for Qg
    Id    load (drain) current

Lower list (model parameters):

    CGSO    gate-source overlap capacitance
    CGDO    gate-drain overlap capacitance

This screen estimates the device stray capacitances associated with the gate.
These capacitances, along with the channel capacitance, make up the amounts of
charge required to switch the device.  Enter the values for the upper list.

The value Qgs is the amount charge required to raise the gate-source voltage
from zero to threshold, Vto.  Qg is the total charge to complete the switching
of the load current.  The difference of these charges is due to "Miller", or
gate-drain, capacitance.

Note that the values of CGSO and CGDO are multiplied by the channel width to
yield the actual value of the capacitance.
PWRMOS 7
Upper list (data sheet values):

    tf    fall time for switching load, Id, using supply, Vdd
    Id    load (drain) current for tf
    Vdd    supply voltage for tf
    Zo    input generator impedance

Lower list (model parameters):

    RG    gate ohmic resistance
        (PSpice extension of U.C.Berkeley SPICE MOS model)

This screen estimates the value of series gate resistance from switching time.
Enter the values for the upper list.

Most power MOSFET devices use a self-aligned process with polysilicon gate
material.  The polysilicon impedes the gate current, reducing the charging
rate of the gate, which increases the turn-on time.  While there are many
switching times specified (turn-on delay, rise time, etc.) they are all
related by the parasitic capacitances, which have already been determined in
the "gate charge" screen.  Only the series resistance needs to be determined,
which can be done reliably with the fall time characteristic.

Note that "fall time" means the period in which the drain current is "falling"
in value, not the output voltage.
PWRMOS 8
Upper list (data sheet values):

    Vsd    diode (source-drain) forward voltage @ Idr
    Idr    reverse drain current for Vsd

Lower list (model parameters):

    IS    bulk junction saturation current
    N    bulk junction emission coefficient

This screen estimates the forward voltage drop of the "body" diode.  Enter the
values for reverse ("free-wheeling current") conduction.

The actual value of IS is not so important as obtaining a good value of
voltage drop vs. current as the device will be used.  For library use, use a
current about one-half the maximum continuous rating.

For some high-voltage P-channel devices, it may be necessary to set the value
of N (lower list) directly to 2 or 3.  This gives the effect of multiple
junctions in series, thus a higher voltage drop across the junction.  Parts
does not estimate N ... you have to set it.
OPAMP 1
Upper list (data sheet values):

    +Vpwr    positive power supply
    -Vpwr    negative power supply
    +Vout    maximum positive output swing
    -Vout    maximum negative output swing
    +SR    positive-going slew-rate limit
    -SR    negative-going slew-rate limit
    Pd    quiescent power dissipation

Lower list (macromodel internal parameter):

    VC    output limiter offset (to Vcc)
    VE    output limiter offset (to Vee)

This screen sets the value of output voltage limiters, but also gathers
information that will be useful in later screens.  The graph shows the largest
amplitude output a sinewave signal can be, for a given frequency, to have no
distortion.  This is limited by the amplifier's output swing and slew-rate.

About power supply values: these are the data sheet values used in conjunction
with the maximum output values, and are not the power supply values for the
circuit simulation (which may be different).  The opamp model limits the
output swing by an amount relative to the power supply, so the output swing
limit will track the power supply in the simulation.

About slew-rates: since Parts uses primary units (e.g., volts, amps, farads,
etc.) the variety of ways of spec'ing slew-rate need to be converted to
volts/second.  For example, 5V/uS is 5,000,000V/S.
OPAMP_B 2
Upper list (data sheet values):

    Cc    compensation capacitor
    Ib    input bias current
    Av-dc    open-loop gain (DC)
    f-0db    unity gain frequency
    CMRR    common-mode rejection ratio

Lower list (macromodel internal parameter):

    BF    input transistor beta
    C2    compensation capacitor
    CEE    slew-rate limiting capacitor
    GA    interstage transconductance
    GCM    common-mode transconductance
    IEE    input stage current
    RC    input stage load resistance
    RE    input stage emitter resistance
    REE    input stage current source output resistance
    RP    power dissipation

This screen completes the input stage and inner stage.  The compensation
capacitor value (Cc) is sometimes available on the data sheet in the circuit
diagram of the op-amp.  If not, 20-to-30pF is a fair value.  For op-amps with
external compensation, use one of the values on the data sheet for the external
capacitor.  Then, be sure to use that value for the other input data.

About open-loop gain: this is a ratio of input/output signal, i.e. small-
signal amplification.  Being a pure number it has no units.  If the gain is
spec'd as 90db, put in 90db (Parts converts x-db to 10^(x/20) ).

About unity gain frequency: this frequency is the intersection of a straight-
line extension of the mid-band, open-loop, gain roll-off the unity gain (zero
decibel).  The graph will show gain with only the low-frequency pole included.
The high-frequency pole is calculated from open-loop phase.

CMRR has no frequency dependence.
OPAMP_J 2
Upper list (data sheet values):

    Cc    compensation capacitor
    Ib    input bias current
    Av-dc    open-loop gain (DC)
    f-0db    unity gain frequency
    CMRR    common-mode rejection ratio

Lower list (macromodel internal parameter):

    BETA    input transistor transconductance
    C2    compensation capacitor
    CSS    slew-rate limiting capacitor
    GA    interstage transconductance
    GCM    common-mode transconductance
    IS    input leakage current
    ISS    input stage current
    RD    input stage load resistance
    RP    power dissipation
    RSS    input stage current source output resistance

This screen completes the input stage and inner stage.  The compensation
capacitor value (Cc) is sometimes available on the data sheet in the circuit
diagram of the op-amp.  If not, 10-to-20pF is a fair value.  For op-amps with
external compensation, use one of the values on the data sheet for the external
capacitor.  Then, be sure to use that value for the other input data.

About open-loop gain: this is a ratio of input/output signal, i.e. small-
signal amplification.  Being a pure number it has no units.  If the gain is
spec'd as 90db, put in 90db (Parts converts x-db to 10^(x/20) ).

About unity gain frequency: this frequency is the intersection of a straight-
line extension of the mid-band, open-loop, gain roll-off the unity gain (zero
decibel).  The graph will show gain with only the low-frequency pole included.
The high-frequency pole is calculated from open-loop phase.

CMRR has no frequency dependence.
OPAMP 3
Upper list (data sheet values):

    Phi    phase margin @ unity gain frequency

Lower list (macromodel internal parameter):

    C1    phase control capacitor

This screen adjusts the open-loop unity-gain phase margin, which models the
high-frequency pole.  Sometimes this value is not available in a table, but
can be found from a graph.  This value is not critical for lower-frequency
circuits, or lower-Q filters: just use the value we provided, which is typical
for normal op-amps.
OPAMP 4
Upper list (data sheet values):

    Ro-dc    DC output resistance
    Ro-ac    AC output resistance
    Ios    short-circuit output current limit

Lower list (macromodel internal parameter):

    RO1    output resistor #1
    RO2    output resistor #2
    GB    output stage transconductance

This screen adjusts the output drive.  The graph shows the maximum output level
for a resistive load.  The data sheet usually lists an output resistance Ro =
Ro-dc + Ro-ac.  Split this value so that Ro-dc is about 2x Ro-ac.
VCOMP 1
Upper list (data sheet values):

    +Vpwr    positive power supply
    -Vpwr    negative power supply
    +Vicr    positive common-mode range
    -Vicr    negative common-mode range
    Ib    input bias current
    Avd    DC gain
    Rl    output load resistance
    Pd    power dissipation

Lower list (macromodel internal parameter):

    BF1    input stage gain
    BF5    output stage gain
    RP    power dissipation resistance
    VI    input offset

This screen sets gain values and an input offset (to model comparators whose
common-mode input includes ground).  The screen shows the transfer function,
usually un-informative, except to let you know something is happening.
VCOMP 2
Upper list (data sheet values):

    Vst    input voltage step size
    Vod    input voltage step overdrive
    td    delay time

Lower list (macromodel internal parameter):

    TR3    input stage reverse transit time

This screen sets reaction time to input signals.  The data sheet usually gives
"falling delay" which includes some of the transition in the output waveform
(from 100% to 90%).  Usually the transition is much faster than the delay and
can be ignored (or subtracted from the value).  The precise value is not
critical given the unit-to-unit variation.
VCOMP 3
Upper list (data sheet values):

    Vst    input voltage step size
    Vod    input voltage step overdrive
    ttr    transition time

Lower list (macromodel internal parameter):

    TF5    output transistor forward transit time

This screen sets the "slew-rate" of the output.  The data sheet usually gives
a value going from 90% to 10%, which will be within 25% of the full swing time.
The precise value is not critical given the unit-to-unit variation.
VCOMP 4
Upper list (data sheet values):

    Vst    input voltage step size
    Vod    input voltage step overdrive
    td    delay time

Lower list (macromodel internal parameter):

    TR5    output transistor reverse transit time

This screen sets the reaction to input signals, but in the opposite direction.
The data sheet usually gives "rising delay" which includes some of the
transition in the output waveform (from 0% to 10%).  Usually the transition is
much faster than the delay and can be ignored (or subtracted from the value).
The precise value is not critical given the unit-to-unit variation.