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atime.a37
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1993-03-22
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8KB
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104 lines
ATIME CSECT CLS00010
* 3/19/93 John Brady JFB@RALVM6
* Neal Scheunemann NEALS@RALVM6
*
* ATIME returns a 32 bit integer value for a time stamp.
* Usage:
* This routine returns a pretty meaningless stamp
* from only one call. The real usefulness is
* in a code segment as follows:
*
* i=atime();
* do
* some
* work
* j=atime();
*
* j=j-i;
*
* The quantity j would represent the number of Milliseconds
* the work took to complete.
*
* The algorithm takes the 64 bit time of day clock and shifts
* it right 22 positions to preserve, in 32 bits,
* a representation of the clock precise to 1/1024 seconds.
*
* The quantity is then adjusted:
*
* 1) it is multiplied by a factor of (1000/1024), this transforms
* the precision from (1/1024) seconds to (1/1000) seconds.
*
* 2) multiply by a clock factor. See the STCK instruction
* in S/370 Principles of operation for rationale about the
* clock factor.
*
* 3) multiply by 1000 to represent the number of milliseconds
* on return
*
* Notice the value of CLKF has a 1000 built into it
* for dividing purposes, this allows the algorithm to keep
* precision, and avoids use of floating point math
PRINT GEN CLS00020
*
* Entry Linkage and data basing
STM R2,R14,12(13) SAVE REGISTERS
LR R3,R15 MAKE R3 BASE
USING ATIME,R3 TELL ASSEMBLER WHAT THE BASE IS
ST R13,SAVE0 SAVE CALLERS SAVEAREA ADDRESS
*
* Begin mainline
LA R4,SYMBOL Get address for store clock
STCK 0(R4) Put 64 bit TOD clock in SYMBOL
*
* Load the 4/5 register pair to represent high and low order
* halves of 64 bit clock value recently gleaned
L R4,SYMBOL Load reg..4
L R5,SYMBOL+4 ...and 5
LA R8,0
*
* Shift insignificant low order 22 bits off the deep end
SRDL R4,22(R8)
*
* Clear high order register
SR R4,R4
*
* Scale up the time value by 1.048576
M R4,CLKF
*
* Divide by 4096 (4 x 1024). This has the net effect of
* shifting the clock value the final 2 positions
* (we have only shifted 20 so far) and normalizing
* the quantity by a factor of (1000/1024).
D R4,DIVISOR
*
* Return to caller
LR R15,R5 PUT RETURN VALUE IN R15
LM R2,R14,12(13) RESTORE REGISTERS
BR 14 BACK TO CALLER
DS 0F
SAVE0 DS F
SYMBOL DS D
ANSWER DC D'0'
* Clock factor, the TOD clock's 31 bit flips a little
* slower than a second
CLKF DC F'1048576'
* divide by adjustment factor
DIVISOR DC F'1024000'
R0 EQU 0 CLS00310
R1 EQU 1 CLS00320
R2 EQU 2 CLS00330
R3 EQU 3 CLS00340
R4 EQU 4 CLS00350
R5 EQU 5 CLS00360
R6 EQU 6 CLS00370
R7 EQU 7 CLS00380
R8 EQU 8 CLS00390
R9 EQU 9 CLS00400
R10 EQU 10 CLS00410
R11 EQU 11 CLS00420
R12 EQU 12 CLS00430
R13 EQU 13 CLS00440
R14 EQU 14 CLS00450
R15 EQU 15 CLS00460
END CLS00470